ia64/xen-unstable

view xen/include/asm-ia64/linux-xen/asm/ptrace.h @ 15419:962f22223817

[IA64] Domain debugger for VTi: virtualize ibr and dbr.

Misc cleanup.

Signed-off-by: Tristan Gingold <tgingold@free.fr>
author Alex Williamson <alex.williamson@hp.com>
date Mon Jul 02 10:10:32 2007 -0600 (2007-07-02)
parents c7e16caf4e63
children 64ffc61b940b
line source
1 #ifndef _ASM_IA64_PTRACE_H
2 #define _ASM_IA64_PTRACE_H
4 /*
5 * Copyright (C) 1998-2004 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 * Stephane Eranian <eranian@hpl.hp.com>
8 * Copyright (C) 2003 Intel Co
9 * Suresh Siddha <suresh.b.siddha@intel.com>
10 * Fenghua Yu <fenghua.yu@intel.com>
11 * Arun Sharma <arun.sharma@intel.com>
12 *
13 * 12/07/98 S. Eranian added pt_regs & switch_stack
14 * 12/21/98 D. Mosberger updated to match latest code
15 * 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
16 *
17 */
18 /*
19 * When a user process is blocked, its state looks as follows:
20 *
21 * +----------------------+ ------- IA64_STK_OFFSET
22 * | | ^
23 * | struct pt_regs | |
24 * | | |
25 * +----------------------+ |
26 * | | |
27 * | memory stack | |
28 * | (growing downwards) | |
29 * //.....................// |
30 * |
31 * //.....................// |
32 * | | |
33 * +----------------------+ |
34 * | struct switch_stack | |
35 * | | |
36 * +----------------------+ |
37 * | | |
38 * //.....................// |
39 * |
40 * //.....................// |
41 * | | |
42 * | register stack | |
43 * | (growing upwards) | |
44 * | | |
45 * +----------------------+ | --- IA64_RBS_OFFSET
46 * | struct thread_info | | ^
47 * +----------------------+ | |
48 * | | | |
49 * | struct task_struct | | |
50 * current -> | | | |
51 * +----------------------+ -------
52 *
53 * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
54 * This is because ar.ec is saved as part of ar.pfs.
55 */
57 #include <linux/config.h>
59 #include <asm/fpu.h>
60 #include <asm/offsets.h>
62 /*
63 * Base-2 logarithm of number of pages to allocate per task structure
64 * (including register backing store and memory stack):
65 */
66 #if defined(CONFIG_IA64_PAGE_SIZE_4KB)
67 # define KERNEL_STACK_SIZE_ORDER 3
68 #elif defined(CONFIG_IA64_PAGE_SIZE_8KB)
69 # define KERNEL_STACK_SIZE_ORDER 2
70 #elif defined(CONFIG_IA64_PAGE_SIZE_16KB)
71 # define KERNEL_STACK_SIZE_ORDER 1
72 #else
73 # define KERNEL_STACK_SIZE_ORDER 0
74 #endif
76 #define IA64_RBS_OFFSET ((IA64_TASK_SIZE + IA64_THREAD_INFO_SIZE + 15) & ~15)
77 #define IA64_STK_OFFSET ((1 << KERNEL_STACK_SIZE_ORDER)*PAGE_SIZE)
79 #define KERNEL_STACK_SIZE IA64_STK_OFFSET
81 #ifndef __ASSEMBLY__
83 #include <asm/current.h>
84 #include <asm/page.h>
86 /*
87 * This struct defines the way the registers are saved on system
88 * calls.
89 *
90 * We don't save all floating point register because the kernel
91 * is compiled to use only a very small subset, so the other are
92 * untouched.
93 *
94 * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
95 * (because the memory stack pointer MUST ALWAYS be aligned this way)
96 *
97 */
98 #ifdef XEN
99 #include <xen/types.h>
100 #include <public/xen.h>
102 #define pt_regs cpu_user_regs
103 #endif
105 struct pt_regs {
106 /* The following registers are saved by SAVE_MIN: */
107 unsigned long b6; /* scratch */
108 unsigned long b7; /* scratch */
110 unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
111 unsigned long ar_ssd; /* reserved for future use (scratch) */
113 unsigned long r8; /* scratch (return value register 0) */
114 unsigned long r9; /* scratch (return value register 1) */
115 unsigned long r10; /* scratch (return value register 2) */
116 unsigned long r11; /* scratch (return value register 3) */
118 unsigned long cr_ipsr; /* interrupted task's psr */
119 unsigned long cr_iip; /* interrupted task's instruction pointer */
120 /*
121 * interrupted task's function state; if bit 63 is cleared, it
122 * contains syscall's ar.pfs.pfm:
123 */
124 unsigned long cr_ifs;
126 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
127 unsigned long ar_pfs; /* prev function state */
128 unsigned long ar_rsc; /* RSE configuration */
129 /* The following two are valid only if cr_ipsr.cpl > 0: */
130 unsigned long ar_rnat; /* RSE NaT */
131 unsigned long ar_bspstore; /* RSE bspstore */
133 unsigned long pr; /* 64 predicate registers (1 bit each) */
134 unsigned long b0; /* return pointer (bp) */
135 unsigned long loadrs; /* size of dirty partition << 16 */
137 unsigned long r1; /* the gp pointer */
138 unsigned long r12; /* interrupted task's memory stack pointer */
139 unsigned long r13; /* thread pointer */
141 unsigned long ar_fpsr; /* floating point status (preserved) */
142 unsigned long r15; /* scratch */
144 /* The remaining registers are NOT saved for system calls. */
146 unsigned long r14; /* scratch */
147 unsigned long r2; /* scratch */
148 unsigned long r3; /* scratch */
150 /* The following registers are saved by SAVE_REST: */
151 unsigned long r16; /* scratch */
152 unsigned long r17; /* scratch */
153 unsigned long r18; /* scratch */
154 unsigned long r19; /* scratch */
155 unsigned long r20; /* scratch */
156 unsigned long r21; /* scratch */
157 unsigned long r22; /* scratch */
158 unsigned long r23; /* scratch */
159 unsigned long r24; /* scratch */
160 unsigned long r25; /* scratch */
161 unsigned long r26; /* scratch */
162 unsigned long r27; /* scratch */
163 unsigned long r28; /* scratch */
164 unsigned long r29; /* scratch */
165 unsigned long r30; /* scratch */
166 unsigned long r31; /* scratch */
168 unsigned long ar_ccv; /* compare/exchange value (scratch) */
170 /*
171 * Floating point registers that the kernel considers scratch:
172 */
173 struct ia64_fpreg f6; /* scratch */
174 struct ia64_fpreg f7; /* scratch */
175 struct ia64_fpreg f8; /* scratch */
176 struct ia64_fpreg f9; /* scratch */
177 struct ia64_fpreg f10; /* scratch */
178 struct ia64_fpreg f11; /* scratch */
179 #ifdef XEN
180 unsigned long r4; /* preserved */
181 unsigned long r5; /* preserved */
182 unsigned long r6; /* preserved */
183 unsigned long r7; /* preserved */
184 unsigned long eml_unat; /* used for emulating instruction */
185 unsigned long pad0; /* alignment pad */
186 #endif
187 };
189 #ifdef XEN
190 /*
191 * User regs are placed at the end of the vcpu area.
192 * Convert a vcpu pointer to a regs pointer.
193 * Note: this is the same as ia64_task_regs, but it uses a Xen-friendly name.
194 */
195 struct vcpu;
196 static inline struct cpu_user_regs *vcpu_regs(struct vcpu *v)
197 {
198 return (struct cpu_user_regs *)((unsigned long)v + IA64_STK_OFFSET) - 1;
199 }
201 struct cpu_user_regs *guest_cpu_user_regs(void);
202 #endif
204 /*
205 * This structure contains the addition registers that need to
206 * preserved across a context switch. This generally consists of
207 * "preserved" registers.
208 */
209 struct switch_stack {
210 unsigned long caller_unat; /* user NaT collection register (preserved) */
211 unsigned long ar_fpsr; /* floating-point status register */
213 struct ia64_fpreg f2; /* preserved */
214 struct ia64_fpreg f3; /* preserved */
215 struct ia64_fpreg f4; /* preserved */
216 struct ia64_fpreg f5; /* preserved */
218 struct ia64_fpreg f12; /* scratch, but untouched by kernel */
219 struct ia64_fpreg f13; /* scratch, but untouched by kernel */
220 struct ia64_fpreg f14; /* scratch, but untouched by kernel */
221 struct ia64_fpreg f15; /* scratch, but untouched by kernel */
222 struct ia64_fpreg f16; /* preserved */
223 struct ia64_fpreg f17; /* preserved */
224 struct ia64_fpreg f18; /* preserved */
225 struct ia64_fpreg f19; /* preserved */
226 struct ia64_fpreg f20; /* preserved */
227 struct ia64_fpreg f21; /* preserved */
228 struct ia64_fpreg f22; /* preserved */
229 struct ia64_fpreg f23; /* preserved */
230 struct ia64_fpreg f24; /* preserved */
231 struct ia64_fpreg f25; /* preserved */
232 struct ia64_fpreg f26; /* preserved */
233 struct ia64_fpreg f27; /* preserved */
234 struct ia64_fpreg f28; /* preserved */
235 struct ia64_fpreg f29; /* preserved */
236 struct ia64_fpreg f30; /* preserved */
237 struct ia64_fpreg f31; /* preserved */
239 unsigned long r4; /* preserved */
240 unsigned long r5; /* preserved */
241 unsigned long r6; /* preserved */
242 unsigned long r7; /* preserved */
244 unsigned long b0; /* so we can force a direct return in copy_thread */
245 unsigned long b1;
246 unsigned long b2;
247 unsigned long b3;
248 unsigned long b4;
249 unsigned long b5;
251 unsigned long ar_pfs; /* previous function state */
252 unsigned long ar_lc; /* loop counter (preserved) */
253 unsigned long ar_unat; /* NaT bits for r4-r7 */
254 unsigned long ar_rnat; /* RSE NaT collection register */
255 unsigned long ar_bspstore; /* RSE dirty base (preserved) */
256 unsigned long pr; /* 64 predicate registers (1 bit each) */
257 };
259 #ifdef __KERNEL__
260 /*
261 * We use the ia64_psr(regs)->ri to determine which of the three
262 * instructions in bundle (16 bytes) took the sample. Generate
263 * the canonical representation by adding to instruction pointer.
264 */
265 # define instruction_pointer(regs) ((regs)->cr_iip + ia64_psr(regs)->ri)
266 /* Conserve space in histogram by encoding slot bits in address
267 * bits 2 and 3 rather than bits 0 and 1.
268 */
269 #define profile_pc(regs) \
270 ({ \
271 unsigned long __ip = instruction_pointer(regs); \
272 (__ip & ~3UL) + ((__ip & 3UL) << 2); \
273 })
275 /* given a pointer to a task_struct, return the user's pt_regs */
276 # define ia64_task_regs(t) (((struct pt_regs *) ((char *) (t) + IA64_STK_OFFSET)) - 1)
277 # define ia64_psr(regs) ((struct ia64_psr *) &(regs)->cr_ipsr)
278 #ifdef XEN
279 # define guest_mode(regs) (ia64_psr(regs)->cpl != 0)
280 # define guest_kernel_mode(regs) (ia64_psr(regs)->cpl == CONFIG_CPL0_EMUL)
281 # define vmx_guest_kernel_mode(regs) (ia64_psr(regs)->cpl == 0)
282 #else
283 # define user_mode(regs) (((struct ia64_psr *) &(regs)->cr_ipsr)->cpl != 0)
284 #endif
285 # define user_stack(task,regs) ((long) regs - (long) task == IA64_STK_OFFSET - sizeof(*regs))
286 # define fsys_mode(task,regs) \
287 ({ \
288 struct task_struct *_task = (task); \
289 struct pt_regs *_regs = (regs); \
290 !user_mode(_regs) && user_stack(_task, _regs); \
291 })
293 /*
294 * System call handlers that, upon successful completion, need to return a negative value
295 * should call force_successful_syscall_return() right before returning. On architectures
296 * where the syscall convention provides for a separate error flag (e.g., alpha, ia64,
297 * ppc{,64}, sparc{,64}, possibly others), this macro can be used to ensure that the error
298 * flag will not get set. On architectures which do not support a separate error flag,
299 * the macro is a no-op and the spurious error condition needs to be filtered out by some
300 * other means (e.g., in user-level, by passing an extra argument to the syscall handler,
301 * or something along those lines).
302 *
303 * On ia64, we can clear the user's pt_regs->r8 to force a successful syscall.
304 */
305 # define force_successful_syscall_return() (ia64_task_regs(current)->r8 = 0)
307 struct task_struct; /* forward decl */
308 struct unw_frame_info; /* forward decl */
310 extern void show_regs (struct pt_regs *);
311 extern void ia64_do_show_stack (struct unw_frame_info *, void *);
312 extern unsigned long ia64_get_user_rbs_end (struct task_struct *, struct pt_regs *,
313 unsigned long *);
314 extern long ia64_peek (struct task_struct *, struct switch_stack *, unsigned long,
315 unsigned long, long *);
316 extern long ia64_poke (struct task_struct *, struct switch_stack *, unsigned long,
317 unsigned long, long);
318 extern void ia64_flush_fph (struct task_struct *);
319 extern void ia64_sync_fph (struct task_struct *);
320 extern long ia64_sync_user_rbs (struct task_struct *, struct switch_stack *,
321 unsigned long, unsigned long);
323 /* get nat bits for scratch registers such that bit N==1 iff scratch register rN is a NaT */
324 extern unsigned long ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat);
325 /* put nat bits for scratch registers such that scratch register rN is a NaT iff bit N==1 */
326 extern unsigned long ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat);
328 extern void ia64_increment_ip (struct pt_regs *pt);
329 extern void ia64_decrement_ip (struct pt_regs *pt);
331 #endif /* !__KERNEL__ */
333 /* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
334 struct pt_all_user_regs {
335 unsigned long nat;
336 unsigned long cr_iip;
337 unsigned long cfm;
338 unsigned long cr_ipsr;
339 unsigned long pr;
341 unsigned long gr[32];
342 unsigned long br[8];
343 unsigned long ar[128];
344 struct ia64_fpreg fr[128];
345 };
347 #endif /* !__ASSEMBLY__ */
349 /* indices to application-registers array in pt_all_user_regs */
350 #define PT_AUR_RSC 16
351 #define PT_AUR_BSP 17
352 #define PT_AUR_BSPSTORE 18
353 #define PT_AUR_RNAT 19
354 #define PT_AUR_CCV 32
355 #define PT_AUR_UNAT 36
356 #define PT_AUR_FPSR 40
357 #define PT_AUR_PFS 64
358 #define PT_AUR_LC 65
359 #define PT_AUR_EC 66
361 /*
362 * The numbers chosen here are somewhat arbitrary but absolutely MUST
363 * not overlap with any of the number assigned in <linux/ptrace.h>.
364 */
365 #define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
366 #define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
367 #define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
368 #define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
369 #define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
371 #define PTRACE_OLDSETOPTIONS 21
373 #endif /* _ASM_IA64_PTRACE_H */