ia64/xen-unstable

view xen/include/public/arch-ia64.h @ 9495:8e0b9f31cf3f

[IA64] MAX_VIRT_CPUS and NR_CPUS

Increase MAX_VIRT_CPUS and NR_CPUS to 64.
Check maxcpus < MAX_VIRT_CPUS.
Check size of shared_info (<= PAGE_SIZE).

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
author awilliam@xenbuild.aw
date Fri Apr 07 11:40:33 2006 -0600 (2006-04-07)
parents 2b6e531dab38
children 7a9a00c51588
line source
1 /******************************************************************************
2 * arch-ia64/hypervisor-if.h
3 *
4 * Guest OS interface to IA64 Xen.
5 */
7 #ifndef __HYPERVISOR_IF_IA64_H__
8 #define __HYPERVISOR_IF_IA64_H__
10 #ifdef __XEN__
11 #define __DEFINE_GUEST_HANDLE(name, type) \
12 typedef struct { type *p; } __guest_handle_ ## name
13 #else
14 #define __DEFINE_GUEST_HANDLE(name, type) \
15 typedef type * __guest_handle_ ## name
16 #endif
18 #define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name)
19 #define GUEST_HANDLE(name) __guest_handle_ ## name
21 #ifndef __ASSEMBLY__
22 /* Guest handles for primitive C types. */
23 __DEFINE_GUEST_HANDLE(uchar, unsigned char);
24 __DEFINE_GUEST_HANDLE(uint, unsigned int);
25 __DEFINE_GUEST_HANDLE(ulong, unsigned long);
26 DEFINE_GUEST_HANDLE(char);
27 DEFINE_GUEST_HANDLE(int);
28 DEFINE_GUEST_HANDLE(long);
29 DEFINE_GUEST_HANDLE(void);
30 #endif
32 /* Maximum number of virtual CPUs in multi-processor guests. */
33 /* WARNING: before changing this, check that shared_info fits on a page */
34 #define MAX_VIRT_CPUS 64
36 #ifndef __ASSEMBLY__
38 #define MAX_NR_SECTION 32 /* at most 32 memory holes */
39 typedef struct {
40 unsigned long start; /* start of memory hole */
41 unsigned long end; /* end of memory hole */
42 } mm_section_t;
44 typedef struct {
45 unsigned long mfn : 56;
46 unsigned long type: 8;
47 } pmt_entry_t;
49 #define GPFN_MEM (0UL << 56) /* Guest pfn is normal mem */
50 #define GPFN_FRAME_BUFFER (1UL << 56) /* VGA framebuffer */
51 #define GPFN_LOW_MMIO (2UL << 56) /* Low MMIO range */
52 #define GPFN_PIB (3UL << 56) /* PIB base */
53 #define GPFN_IOSAPIC (4UL << 56) /* IOSAPIC base */
54 #define GPFN_LEGACY_IO (5UL << 56) /* Legacy I/O base */
55 #define GPFN_GFW (6UL << 56) /* Guest Firmware */
56 #define GPFN_HIGH_MMIO (7UL << 56) /* High MMIO range */
58 #define GPFN_IO_MASK (7UL << 56) /* Guest pfn is I/O type */
59 #define GPFN_INV_MASK (31UL << 59) /* Guest pfn is invalid */
61 #define INVALID_MFN (~0UL)
63 #define MEM_G (1UL << 30)
64 #define MEM_M (1UL << 20)
66 #define MMIO_START (3 * MEM_G)
67 #define MMIO_SIZE (512 * MEM_M)
69 #define VGA_IO_START 0xA0000UL
70 #define VGA_IO_SIZE 0x20000
72 #define LEGACY_IO_START (MMIO_START + MMIO_SIZE)
73 #define LEGACY_IO_SIZE (64*MEM_M)
75 #define IO_PAGE_START (LEGACY_IO_START + LEGACY_IO_SIZE)
76 #define IO_PAGE_SIZE PAGE_SIZE
78 #define STORE_PAGE_START (IO_PAGE_START + IO_PAGE_SIZE)
79 #define STORE_PAGE_SIZE PAGE_SIZE
81 #define IO_SAPIC_START 0xfec00000UL
82 #define IO_SAPIC_SIZE 0x100000
84 #define PIB_START 0xfee00000UL
85 #define PIB_SIZE 0x100000
87 #define GFW_START (4*MEM_G -16*MEM_M)
88 #define GFW_SIZE (16*MEM_M)
90 /*
91 * NB. This may become a 64-bit count with no shift. If this happens then the
92 * structure size will still be 8 bytes, so no other alignments will change.
93 */
94 typedef struct {
95 unsigned int tsc_bits; /* 0: 32 bits read from the CPU's TSC. */
96 unsigned int tsc_bitshift; /* 4: 'tsc_bits' uses N:N+31 of TSC. */
97 } tsc_timestamp_t; /* 8 bytes */
99 struct pt_fpreg {
100 union {
101 unsigned long bits[2];
102 long double __dummy; /* force 16-byte alignment */
103 } u;
104 };
106 typedef struct cpu_user_regs{
107 /* The following registers are saved by SAVE_MIN: */
108 unsigned long b6; /* scratch */
109 unsigned long b7; /* scratch */
111 unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
112 unsigned long ar_ssd; /* reserved for future use (scratch) */
114 unsigned long r8; /* scratch (return value register 0) */
115 unsigned long r9; /* scratch (return value register 1) */
116 unsigned long r10; /* scratch (return value register 2) */
117 unsigned long r11; /* scratch (return value register 3) */
119 unsigned long cr_ipsr; /* interrupted task's psr */
120 unsigned long cr_iip; /* interrupted task's instruction pointer */
121 unsigned long cr_ifs; /* interrupted task's function state */
123 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
124 unsigned long ar_pfs; /* prev function state */
125 unsigned long ar_rsc; /* RSE configuration */
126 /* The following two are valid only if cr_ipsr.cpl > 0: */
127 unsigned long ar_rnat; /* RSE NaT */
128 unsigned long ar_bspstore; /* RSE bspstore */
130 unsigned long pr; /* 64 predicate registers (1 bit each) */
131 unsigned long b0; /* return pointer (bp) */
132 unsigned long loadrs; /* size of dirty partition << 16 */
134 unsigned long r1; /* the gp pointer */
135 unsigned long r12; /* interrupted task's memory stack pointer */
136 unsigned long r13; /* thread pointer */
138 unsigned long ar_fpsr; /* floating point status (preserved) */
139 unsigned long r15; /* scratch */
141 /* The remaining registers are NOT saved for system calls. */
143 unsigned long r14; /* scratch */
144 unsigned long r2; /* scratch */
145 unsigned long r3; /* scratch */
146 unsigned long r16; /* scratch */
147 unsigned long r17; /* scratch */
148 unsigned long r18; /* scratch */
149 unsigned long r19; /* scratch */
150 unsigned long r20; /* scratch */
151 unsigned long r21; /* scratch */
152 unsigned long r22; /* scratch */
153 unsigned long r23; /* scratch */
154 unsigned long r24; /* scratch */
155 unsigned long r25; /* scratch */
156 unsigned long r26; /* scratch */
157 unsigned long r27; /* scratch */
158 unsigned long r28; /* scratch */
159 unsigned long r29; /* scratch */
160 unsigned long r30; /* scratch */
161 unsigned long r31; /* scratch */
162 unsigned long ar_ccv; /* compare/exchange value (scratch) */
164 /*
165 * Floating point registers that the kernel considers scratch:
166 */
167 struct pt_fpreg f6; /* scratch */
168 struct pt_fpreg f7; /* scratch */
169 struct pt_fpreg f8; /* scratch */
170 struct pt_fpreg f9; /* scratch */
171 struct pt_fpreg f10; /* scratch */
172 struct pt_fpreg f11; /* scratch */
173 unsigned long r4; /* preserved */
174 unsigned long r5; /* preserved */
175 unsigned long r6; /* preserved */
176 unsigned long r7; /* preserved */
177 unsigned long eml_unat; /* used for emulating instruction */
178 unsigned long rfi_pfs; /* used for elulating rfi */
180 }cpu_user_regs_t;
182 typedef union {
183 unsigned long value;
184 struct {
185 int a_int:1;
186 int a_from_int_cr:1;
187 int a_to_int_cr:1;
188 int a_from_psr:1;
189 int a_from_cpuid:1;
190 int a_cover:1;
191 int a_bsw:1;
192 long reserved:57;
193 };
194 } vac_t;
196 typedef union {
197 unsigned long value;
198 struct {
199 int d_vmsw:1;
200 int d_extint:1;
201 int d_ibr_dbr:1;
202 int d_pmc:1;
203 int d_to_pmd:1;
204 int d_itm:1;
205 long reserved:58;
206 };
207 } vdc_t;
209 typedef struct {
210 vac_t vac;
211 vdc_t vdc;
212 unsigned long virt_env_vaddr;
213 unsigned long reserved1[29];
214 unsigned long vhpi;
215 unsigned long reserved2[95];
216 union {
217 unsigned long vgr[16];
218 unsigned long bank1_regs[16]; // bank1 regs (r16-r31) when bank0 active
219 };
220 union {
221 unsigned long vbgr[16];
222 unsigned long bank0_regs[16]; // bank0 regs (r16-r31) when bank1 active
223 };
224 unsigned long vnat;
225 unsigned long vbnat;
226 unsigned long vcpuid[5];
227 unsigned long reserved3[11];
228 unsigned long vpsr;
229 unsigned long vpr;
230 unsigned long reserved4[76];
231 union {
232 unsigned long vcr[128];
233 struct {
234 unsigned long dcr; // CR0
235 unsigned long itm;
236 unsigned long iva;
237 unsigned long rsv1[5];
238 unsigned long pta; // CR8
239 unsigned long rsv2[7];
240 unsigned long ipsr; // CR16
241 unsigned long isr;
242 unsigned long rsv3;
243 unsigned long iip;
244 unsigned long ifa;
245 unsigned long itir;
246 unsigned long iipa;
247 unsigned long ifs;
248 unsigned long iim; // CR24
249 unsigned long iha;
250 unsigned long rsv4[38];
251 unsigned long lid; // CR64
252 unsigned long ivr;
253 unsigned long tpr;
254 unsigned long eoi;
255 unsigned long irr[4];
256 unsigned long itv; // CR72
257 unsigned long pmv;
258 unsigned long cmcv;
259 unsigned long rsv5[5];
260 unsigned long lrr0; // CR80
261 unsigned long lrr1;
262 unsigned long rsv6[46];
263 };
264 };
265 union {
266 unsigned long reserved5[128];
267 struct {
268 unsigned long precover_ifs;
269 unsigned long unat; // not sure if this is needed until NaT arch is done
270 int interrupt_collection_enabled; // virtual psr.ic
271 /* virtual interrupt deliverable flag is evtchn_upcall_mask in
272 * shared info area now. interrupt_mask_addr is the address
273 * of evtchn_upcall_mask for current vcpu
274 */
275 unsigned long interrupt_mask_addr;
276 int pending_interruption;
277 int incomplete_regframe; // see SDM vol2 6.8
278 unsigned long reserved5_1[4];
279 int metaphysical_mode; // 1 = use metaphys mapping, 0 = use virtual
280 int banknum; // 0 or 1, which virtual register bank is active
281 unsigned long rrs[8]; // region registers
282 unsigned long krs[8]; // kernel registers
283 unsigned long pkrs[8]; // protection key registers
284 unsigned long tmp[8]; // temp registers (e.g. for hyperprivops)
285 // FIXME: tmp[8] temp'ly being used for virtual psr.pp
286 };
287 };
288 unsigned long reserved6[3456];
289 unsigned long vmm_avail[128];
290 unsigned long reserved7[4096];
291 } mapped_regs_t;
293 typedef struct {
294 mapped_regs_t *privregs;
295 int evtchn_vector;
296 } arch_vcpu_info_t;
298 typedef mapped_regs_t vpd_t;
300 typedef struct {
301 unsigned int flags;
302 unsigned long start_info_pfn;
303 } arch_shared_info_t;
305 typedef struct {
306 unsigned long start;
307 unsigned long size;
308 } arch_initrd_info_t;
310 #define IA64_COMMAND_LINE_SIZE 512
311 typedef struct vcpu_guest_context {
312 #define VGCF_FPU_VALID (1<<0)
313 #define VGCF_VMX_GUEST (1<<1)
314 #define VGCF_IN_KERNEL (1<<2)
315 unsigned long flags; /* VGCF_* flags */
316 unsigned long pt_base; /* PMT table base */
317 unsigned long share_io_pg; /* Shared page for I/O emulation */
318 unsigned long sys_pgnr; /* System pages out of domain memory */
319 unsigned long vm_assist; /* VMASST_TYPE_* bitmap, now none on IPF */
321 cpu_user_regs_t regs;
322 arch_vcpu_info_t vcpu;
323 arch_shared_info_t shared;
324 arch_initrd_info_t initrd;
325 char cmdline[IA64_COMMAND_LINE_SIZE];
326 } vcpu_guest_context_t;
327 DEFINE_GUEST_HANDLE(vcpu_guest_context_t);
329 #endif /* !__ASSEMBLY__ */
331 #endif /* __HYPERVISOR_IF_IA64_H__ */
333 /*
334 * Local variables:
335 * mode: C
336 * c-set-style: "BSD"
337 * c-basic-offset: 4
338 * tab-width: 4
339 * indent-tabs-mode: nil
340 * End:
341 */