ia64/xen-unstable

view xen/arch/ia64/linux-xen/entry.S @ 16766:8909a5717cd7

[IA64] Cleanup white space in ia64_switch_to()

Use tab instead of 4 space.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Alex Williamson <alex.williamson@hp.com>
date Thu Jan 17 12:05:43 2008 -0700 (2008-01-17)
parents 2863852e02f6
children ed7d55e8cd34
line source
1 /*
2 * ia64/kernel/entry.S
3 *
4 * Kernel entry points.
5 *
6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999, 2002-2003
9 * Asit Mallick <Asit.K.Mallick@intel.com>
10 * Don Dugger <Don.Dugger@intel.com>
11 * Suresh Siddha <suresh.b.siddha@intel.com>
12 * Fenghua Yu <fenghua.yu@intel.com>
13 * Copyright (C) 1999 VA Linux Systems
14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
15 */
16 /*
17 * ia64_switch_to now places correct virtual mapping in in TR2 for
18 * kernel stack. This allows us to handle interrupts without changing
19 * to physical mode.
20 *
21 * Jonathan Nicklin <nicklin@missioncriticallinux.com>
22 * Patrick O'Rourke <orourke@missioncriticallinux.com>
23 * 11/07/2000
24 */
25 /*
26 * Global (preserved) predicate usage on syscall entry/exit path:
27 *
28 * pKStk: See entry.h.
29 * pUStk: See entry.h.
30 * pSys: See entry.h.
31 * pNonSys: !pSys
32 */
34 #include <linux/config.h>
36 #include <asm/asmmacro.h>
37 #include <asm/cache.h>
38 #ifdef XEN
39 #include <xen/errno.h>
40 #else
41 #include <asm/errno.h>
42 #endif
43 #include <asm/kregs.h>
44 #include <asm/offsets.h>
45 #include <asm/pgtable.h>
46 #include <asm/percpu.h>
47 #include <asm/processor.h>
48 #include <asm/thread_info.h>
49 #include <asm/unistd.h>
51 #include "minstate.h"
53 #ifndef XEN
54 /*
55 * execve() is special because in case of success, we need to
56 * setup a null register window frame.
57 */
58 ENTRY(ia64_execve)
59 /*
60 * Allocate 8 input registers since ptrace() may clobber them
61 */
62 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
63 alloc loc1=ar.pfs,8,2,4,0
64 mov loc0=rp
65 .body
66 mov out0=in0 // filename
67 ;; // stop bit between alloc and call
68 mov out1=in1 // argv
69 mov out2=in2 // envp
70 add out3=16,sp // regs
71 br.call.sptk.many rp=sys_execve
72 .ret0:
73 #ifdef CONFIG_IA32_SUPPORT
74 /*
75 * Check if we're returning to ia32 mode. If so, we need to restore ia32 registers
76 * from pt_regs.
77 */
78 adds r16=PT(CR_IPSR)+16,sp
79 ;;
80 ld8 r16=[r16]
81 #endif
82 cmp4.ge p6,p7=r8,r0
83 mov ar.pfs=loc1 // restore ar.pfs
84 sxt4 r8=r8 // return 64-bit result
85 ;;
86 stf.spill [sp]=f0
87 (p6) cmp.ne pKStk,pUStk=r0,r0 // a successful execve() lands us in user-mode...
88 mov rp=loc0
89 (p6) mov ar.pfs=r0 // clear ar.pfs on success
90 (p7) br.ret.sptk.many rp
92 /*
93 * In theory, we'd have to zap this state only to prevent leaking of
94 * security sensitive state (e.g., if current->mm->dumpable is zero). However,
95 * this executes in less than 20 cycles even on Itanium, so it's not worth
96 * optimizing for...).
97 */
98 mov ar.unat=0; mov ar.lc=0
99 mov r4=0; mov f2=f0; mov b1=r0
100 mov r5=0; mov f3=f0; mov b2=r0
101 mov r6=0; mov f4=f0; mov b3=r0
102 mov r7=0; mov f5=f0; mov b4=r0
103 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
104 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
105 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
106 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
107 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
108 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
109 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
110 #ifdef CONFIG_IA32_SUPPORT
111 tbit.nz p6,p0=r16, IA64_PSR_IS_BIT
112 movl loc0=ia64_ret_from_ia32_execve
113 ;;
114 (p6) mov rp=loc0
115 #endif
116 br.ret.sptk.many rp
117 END(ia64_execve)
119 /*
120 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
121 * u64 tls)
122 */
123 GLOBAL_ENTRY(sys_clone2)
124 /*
125 * Allocate 8 input registers since ptrace() may clobber them
126 */
127 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
128 alloc r16=ar.pfs,8,2,6,0
129 DO_SAVE_SWITCH_STACK
130 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
131 mov loc0=rp
132 mov loc1=r16 // save ar.pfs across do_fork
133 .body
134 mov out1=in1
135 mov out3=in2
136 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
137 mov out4=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
138 ;;
139 (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
140 mov out5=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
141 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
142 mov out0=in0 // out0 = clone_flags
143 br.call.sptk.many rp=do_fork
144 .ret1: .restore sp
145 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
146 mov ar.pfs=loc1
147 mov rp=loc0
148 br.ret.sptk.many rp
149 END(sys_clone2)
151 /*
152 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
153 * Deprecated. Use sys_clone2() instead.
154 */
155 GLOBAL_ENTRY(sys_clone)
156 /*
157 * Allocate 8 input registers since ptrace() may clobber them
158 */
159 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
160 alloc r16=ar.pfs,8,2,6,0
161 DO_SAVE_SWITCH_STACK
162 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
163 mov loc0=rp
164 mov loc1=r16 // save ar.pfs across do_fork
165 .body
166 mov out1=in1
167 mov out3=16 // stacksize (compensates for 16-byte scratch area)
168 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
169 mov out4=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
170 ;;
171 (p6) st8 [r2]=in4 // store TLS in r13 (tp)
172 mov out5=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
173 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
174 mov out0=in0 // out0 = clone_flags
175 br.call.sptk.many rp=do_fork
176 .ret2: .restore sp
177 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
178 mov ar.pfs=loc1
179 mov rp=loc0
180 br.ret.sptk.many rp
181 END(sys_clone)
182 #endif
184 /*
185 * prev_task <- ia64_switch_to(struct task_struct *next)
186 * With Ingo's new scheduler, interrupts are disabled when this routine gets
187 * called. The code starting at .map relies on this. The rest of the code
188 * doesn't care about the interrupt masking status.
189 */
190 GLOBAL_ENTRY(ia64_switch_to)
191 .prologue
192 alloc r16=ar.pfs,1,0,0,0
193 DO_SAVE_SWITCH_STACK
194 .body
196 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
197 movl r25=init_task
198 #ifdef XEN
199 movl r27=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
200 ld8 r27=[r27]
201 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
202 dep r20=0,in0,60,4 // physical address of "next"
203 #else
204 mov r27=IA64_KR(CURRENT_STACK)
205 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
206 dep r20=0,in0,61,3 // physical address of "next"
207 #endif
208 ;;
209 st8 [r22]=sp // save kernel stack pointer of old task
210 shr.u r26=r20,IA64_GRANULE_SHIFT
211 cmp.eq p7,p6=r25,in0
212 ;;
213 /*
214 * If we've already mapped this task's page, we can skip doing it again.
215 */
216 (p6) cmp.eq p7,p6=r26,r27
217 (p6) br.cond.dpnt .map
218 ;;
219 .done:
220 (p6) ssm psr.ic // if we had to map, reenable the psr.ic bit FIRST!!!
221 ;;
222 (p6) srlz.d
223 ld8 sp=[r21] // load kernel stack pointer of new task
224 #ifdef XEN
225 movl r8=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
226 st8 [r8]=in0
227 #else
228 mov IA64_KR(CURRENT)=in0 // update "current" application register
229 #endif
230 #ifdef XEN //for VTI domain current is save to 21 of bank0
231 ;;
232 bsw.0
233 ;;
234 mov r8=r13 // return pointer to previously running task
235 mov r13=in0 // set "current" pointer
236 mov r21=in0
237 ;;
238 bsw.1
239 ;;
240 #else
241 mov r8=r13 // return pointer to previously running task
242 mov r13=in0 // set "current" pointer
243 #endif
244 DO_LOAD_SWITCH_STACK
246 #ifdef CONFIG_SMP
247 sync.i // ensure "fc"s done by this CPU are visible on other CPUs
248 #endif
249 br.ret.sptk.many rp // boogie on out in new context
251 .map:
252 #ifdef XEN
253 // avoid overlapping with kernel TR
254 movl r25=KERNEL_START
255 dep r23=0,in0,0,KERNEL_TR_PAGE_SHIFT
256 ;;
257 cmp.eq p7,p0=r25,r23
258 ;;
259 (p7) movl r8=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
260 (p7) st8 [r8]=r26
261 (p7) br.cond.sptk .done
262 #endif
263 rsm psr.ic // interrupts (psr.i) are already disabled here
264 movl r25=PAGE_KERNEL
265 movl r26 = IA64_GRANULE_SHIFT << 2
266 ;;
267 srlz.d
268 or r23=r25,r20 // construct PA | page properties
269 ptr.d in0, r26 // to purge dtr[IA64_TR_VHPT]
270 ;;
271 mov cr.itir=r26
272 mov cr.ifa=in0 // VA of next task...
273 srlz.d
274 ;;
275 mov r25=IA64_TR_CURRENT_STACK
276 #ifdef XEN
277 movl r8=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
278 st8 [r8]=r26
280 #else
281 mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped...
282 #endif
283 ;;
284 itr.d dtr[r25]=r23 // wire in new mapping...
285 br.cond.sptk .done
286 END(ia64_switch_to)
288 /*
289 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
290 * means that we may get an interrupt with "sp" pointing to the new kernel stack while
291 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
292 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
293 * problem. Also, we don't need to specify unwind information for preserved registers
294 * that are not modified in save_switch_stack as the right unwind information is already
295 * specified at the call-site of save_switch_stack.
296 */
298 /*
299 * save_switch_stack:
300 * - r16 holds ar.pfs
301 * - b7 holds address to return to
302 * - rp (b0) holds return address to save
303 */
304 GLOBAL_ENTRY(save_switch_stack)
305 .prologue
306 .altrp b7
307 flushrs // flush dirty regs to backing store (must be first in insn group)
308 .save @priunat,r17
309 mov r17=ar.unat // preserve caller's
310 .body
311 #ifdef CONFIG_ITANIUM
312 adds r2=16+128,sp
313 adds r3=16+64,sp
314 adds r14=SW(R4)+16,sp
315 ;;
316 st8.spill [r14]=r4,16 // spill r4
317 lfetch.fault.excl.nt1 [r3],128
318 ;;
319 lfetch.fault.excl.nt1 [r2],128
320 lfetch.fault.excl.nt1 [r3],128
321 ;;
322 lfetch.fault.excl [r2]
323 lfetch.fault.excl [r3]
324 adds r15=SW(R5)+16,sp
325 #else
326 add r2=16+3*128,sp
327 add r3=16,sp
328 add r14=SW(R4)+16,sp
329 ;;
330 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
331 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
332 ;;
333 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
334 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
335 ;;
336 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
337 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
338 adds r15=SW(R5)+16,sp
339 #endif
340 ;;
341 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
342 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
343 add r2=SW(F2)+16,sp // r2 = &sw->f2
344 ;;
345 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
346 mov.m r18=ar.fpsr // preserve fpsr
347 add r3=SW(F3)+16,sp // r3 = &sw->f3
348 ;;
349 stf.spill [r2]=f2,32
350 mov.m r19=ar.rnat
351 mov r21=b0
353 stf.spill [r3]=f3,32
354 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
355 mov r22=b1
356 ;;
357 // since we're done with the spills, read and save ar.unat:
358 mov.m r29=ar.unat
359 mov.m r20=ar.bspstore
360 mov r23=b2
361 stf.spill [r2]=f4,32
362 stf.spill [r3]=f5,32
363 mov r24=b3
364 ;;
365 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
366 st8 [r15]=r23,SW(B3)-SW(B2) // save b2
367 mov r25=b4
368 mov r26=b5
369 ;;
370 st8 [r14]=r22,SW(B4)-SW(B1) // save b1
371 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
372 mov r21=ar.lc // I-unit
373 stf.spill [r2]=f12,32
374 stf.spill [r3]=f13,32
375 ;;
376 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
377 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
378 stf.spill [r2]=f14,32
379 stf.spill [r3]=f15,32
380 ;;
381 st8 [r14]=r26 // save b5
382 st8 [r15]=r21 // save ar.lc
383 stf.spill [r2]=f16,32
384 stf.spill [r3]=f17,32
385 ;;
386 stf.spill [r2]=f18,32
387 stf.spill [r3]=f19,32
388 ;;
389 stf.spill [r2]=f20,32
390 stf.spill [r3]=f21,32
391 ;;
392 stf.spill [r2]=f22,32
393 stf.spill [r3]=f23,32
394 ;;
395 stf.spill [r2]=f24,32
396 stf.spill [r3]=f25,32
397 ;;
398 stf.spill [r2]=f26,32
399 stf.spill [r3]=f27,32
400 ;;
401 stf.spill [r2]=f28,32
402 stf.spill [r3]=f29,32
403 ;;
404 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
405 stf.spill [r3]=f31,SW(PR)-SW(F31)
406 add r14=SW(CALLER_UNAT)+16,sp
407 ;;
408 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
409 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
410 mov r21=pr
411 ;;
412 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
413 st8 [r3]=r21 // save predicate registers
414 ;;
415 st8 [r2]=r20 // save ar.bspstore
416 st8 [r14]=r18 // save fpsr
417 mov ar.rsc=3 // put RSE back into eager mode, pl 0
418 br.cond.sptk.many b7
419 END(save_switch_stack)
421 /*
422 * load_switch_stack:
423 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
424 * - b7 holds address to return to
425 * - must not touch r8-r11
426 */
427 #ifdef XEN
428 GLOBAL_ENTRY(load_switch_stack)
429 #else
430 ENTRY(load_switch_stack)
431 #endif
432 .prologue
433 .altrp b7
435 .body
436 lfetch.fault.nt1 [sp]
437 adds r2=SW(AR_BSPSTORE)+16,sp
438 adds r3=SW(AR_UNAT)+16,sp
439 mov ar.rsc=0 // put RSE into enforced lazy mode
440 adds r14=SW(CALLER_UNAT)+16,sp
441 adds r15=SW(AR_FPSR)+16,sp
442 ;;
443 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
444 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
445 ;;
446 ld8 r21=[r2],16 // restore b0
447 ld8 r22=[r3],16 // restore b1
448 ;;
449 ld8 r23=[r2],16 // restore b2
450 ld8 r24=[r3],16 // restore b3
451 ;;
452 ld8 r25=[r2],16 // restore b4
453 ld8 r26=[r3],16 // restore b5
454 ;;
455 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
456 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
457 ;;
458 ld8 r28=[r2] // restore pr
459 ld8 r30=[r3] // restore rnat
460 ;;
461 ld8 r18=[r14],16 // restore caller's unat
462 ld8 r19=[r15],24 // restore fpsr
463 ;;
464 ldf.fill f2=[r14],32
465 ldf.fill f3=[r15],32
466 ;;
467 ldf.fill f4=[r14],32
468 ldf.fill f5=[r15],32
469 ;;
470 ldf.fill f12=[r14],32
471 ldf.fill f13=[r15],32
472 ;;
473 ldf.fill f14=[r14],32
474 ldf.fill f15=[r15],32
475 ;;
476 ldf.fill f16=[r14],32
477 ldf.fill f17=[r15],32
478 ;;
479 ldf.fill f18=[r14],32
480 ldf.fill f19=[r15],32
481 mov b0=r21
482 ;;
483 ldf.fill f20=[r14],32
484 ldf.fill f21=[r15],32
485 mov b1=r22
486 ;;
487 ldf.fill f22=[r14],32
488 ldf.fill f23=[r15],32
489 mov b2=r23
490 ;;
491 mov ar.bspstore=r27
492 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
493 mov b3=r24
494 ;;
495 ldf.fill f24=[r14],32
496 ldf.fill f25=[r15],32
497 mov b4=r25
498 ;;
499 ldf.fill f26=[r14],32
500 ldf.fill f27=[r15],32
501 mov b5=r26
502 ;;
503 ldf.fill f28=[r14],32
504 ldf.fill f29=[r15],32
505 mov ar.pfs=r16
506 ;;
507 ldf.fill f30=[r14],32
508 ldf.fill f31=[r15],24
509 mov ar.lc=r17
510 ;;
511 ld8.fill r4=[r14],16
512 ld8.fill r5=[r15],16
513 mov pr=r28,-1
514 ;;
515 ld8.fill r6=[r14],16
516 ld8.fill r7=[r15],16
518 mov ar.unat=r18 // restore caller's unat
519 mov ar.rnat=r30 // must restore after bspstore but before rsc!
520 mov ar.fpsr=r19 // restore fpsr
521 mov ar.rsc=3 // put RSE back into eager mode, pl 0
522 br.cond.sptk.many b7
523 END(load_switch_stack)
525 #ifndef XEN
526 GLOBAL_ENTRY(execve)
527 mov r15=__NR_execve // put syscall number in place
528 break __BREAK_SYSCALL
529 br.ret.sptk.many rp
530 END(execve)
532 GLOBAL_ENTRY(clone)
533 mov r15=__NR_clone // put syscall number in place
534 break __BREAK_SYSCALL
535 br.ret.sptk.many rp
536 END(clone)
538 /*
539 * Invoke a system call, but do some tracing before and after the call.
540 * We MUST preserve the current register frame throughout this routine
541 * because some system calls (such as ia64_execve) directly
542 * manipulate ar.pfs.
543 */
544 GLOBAL_ENTRY(ia64_trace_syscall)
545 PT_REGS_UNWIND_INFO(0)
546 /*
547 * We need to preserve the scratch registers f6-f11 in case the system
548 * call is sigreturn.
549 */
550 adds r16=PT(F6)+16,sp
551 adds r17=PT(F7)+16,sp
552 ;;
553 stf.spill [r16]=f6,32
554 stf.spill [r17]=f7,32
555 ;;
556 stf.spill [r16]=f8,32
557 stf.spill [r17]=f9,32
558 ;;
559 stf.spill [r16]=f10
560 stf.spill [r17]=f11
561 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
562 adds r16=PT(F6)+16,sp
563 adds r17=PT(F7)+16,sp
564 ;;
565 ldf.fill f6=[r16],32
566 ldf.fill f7=[r17],32
567 ;;
568 ldf.fill f8=[r16],32
569 ldf.fill f9=[r17],32
570 ;;
571 ldf.fill f10=[r16]
572 ldf.fill f11=[r17]
573 // the syscall number may have changed, so re-load it and re-calculate the
574 // syscall entry-point:
575 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
576 ;;
577 ld8 r15=[r15]
578 mov r3=NR_syscalls - 1
579 ;;
580 adds r15=-1024,r15
581 movl r16=sys_call_table
582 ;;
583 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
584 cmp.leu p6,p7=r15,r3
585 ;;
586 (p6) ld8 r20=[r20] // load address of syscall entry point
587 (p7) movl r20=sys_ni_syscall
588 ;;
589 mov b6=r20
590 br.call.sptk.many rp=b6 // do the syscall
591 .strace_check_retval:
592 cmp.lt p6,p0=r8,r0 // syscall failed?
593 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
594 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
595 mov r10=0
596 (p6) br.cond.sptk strace_error // syscall failed ->
597 ;; // avoid RAW on r10
598 .strace_save_retval:
599 .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
600 .mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
601 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
602 .ret3: br.cond.sptk .work_pending_syscall_end
604 strace_error:
605 ld8 r3=[r2] // load pt_regs.r8
606 sub r9=0,r8 // negate return value to get errno value
607 ;;
608 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
609 adds r3=16,r2 // r3=&pt_regs.r10
610 ;;
611 (p6) mov r10=-1
612 (p6) mov r8=r9
613 br.cond.sptk .strace_save_retval
614 END(ia64_trace_syscall)
616 /*
617 * When traced and returning from sigreturn, we invoke syscall_trace but then
618 * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
619 */
620 GLOBAL_ENTRY(ia64_strace_leave_kernel)
621 PT_REGS_UNWIND_INFO(0)
622 { /*
623 * Some versions of gas generate bad unwind info if the first instruction of a
624 * procedure doesn't go into the first slot of a bundle. This is a workaround.
625 */
626 nop.m 0
627 nop.i 0
628 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
629 }
630 .ret4: br.cond.sptk ia64_leave_kernel
631 END(ia64_strace_leave_kernel)
632 #endif
634 GLOBAL_ENTRY(ia64_ret_from_clone)
635 PT_REGS_UNWIND_INFO(0)
636 { /*
637 * Some versions of gas generate bad unwind info if the first instruction of a
638 * procedure doesn't go into the first slot of a bundle. This is a workaround.
639 */
640 nop.m 0
641 nop.i 0
642 /*
643 * We need to call schedule_tail() to complete the scheduling process.
644 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
645 * address of the previously executing task.
646 */
647 br.call.sptk.many rp=ia64_invoke_schedule_tail
648 }
649 #ifdef XEN
650 // new domains are cloned but not exec'ed so switch to user mode here
651 cmp.ne pKStk,pUStk=r0,r0
652 adds r16 = IA64_VCPU_FLAGS_OFFSET, r13
653 ;;
654 ld8 r16 = [r16]
655 ;;
656 cmp.ne p6,p7 = r16, r0
657 (p6) br.cond.spnt ia64_leave_hypervisor /* VTi */
658 (p7) br.cond.spnt ia64_leave_kernel /* !VTi */
659 #else
660 .ret8:
661 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
662 ;;
663 ld4 r2=[r2]
664 ;;
665 mov r8=0
666 and r2=_TIF_SYSCALL_TRACEAUDIT,r2
667 ;;
668 cmp.ne p6,p0=r2,r0
669 (p6) br.cond.spnt .strace_check_retval
670 #endif
671 ;; // added stop bits to prevent r8 dependency
672 END(ia64_ret_from_clone)
673 // fall through
674 GLOBAL_ENTRY(ia64_ret_from_syscall)
675 PT_REGS_UNWIND_INFO(0)
676 cmp.ge p6,p7=r8,r0 // syscall executed successfully?
677 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
678 mov r10=r0 // clear error indication in r10
679 #ifndef XEN
680 (p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
681 #endif
682 END(ia64_ret_from_syscall)
683 // fall through
684 /*
685 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
686 * need to switch to bank 0 and doesn't restore the scratch registers.
687 * To avoid leaking kernel bits, the scratch registers are set to
688 * the following known-to-be-safe values:
689 *
690 * r1: restored (global pointer)
691 * r2: cleared
692 * r3: 1 (when returning to user-level)
693 * r8-r11: restored (syscall return value(s))
694 * r12: restored (user-level stack pointer)
695 * r13: restored (user-level thread pointer)
696 * r14: set to __kernel_syscall_via_epc
697 * r15: restored (syscall #)
698 * r16-r17: cleared
699 * r18: user-level b6
700 * r19: cleared
701 * r20: user-level ar.fpsr
702 * r21: user-level b0
703 * r22: cleared
704 * r23: user-level ar.bspstore
705 * r24: user-level ar.rnat
706 * r25: user-level ar.unat
707 * r26: user-level ar.pfs
708 * r27: user-level ar.rsc
709 * r28: user-level ip
710 * r29: user-level psr
711 * r30: user-level cfm
712 * r31: user-level pr
713 * f6-f11: cleared
714 * pr: restored (user-level pr)
715 * b0: restored (user-level rp)
716 * b6: restored
717 * b7: set to __kernel_syscall_via_epc
718 * ar.unat: restored (user-level ar.unat)
719 * ar.pfs: restored (user-level ar.pfs)
720 * ar.rsc: restored (user-level ar.rsc)
721 * ar.rnat: restored (user-level ar.rnat)
722 * ar.bspstore: restored (user-level ar.bspstore)
723 * ar.fpsr: restored (user-level ar.fpsr)
724 * ar.ccv: cleared
725 * ar.csd: cleared
726 * ar.ssd: cleared
727 */
728 ENTRY(ia64_leave_syscall)
729 PT_REGS_UNWIND_INFO(0)
730 /*
731 * work.need_resched etc. mustn't get changed by this CPU before it returns to
732 * user- or fsys-mode, hence we disable interrupts early on.
733 *
734 * p6 controls whether current_thread_info()->flags needs to be check for
735 * extra work. We always check for extra work when returning to user-level.
736 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
737 * is 0. After extra work processing has been completed, execution
738 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
739 * needs to be redone.
740 */
741 #ifdef CONFIG_PREEMPT
742 rsm psr.i // disable interrupts
743 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
744 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
745 ;;
746 .pred.rel.mutex pUStk,pKStk
747 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
748 (pUStk) mov r21=0 // r21 <- 0
749 ;;
750 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
751 #else /* !CONFIG_PREEMPT */
752 (pUStk) rsm psr.i
753 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
754 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
755 #endif
756 .work_processed_syscall:
757 adds r2=PT(LOADRS)+16,r12
758 adds r3=PT(AR_BSPSTORE)+16,r12
759 #ifdef XEN
760 ;;
761 #else
762 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
763 ;;
764 (p6) ld4 r31=[r18] // load current_thread_info()->flags
765 #endif
766 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
767 nop.i 0
768 ;;
769 #ifndef XEN
770 mov r16=ar.bsp // M2 get existing backing store pointer
771 #endif
772 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
773 #ifndef XEN
774 (p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
775 #endif
776 ;;
777 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
778 #ifndef XEN
779 (p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
780 (p6) br.cond.spnt .work_pending_syscall
781 #endif
782 ;;
783 // start restoring the state saved on the kernel stack (struct pt_regs):
784 ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
785 ld8 r11=[r3],PT(CR_IIP)-PT(R11)
786 (pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
787 ;;
788 invala // M0|1 invalidate ALAT
789 rsm psr.i | psr.ic // M2 turn off interrupts and interruption collection
790 #ifndef XEN
791 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
792 #endif
794 ld8 r29=[r2],16 // M0|1 load cr.ipsr
795 ld8 r28=[r3],16 // M0|1 load cr.iip
796 mov r22=r0 // A clear r22
797 ;;
798 ld8 r30=[r2],16 // M0|1 load cr.ifs
799 ld8 r25=[r3],16 // M0|1 load ar.unat
800 (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
801 ;;
802 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
803 (pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled
804 nop 0
805 ;;
806 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
807 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
808 mov f6=f0 // F clear f6
809 ;;
810 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
811 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
812 mov f7=f0 // F clear f7
813 ;;
814 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
815 ld8.fill r1=[r3],16 // M0|1 load r1
816 (pUStk) mov r17=1 // A
817 ;;
818 (pUStk) st1 [r14]=r17 // M2|3
819 ld8.fill r13=[r3],16 // M0|1
820 mov f8=f0 // F clear f8
821 ;;
822 ld8.fill r12=[r2] // M0|1 restore r12 (sp)
823 #ifdef XEN
824 ld8.fill r2=[r3] // M0|1
825 #else
826 ld8.fill r15=[r3] // M0|1 restore r15
827 #endif
828 mov b6=r18 // I0 restore b6
830 #ifdef XEN
831 movl r17=THIS_CPU(ia64_phys_stacked_size_p8) // A
832 #else
833 addl r17=THIS_CPU(ia64_phys_stacked_size_p8),r0 // A
834 #endif
835 mov f9=f0 // F clear f9
836 (pKStk) br.cond.dpnt.many skip_rbs_switch // B
838 srlz.d // M0 ensure interruption collection is off (for cover)
839 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
840 #ifndef XEN
841 cover // B add current frame into dirty partition & set cr.ifs
842 #endif
843 ;;
844 (pUStk) ld4 r17=[r17] // M0|1 r17 = cpu_data->phys_stacked_size_p8
845 mov r19=ar.bsp // M2 get new backing store pointer
846 mov f10=f0 // F clear f10
848 nop.m 0
849 #ifdef XEN
850 mov r14=r0
851 #else
852 movl r14=__kernel_syscall_via_epc // X
853 #endif
854 ;;
855 mov.m ar.csd=r0 // M2 clear ar.csd
856 mov.m ar.ccv=r0 // M2 clear ar.ccv
857 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
859 mov.m ar.ssd=r0 // M2 clear ar.ssd
860 mov f11=f0 // F clear f11
861 br.cond.sptk.many rbs_switch // B
862 END(ia64_leave_syscall)
864 #ifdef CONFIG_IA32_SUPPORT
865 GLOBAL_ENTRY(ia64_ret_from_ia32_execve)
866 PT_REGS_UNWIND_INFO(0)
867 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
868 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
869 ;;
870 .mem.offset 0,0
871 st8.spill [r2]=r8 // store return value in slot for r8 and set unat bit
872 .mem.offset 8,0
873 st8.spill [r3]=r0 // clear error indication in slot for r10 and set unat bit
874 END(ia64_ret_from_ia32_execve)
875 // fall through
876 #endif /* CONFIG_IA32_SUPPORT */
877 GLOBAL_ENTRY(ia64_leave_kernel)
878 PT_REGS_UNWIND_INFO(0)
879 /*
880 * work.need_resched etc. mustn't get changed by this CPU before it returns to
881 * user- or fsys-mode, hence we disable interrupts early on.
882 *
883 * p6 controls whether current_thread_info()->flags needs to be check for
884 * extra work. We always check for extra work when returning to user-level.
885 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
886 * is 0. After extra work processing has been completed, execution
887 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
888 * needs to be redone.
889 */
890 #ifdef CONFIG_PREEMPT
891 rsm psr.i // disable interrupts
892 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
893 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
894 ;;
895 .pred.rel.mutex pUStk,pKStk
896 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
897 (pUStk) mov r21=0 // r21 <- 0
898 ;;
899 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
900 #else
901 (pUStk) rsm psr.i
902 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
903 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
904 #endif
905 .work_processed_kernel:
906 #ifdef XEN
907 ;;
908 (pUStk) ssm psr.i
909 (pUStk) br.call.sptk.many b0=do_softirq
910 (pUStk) ssm psr.i
911 ;;
912 (pUStk) br.call.sptk.many b0=reflect_event
913 ;;
914 adds r7 = PT(EML_UNAT)+16,r12
915 ;;
916 ld8 r7 = [r7]
917 ;;
918 mov ar.unat=r7 /* load eml_unat */
919 mov r31=r0
921 #else
922 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
923 ;;
924 (p6) ld4 r31=[r17] // load current_thread_info()->flags
925 #endif
926 adds r21=PT(PR)+16,r12
927 ;;
929 lfetch [r21],PT(CR_IPSR)-PT(PR)
930 adds r2=PT(B6)+16,r12
931 adds r3=PT(R16)+16,r12
932 ;;
933 lfetch [r21]
934 ld8 r28=[r2],8 // load b6
935 adds r29=PT(R24)+16,r12
937 #ifdef XEN
938 ld8.fill r16=[r3]
939 adds r3=PT(AR_CSD)-PT(R16),r3
940 #else
941 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
942 #endif
943 adds r30=PT(AR_CCV)+16,r12
944 (p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
945 ;;
946 ld8.fill r24=[r29]
947 ld8 r15=[r30] // load ar.ccv
948 (p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
949 ;;
950 ld8 r29=[r2],16 // load b7
951 ld8 r30=[r3],16 // load ar.csd
952 #ifndef XEN
953 (p6) br.cond.spnt .work_pending
954 #endif
955 ;;
956 ld8 r31=[r2],16 // load ar.ssd
957 ld8.fill r8=[r3],16
958 ;;
959 ld8.fill r9=[r2],16
960 ld8.fill r10=[r3],PT(R17)-PT(R10)
961 ;;
962 ld8.fill r11=[r2],PT(R18)-PT(R11)
963 ld8.fill r17=[r3],16
964 ;;
965 ld8.fill r18=[r2],16
966 ld8.fill r19=[r3],16
967 ;;
968 ld8.fill r20=[r2],16
969 ld8.fill r21=[r3],16
970 mov ar.csd=r30
971 mov ar.ssd=r31
972 ;;
973 rsm psr.i | psr.ic // initiate turning off of interrupt and interruption collection
974 invala // invalidate ALAT
975 ;;
976 ld8.fill r22=[r2],24
977 ld8.fill r23=[r3],24
978 mov b6=r28
979 ;;
980 ld8.fill r25=[r2],16
981 ld8.fill r26=[r3],16
982 mov b7=r29
983 ;;
984 ld8.fill r27=[r2],16
985 ld8.fill r28=[r3],16
986 ;;
987 ld8.fill r29=[r2],16
988 ld8.fill r30=[r3],24
989 ;;
990 ld8.fill r31=[r2],PT(F9)-PT(R31)
991 adds r3=PT(F10)-PT(F6),r3
992 ;;
993 ldf.fill f9=[r2],PT(F6)-PT(F9)
994 ldf.fill f10=[r3],PT(F8)-PT(F10)
995 ;;
996 ldf.fill f6=[r2],PT(F7)-PT(F6)
997 ;;
998 ldf.fill f7=[r2],PT(F11)-PT(F7)
999 #ifdef XEN
1000 ldf.fill f8=[r3],PT(R5)-PT(F8)
1001 ;;
1002 ldf.fill f11=[r2],PT(R4)-PT(F11)
1003 mov ar.ccv=r15
1004 ;;
1005 ld8.fill r4=[r2],16
1006 ld8.fill r5=[r3],16
1007 ;;
1008 ld8.fill r6=[r2]
1009 ld8.fill r7=[r3]
1010 ;;
1011 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
1012 ;;
1013 bsw.0 // switch back to bank 0 (no stop bit required beforehand...)
1014 ;;
1015 #else
1016 ldf.fill f8=[r3],32
1017 ;;
1018 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
1019 mov ar.ccv=r15
1020 ;;
1021 ldf.fill f11=[r2]
1022 bsw.0 // switch back to bank 0 (no stop bit required beforehand...)
1023 ;;
1024 #endif
1025 #ifdef XEN
1026 (pUStk) movl r18=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
1027 (pUStk) ld8 r18=[r18]
1028 #else
1029 (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
1030 #endif
1031 adds r16=PT(CR_IPSR)+16,r12
1032 adds r17=PT(CR_IIP)+16,r12
1034 (pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled
1035 nop.i 0
1036 nop.i 0
1037 ;;
1038 ld8 r29=[r16],16 // load cr.ipsr
1039 ld8 r28=[r17],16 // load cr.iip
1040 ;;
1041 ld8 r30=[r16],16 // load cr.ifs
1042 ld8 r25=[r17],16 // load ar.unat
1043 ;;
1044 ld8 r26=[r16],16 // load ar.pfs
1045 ld8 r27=[r17],16 // load ar.rsc
1046 #ifndef XEN
1047 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
1048 #endif
1049 ;;
1050 ld8 r24=[r16],16 // load ar.rnat (may be garbage)
1051 ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
1052 ;;
1053 ld8 r31=[r16],16 // load predicates
1054 ld8 r21=[r17],16 // load b0
1055 ;;
1056 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
1057 ld8.fill r1=[r17],16 // load r1
1058 ;;
1059 ld8.fill r12=[r16],16
1060 ld8.fill r13=[r17],16
1061 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
1062 ;;
1063 ld8 r20=[r16],16 // ar.fpsr
1064 ld8.fill r15=[r17],16
1065 ;;
1066 ld8.fill r14=[r16],16
1067 ld8.fill r2=[r17]
1068 (pUStk) mov r17=1
1069 ;;
1070 ld8.fill r3=[r16]
1071 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1072 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1073 ;;
1074 mov r16=ar.bsp // get existing backing store pointer
1075 #ifdef XEN
1076 movl r17=THIS_CPU(ia64_phys_stacked_size_p8)
1077 #else
1078 addl r17=THIS_CPU(ia64_phys_stacked_size_p8),r0
1079 #endif
1080 ;;
1081 ld4 r17=[r17] // r17 = cpu_data->phys_stacked_size_p8
1082 (pKStk) br.cond.dpnt skip_rbs_switch
1084 /*
1085 * Restore user backing store.
1087 * NOTE: alloc, loadrs, and cover can't be predicated.
1088 */
1089 (pNonSys) br.cond.dpnt dont_preserve_current_frame
1090 cover // add current frame into dirty partition and set cr.ifs
1091 ;;
1092 mov r19=ar.bsp // get new backing store pointer
1093 rbs_switch:
1094 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1095 #ifndef XEN
1096 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
1097 #endif
1098 ;;
1099 sub r19=r19,r16 // calculate total byte size of dirty partition
1100 add r18=64,r18 // don't force in0-in7 into memory...
1101 ;;
1102 shl r19=r19,16 // shift size of dirty partition into loadrs position
1103 ;;
1104 dont_preserve_current_frame:
1105 /*
1106 * To prevent leaking bits between the kernel and user-space,
1107 * we must clear the stacked registers in the "invalid" partition here.
1108 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1109 * 5 registers/cycle on McKinley).
1110 */
1111 # define pRecurse p6
1112 # define pReturn p7
1113 #ifdef CONFIG_ITANIUM
1114 # define Nregs 10
1115 #else
1116 # define Nregs 14
1117 #endif
1118 alloc loc0=ar.pfs,2,Nregs-2,2,0
1119 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1120 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1121 ;;
1122 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1123 shladd in0=loc1,3,r17
1124 mov in1=0
1125 ;;
1126 TEXT_ALIGN(32)
1127 rse_clear_invalid:
1128 #ifdef CONFIG_ITANIUM
1129 // cycle 0
1130 { .mii
1131 alloc loc0=ar.pfs,2,Nregs-2,2,0
1132 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1133 add out0=-Nregs*8,in0
1134 }{ .mfb
1135 add out1=1,in1 // increment recursion count
1136 nop.f 0
1137 nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
1138 ;;
1139 }{ .mfi // cycle 1
1140 mov loc1=0
1141 nop.f 0
1142 mov loc2=0
1143 }{ .mib
1144 mov loc3=0
1145 mov loc4=0
1146 (pRecurse) br.call.sptk.many b0=rse_clear_invalid
1148 }{ .mfi // cycle 2
1149 mov loc5=0
1150 nop.f 0
1151 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1152 }{ .mib
1153 mov loc6=0
1154 mov loc7=0
1155 (pReturn) br.ret.sptk.many b0
1157 #else /* !CONFIG_ITANIUM */
1158 alloc loc0=ar.pfs,2,Nregs-2,2,0
1159 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1160 add out0=-Nregs*8,in0
1161 add out1=1,in1 // increment recursion count
1162 mov loc1=0
1163 mov loc2=0
1164 ;;
1165 mov loc3=0
1166 mov loc4=0
1167 mov loc5=0
1168 mov loc6=0
1169 mov loc7=0
1170 (pRecurse) br.call.dptk.few b0=rse_clear_invalid
1171 ;;
1172 mov loc8=0
1173 mov loc9=0
1174 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1175 mov loc10=0
1176 mov loc11=0
1177 (pReturn) br.ret.dptk.many b0
1178 #endif /* !CONFIG_ITANIUM */
1179 # undef pRecurse
1180 # undef pReturn
1181 ;;
1182 alloc r17=ar.pfs,0,0,0,0 // drop current register frame
1183 ;;
1184 loadrs
1185 ;;
1186 skip_rbs_switch:
1187 mov ar.unat=r25 // M2
1188 (pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1189 (pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
1190 ;;
1191 (pUStk) mov ar.bspstore=r23 // M2
1192 (pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
1193 (pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1194 ;;
1195 mov cr.ipsr=r29 // M2
1196 mov ar.pfs=r26 // I0
1197 (pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
1198 #ifdef XEN
1199 mov cr.ifs=r30 // M2
1200 #else
1201 (p9) mov cr.ifs=r30 // M2
1202 #endif
1203 mov b0=r21 // I0
1204 (pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
1206 mov ar.fpsr=r20 // M2
1207 mov cr.iip=r28 // M2
1208 nop 0
1209 ;;
1210 (pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
1211 nop 0
1212 #ifdef XEN
1213 (pLvSys)mov r15=r0
1214 #else
1215 (pLvSys)mov r2=r0
1216 #endif
1218 mov ar.rsc=r27 // M2
1219 mov pr=r31,-1 // I0
1220 rfi // B
1222 #ifndef XEN
1223 /*
1224 * On entry:
1225 * r20 = &current->thread_info->pre_count (if CONFIG_PREEMPT)
1226 * r31 = current->thread_info->flags
1227 * On exit:
1228 * p6 = TRUE if work-pending-check needs to be redone
1229 */
1230 .work_pending_syscall:
1231 add r2=-8,r2
1232 add r3=-8,r3
1233 ;;
1234 st8 [r2]=r8
1235 st8 [r3]=r10
1236 .work_pending:
1237 tbit.nz p6,p0=r31,TIF_SIGDELAYED // signal delayed from MCA/INIT/NMI/PMI context?
1238 (p6) br.cond.sptk.few .sigdelayed
1239 ;;
1240 tbit.z p6,p0=r31,TIF_NEED_RESCHED // current_thread_info()->need_resched==0?
1241 (p6) br.cond.sptk.few .notify
1242 #ifdef CONFIG_PREEMPT
1243 (pKStk) dep r21=-1,r0,PREEMPT_ACTIVE_BIT,1
1244 ;;
1245 (pKStk) st4 [r20]=r21
1246 ssm psr.i // enable interrupts
1247 #endif
1248 br.call.spnt.many rp=schedule
1249 .ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1
1250 rsm psr.i // disable interrupts
1251 ;;
1252 #ifdef CONFIG_PREEMPT
1253 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
1254 ;;
1255 (pKStk) st4 [r20]=r0 // preempt_count() <- 0
1256 #endif
1257 (pLvSys)br.cond.sptk.few .work_pending_syscall_end
1258 br.cond.sptk.many .work_processed_kernel // re-check
1260 .notify:
1261 (pUStk) br.call.spnt.many rp=notify_resume_user
1262 .ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0
1263 (pLvSys)br.cond.sptk.few .work_pending_syscall_end
1264 br.cond.sptk.many .work_processed_kernel // don't re-check
1266 // There is a delayed signal that was detected in MCA/INIT/NMI/PMI context where
1267 // it could not be delivered. Deliver it now. The signal might be for us and
1268 // may set TIF_SIGPENDING, so redrive ia64_leave_* after processing the delayed
1269 // signal.
1271 .sigdelayed:
1272 br.call.sptk.many rp=do_sigdelayed
1273 cmp.eq p6,p0=r0,r0 // p6 <- 1, always re-check
1274 (pLvSys)br.cond.sptk.few .work_pending_syscall_end
1275 br.cond.sptk.many .work_processed_kernel // re-check
1277 .work_pending_syscall_end:
1278 adds r2=PT(R8)+16,r12
1279 adds r3=PT(R10)+16,r12
1280 ;;
1281 ld8 r8=[r2]
1282 ld8 r10=[r3]
1283 br.cond.sptk.many .work_processed_syscall // re-check
1284 #endif
1286 END(ia64_leave_kernel)
1288 ENTRY(handle_syscall_error)
1289 /*
1290 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1291 * lead us to mistake a negative return value as a failed syscall. Those syscall
1292 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
1293 * pt_regs.r8 is zero, we assume that the call completed successfully.
1294 */
1295 PT_REGS_UNWIND_INFO(0)
1296 ld8 r3=[r2] // load pt_regs.r8
1297 ;;
1298 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
1299 ;;
1300 (p7) mov r10=-1
1301 (p7) sub r8=0,r8 // negate return value to get errno
1302 br.cond.sptk ia64_leave_syscall
1303 END(handle_syscall_error)
1305 /*
1306 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1307 * in case a system call gets restarted.
1308 */
1309 GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1310 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1311 alloc loc1=ar.pfs,8,2,1,0
1312 mov loc0=rp
1313 mov out0=r8 // Address of previous task
1314 ;;
1315 br.call.sptk.many rp=schedule_tail
1316 .ret11: mov ar.pfs=loc1
1317 mov rp=loc0
1318 br.ret.sptk.many rp
1319 END(ia64_invoke_schedule_tail)
1321 #ifndef XEN
1322 /*
1323 * Setup stack and call do_notify_resume_user(). Note that pSys and pNonSys need to
1324 * be set up by the caller. We declare 8 input registers so the system call
1325 * args get preserved, in case we need to restart a system call.
1326 */
1327 ENTRY(notify_resume_user)
1328 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1329 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1330 mov r9=ar.unat
1331 mov loc0=rp // save return address
1332 mov out0=0 // there is no "oldset"
1333 adds out1=8,sp // out1=&sigscratch->ar_pfs
1334 (pSys) mov out2=1 // out2==1 => we're in a syscall
1335 ;;
1336 (pNonSys) mov out2=0 // out2==0 => not a syscall
1337 .fframe 16
1338 .spillsp ar.unat, 16
1339 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1340 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1341 .body
1342 br.call.sptk.many rp=do_notify_resume_user
1343 .ret15: .restore sp
1344 adds sp=16,sp // pop scratch stack space
1345 ;;
1346 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
1347 mov rp=loc0
1348 ;;
1349 mov ar.unat=r9
1350 mov ar.pfs=loc1
1351 br.ret.sptk.many rp
1352 END(notify_resume_user)
1354 GLOBAL_ENTRY(sys_rt_sigsuspend)
1355 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1356 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1357 mov r9=ar.unat
1358 mov loc0=rp // save return address
1359 mov out0=in0 // mask
1360 mov out1=in1 // sigsetsize
1361 adds out2=8,sp // out2=&sigscratch->ar_pfs
1362 ;;
1363 .fframe 16
1364 .spillsp ar.unat, 16
1365 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1366 st8 [out2]=loc1,-8 // save ar.pfs, out2=&sigscratch
1367 .body
1368 br.call.sptk.many rp=ia64_rt_sigsuspend
1369 .ret17: .restore sp
1370 adds sp=16,sp // pop scratch stack space
1371 ;;
1372 ld8 r9=[sp] // load new unat from sw->caller_unat
1373 mov rp=loc0
1374 ;;
1375 mov ar.unat=r9
1376 mov ar.pfs=loc1
1377 br.ret.sptk.many rp
1378 END(sys_rt_sigsuspend)
1380 ENTRY(sys_rt_sigreturn)
1381 PT_REGS_UNWIND_INFO(0)
1382 /*
1383 * Allocate 8 input registers since ptrace() may clobber them
1384 */
1385 alloc r2=ar.pfs,8,0,1,0
1386 .prologue
1387 PT_REGS_SAVES(16)
1388 adds sp=-16,sp
1389 .body
1390 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
1391 ;;
1392 /*
1393 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1394 * syscall-entry path does not save them we save them here instead. Note: we
1395 * don't need to save any other registers that are not saved by the stream-lined
1396 * syscall path, because restore_sigcontext() restores them.
1397 */
1398 adds r16=PT(F6)+32,sp
1399 adds r17=PT(F7)+32,sp
1400 ;;
1401 stf.spill [r16]=f6,32
1402 stf.spill [r17]=f7,32
1403 ;;
1404 stf.spill [r16]=f8,32
1405 stf.spill [r17]=f9,32
1406 ;;
1407 stf.spill [r16]=f10
1408 stf.spill [r17]=f11
1409 adds out0=16,sp // out0 = &sigscratch
1410 br.call.sptk.many rp=ia64_rt_sigreturn
1411 .ret19: .restore sp,0
1412 adds sp=16,sp
1413 ;;
1414 ld8 r9=[sp] // load new ar.unat
1415 mov.sptk b7=r8,ia64_leave_kernel
1416 ;;
1417 mov ar.unat=r9
1418 br.many b7
1419 END(sys_rt_sigreturn)
1420 #endif
1422 GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1423 .prologue
1424 /*
1425 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1426 */
1427 mov r16=r0
1428 DO_SAVE_SWITCH_STACK
1429 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
1430 .ret21: .body
1431 DO_LOAD_SWITCH_STACK
1432 br.cond.sptk.many rp // goes to ia64_leave_kernel
1433 END(ia64_prepare_handle_unaligned)
1435 //
1436 // unw_init_running(void (*callback)(info, arg), void *arg)
1437 //
1438 # define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1440 GLOBAL_ENTRY(unw_init_running)
1441 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1442 alloc loc1=ar.pfs,2,3,3,0
1443 ;;
1444 ld8 loc2=[in0],8
1445 mov loc0=rp
1446 mov r16=loc1
1447 DO_SAVE_SWITCH_STACK
1448 .body
1450 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1451 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1452 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1453 adds sp=-EXTRA_FRAME_SIZE,sp
1454 .body
1455 ;;
1456 adds out0=16,sp // &info
1457 mov out1=r13 // current
1458 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
1459 br.call.sptk.many rp=unw_init_frame_info
1460 1: adds out0=16,sp // &info
1461 mov b6=loc2
1462 mov loc2=gp // save gp across indirect function call
1463 ;;
1464 ld8 gp=[in0]
1465 mov out1=in1 // arg
1466 br.call.sptk.many rp=b6 // invoke the callback function
1467 1: mov gp=loc2 // restore gp
1469 // For now, we don't allow changing registers from within
1470 // unw_init_running; if we ever want to allow that, we'd
1471 // have to do a load_switch_stack here:
1472 .restore sp
1473 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1475 mov ar.pfs=loc1
1476 mov rp=loc0
1477 br.ret.sptk.many rp
1478 END(unw_init_running)
1480 #ifdef XEN
1481 GLOBAL_ENTRY(ia64_do_multicall_call)
1482 movl r2=ia64_hypercall_table;;
1483 shladd r2=r38,3,r2;;
1484 ld8 r2=[r2];;
1485 mov b6=r2
1486 br.sptk.many b6;;
1487 END(ia64_do_multicall_call)
1490 .rodata
1491 .align 8
1492 .globl ia64_hypercall_table
1493 ia64_hypercall_table:
1494 data8 do_ni_hypercall /* do_set_trap_table *//* 0 */
1495 data8 do_ni_hypercall /* do_mmu_update */
1496 data8 do_ni_hypercall /* do_set_gdt */
1497 data8 do_ni_hypercall /* do_stack_switch */
1498 data8 do_ni_hypercall /* do_set_callbacks */
1499 data8 do_ni_hypercall /* do_fpu_taskswitch *//* 5 */
1500 data8 do_sched_op_compat
1501 data8 do_ni_hypercall
1502 data8 do_ni_hypercall /* do_set_debugreg */
1503 data8 do_ni_hypercall /* do_get_debugreg */
1504 data8 do_ni_hypercall /* do_update_descriptor * 10 */
1505 data8 do_ni_hypercall /* do_ni_hypercall */
1506 data8 do_memory_op
1507 data8 do_multicall
1508 data8 do_ni_hypercall /* do_update_va_mapping */
1509 data8 do_ni_hypercall /* do_set_timer_op */ /* 15 */
1510 data8 do_ni_hypercall
1511 data8 do_xen_version
1512 data8 do_console_io
1513 data8 do_ni_hypercall
1514 data8 do_grant_table_op /* 20 */
1515 data8 do_ni_hypercall /* do_vm_assist */
1516 data8 do_ni_hypercall /* do_update_va_mapping_othe */
1517 data8 do_ni_hypercall /* (x86 only) */
1518 data8 do_vcpu_op /* do_vcpu_op */
1519 data8 do_ni_hypercall /* (x86_64 only) */ /* 25 */
1520 data8 do_ni_hypercall /* do_mmuext_op */
1521 data8 do_ni_hypercall /* do_acm_op */
1522 data8 do_ni_hypercall /* do_nmi_op */
1523 data8 do_sched_op
1524 data8 do_callback_op /* */ /* 30 */
1525 data8 do_xenoprof_op /* */
1526 data8 do_event_channel_op
1527 data8 do_physdev_op
1528 data8 do_hvm_op /* */
1529 data8 do_sysctl /* */ /* 35 */
1530 data8 do_domctl /* */
1531 data8 do_kexec_op /* */
1532 data8 do_ni_hypercall /* */
1533 data8 do_ni_hypercall /* */
1534 data8 do_ni_hypercall /* */ /* 40 */
1535 data8 do_ni_hypercall /* */
1536 data8 do_ni_hypercall /* */
1537 data8 do_ni_hypercall /* */
1538 data8 do_ni_hypercall /* */
1539 data8 do_ni_hypercall /* */ /* 45 */
1540 data8 do_ni_hypercall /* */
1541 data8 do_ni_hypercall /* */
1542 data8 do_dom0vp_op /* dom0vp_op */
1543 data8 do_pirq_guest_eoi /* arch_1 */
1544 data8 do_ia64_debug_op /* arch_2 */ /* 50 */
1545 data8 do_ni_hypercall /* arch_3 */
1546 data8 do_ni_hypercall /* arch_4 */
1547 data8 do_ni_hypercall /* arch_5 */
1548 data8 do_ni_hypercall /* arch_6 */
1549 data8 do_ni_hypercall /* arch_7 */ /* 55 */
1550 data8 do_ni_hypercall
1551 data8 do_ni_hypercall
1552 data8 do_ni_hypercall
1553 data8 do_ni_hypercall
1554 data8 do_ni_hypercall /* 60 */
1555 data8 do_ni_hypercall
1556 data8 do_ni_hypercall
1557 data8 do_ni_hypercall
1559 // guard against failures to increase NR_hypercalls
1560 .org ia64_hypercall_table + 8*NR_hypercalls
1562 #else
1563 .rodata
1564 .align 8
1565 .globl sys_call_table
1566 sys_call_table:
1567 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
1568 data8 sys_exit // 1025
1569 data8 sys_read
1570 data8 sys_write
1571 data8 sys_open
1572 data8 sys_close
1573 data8 sys_creat // 1030
1574 data8 sys_link
1575 data8 sys_unlink
1576 data8 ia64_execve
1577 data8 sys_chdir
1578 data8 sys_fchdir // 1035
1579 data8 sys_utimes
1580 data8 sys_mknod
1581 data8 sys_chmod
1582 data8 sys_chown
1583 data8 sys_lseek // 1040
1584 data8 sys_getpid
1585 data8 sys_getppid
1586 data8 sys_mount
1587 data8 sys_umount
1588 data8 sys_setuid // 1045
1589 data8 sys_getuid
1590 data8 sys_geteuid
1591 data8 sys_ptrace
1592 data8 sys_access
1593 data8 sys_sync // 1050
1594 data8 sys_fsync
1595 data8 sys_fdatasync
1596 data8 sys_kill
1597 data8 sys_rename
1598 data8 sys_mkdir // 1055
1599 data8 sys_rmdir
1600 data8 sys_dup
1601 data8 sys_pipe
1602 data8 sys_times
1603 data8 ia64_brk // 1060
1604 data8 sys_setgid
1605 data8 sys_getgid
1606 data8 sys_getegid
1607 data8 sys_acct
1608 data8 sys_ioctl // 1065
1609 data8 sys_fcntl
1610 data8 sys_umask
1611 data8 sys_chroot
1612 data8 sys_ustat
1613 data8 sys_dup2 // 1070
1614 data8 sys_setreuid
1615 data8 sys_setregid
1616 data8 sys_getresuid
1617 data8 sys_setresuid
1618 data8 sys_getresgid // 1075
1619 data8 sys_setresgid
1620 data8 sys_getgroups
1621 data8 sys_setgroups
1622 data8 sys_getpgid
1623 data8 sys_setpgid // 1080
1624 data8 sys_setsid
1625 data8 sys_getsid
1626 data8 sys_sethostname
1627 data8 sys_setrlimit
1628 data8 sys_getrlimit // 1085
1629 data8 sys_getrusage
1630 data8 sys_gettimeofday
1631 data8 sys_settimeofday
1632 data8 sys_select
1633 data8 sys_poll // 1090
1634 data8 sys_symlink
1635 data8 sys_readlink
1636 data8 sys_uselib
1637 data8 sys_swapon
1638 data8 sys_swapoff // 1095
1639 data8 sys_reboot
1640 data8 sys_truncate
1641 data8 sys_ftruncate
1642 data8 sys_fchmod
1643 data8 sys_fchown // 1100
1644 data8 ia64_getpriority
1645 data8 sys_setpriority
1646 data8 sys_statfs
1647 data8 sys_fstatfs
1648 data8 sys_gettid // 1105
1649 data8 sys_semget
1650 data8 sys_semop
1651 data8 sys_semctl
1652 data8 sys_msgget
1653 data8 sys_msgsnd // 1110
1654 data8 sys_msgrcv
1655 data8 sys_msgctl
1656 data8 sys_shmget
1657 data8 sys_shmat
1658 data8 sys_shmdt // 1115
1659 data8 sys_shmctl
1660 data8 sys_syslog
1661 data8 sys_setitimer
1662 data8 sys_getitimer
1663 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
1664 data8 sys_ni_syscall /* was: ia64_oldlstat */
1665 data8 sys_ni_syscall /* was: ia64_oldfstat */
1666 data8 sys_vhangup
1667 data8 sys_lchown
1668 data8 sys_remap_file_pages // 1125
1669 data8 sys_wait4
1670 data8 sys_sysinfo
1671 data8 sys_clone
1672 data8 sys_setdomainname
1673 data8 sys_newuname // 1130
1674 data8 sys_adjtimex
1675 data8 sys_ni_syscall /* was: ia64_create_module */
1676 data8 sys_init_module
1677 data8 sys_delete_module
1678 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
1679 data8 sys_ni_syscall /* was: sys_query_module */
1680 data8 sys_quotactl
1681 data8 sys_bdflush
1682 data8 sys_sysfs
1683 data8 sys_personality // 1140
1684 data8 sys_ni_syscall // sys_afs_syscall
1685 data8 sys_setfsuid
1686 data8 sys_setfsgid
1687 data8 sys_getdents
1688 data8 sys_flock // 1145
1689 data8 sys_readv
1690 data8 sys_writev
1691 data8 sys_pread64
1692 data8 sys_pwrite64
1693 data8 sys_sysctl // 1150
1694 data8 sys_mmap
1695 data8 sys_munmap
1696 data8 sys_mlock
1697 data8 sys_mlockall
1698 data8 sys_mprotect // 1155
1699 data8 ia64_mremap
1700 data8 sys_msync
1701 data8 sys_munlock
1702 data8 sys_munlockall
1703 data8 sys_sched_getparam // 1160
1704 data8 sys_sched_setparam
1705 data8 sys_sched_getscheduler
1706 data8 sys_sched_setscheduler
1707 data8 sys_sched_yield
1708 data8 sys_sched_get_priority_max // 1165
1709 data8 sys_sched_get_priority_min
1710 data8 sys_sched_rr_get_interval
1711 data8 sys_nanosleep
1712 data8 sys_nfsservctl
1713 data8 sys_prctl // 1170
1714 data8 sys_getpagesize
1715 data8 sys_mmap2
1716 data8 sys_pciconfig_read
1717 data8 sys_pciconfig_write
1718 data8 sys_perfmonctl // 1175
1719 data8 sys_sigaltstack
1720 data8 sys_rt_sigaction
1721 data8 sys_rt_sigpending
1722 data8 sys_rt_sigprocmask
1723 data8 sys_rt_sigqueueinfo // 1180
1724 data8 sys_rt_sigreturn
1725 data8 sys_rt_sigsuspend
1726 data8 sys_rt_sigtimedwait
1727 data8 sys_getcwd
1728 data8 sys_capget // 1185
1729 data8 sys_capset
1730 data8 sys_sendfile64
1731 data8 sys_ni_syscall // sys_getpmsg (STREAMS)
1732 data8 sys_ni_syscall // sys_putpmsg (STREAMS)
1733 data8 sys_socket // 1190
1734 data8 sys_bind
1735 data8 sys_connect
1736 data8 sys_listen
1737 data8 sys_accept
1738 data8 sys_getsockname // 1195
1739 data8 sys_getpeername
1740 data8 sys_socketpair
1741 data8 sys_send
1742 data8 sys_sendto
1743 data8 sys_recv // 1200
1744 data8 sys_recvfrom
1745 data8 sys_shutdown
1746 data8 sys_setsockopt
1747 data8 sys_getsockopt
1748 data8 sys_sendmsg // 1205
1749 data8 sys_recvmsg
1750 data8 sys_pivot_root
1751 data8 sys_mincore
1752 data8 sys_madvise
1753 data8 sys_newstat // 1210
1754 data8 sys_newlstat
1755 data8 sys_newfstat
1756 data8 sys_clone2
1757 data8 sys_getdents64
1758 data8 sys_getunwind // 1215
1759 data8 sys_readahead
1760 data8 sys_setxattr
1761 data8 sys_lsetxattr
1762 data8 sys_fsetxattr
1763 data8 sys_getxattr // 1220
1764 data8 sys_lgetxattr
1765 data8 sys_fgetxattr
1766 data8 sys_listxattr
1767 data8 sys_llistxattr
1768 data8 sys_flistxattr // 1225
1769 data8 sys_removexattr
1770 data8 sys_lremovexattr
1771 data8 sys_fremovexattr
1772 data8 sys_tkill
1773 data8 sys_futex // 1230
1774 data8 sys_sched_setaffinity
1775 data8 sys_sched_getaffinity
1776 data8 sys_set_tid_address
1777 data8 sys_fadvise64_64
1778 data8 sys_tgkill // 1235
1779 data8 sys_exit_group
1780 data8 sys_lookup_dcookie
1781 data8 sys_io_setup
1782 data8 sys_io_destroy
1783 data8 sys_io_getevents // 1240
1784 data8 sys_io_submit
1785 data8 sys_io_cancel
1786 data8 sys_epoll_create
1787 data8 sys_epoll_ctl
1788 data8 sys_epoll_wait // 1245
1789 data8 sys_restart_syscall
1790 data8 sys_semtimedop
1791 data8 sys_timer_create
1792 data8 sys_timer_settime
1793 data8 sys_timer_gettime // 1250
1794 data8 sys_timer_getoverrun
1795 data8 sys_timer_delete
1796 data8 sys_clock_settime
1797 data8 sys_clock_gettime
1798 data8 sys_clock_getres // 1255
1799 data8 sys_clock_nanosleep
1800 data8 sys_fstatfs64
1801 data8 sys_statfs64
1802 data8 sys_mbind
1803 data8 sys_get_mempolicy // 1260
1804 data8 sys_set_mempolicy
1805 data8 sys_mq_open
1806 data8 sys_mq_unlink
1807 data8 sys_mq_timedsend
1808 data8 sys_mq_timedreceive // 1265
1809 data8 sys_mq_notify
1810 data8 sys_mq_getsetattr
1811 data8 sys_ni_syscall // reserved for kexec_load
1812 data8 sys_ni_syscall // reserved for vserver
1813 data8 sys_waitid // 1270
1814 data8 sys_add_key
1815 data8 sys_request_key
1816 data8 sys_keyctl
1817 data8 sys_ioprio_set
1818 data8 sys_ioprio_get // 1275
1819 data8 sys_ni_syscall
1820 data8 sys_inotify_init
1821 data8 sys_inotify_add_watch
1822 data8 sys_inotify_rm_watch
1824 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1825 #endif