ia64/xen-unstable

view xen/include/asm-x86/mach-generic/mach_apic.h @ 15812:86a154e1ef5d

[HVM] Shadow: don't shadow the p2m table.
For HVM vcpus with paging disabled, we used to shadow the p2m table,
and skip the p2m lookup to go from gfn to mfn. Instead, we now
provide a simple pagetable that gives a one-to-one mapping of 4GB, and
shadow that, making the translations from gfn to mfn via the p2m.
This removes the paging-disabled special-case code from the shadow
fault handler, and allows us to expand the p2m interface, since all HVM
translations now go through the same p2m lookups.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
author Tim Deegan <Tim.Deegan@xensource.com>
date Fri Aug 31 11:06:22 2007 +0100 (2007-08-31)
parents fa9fa5f98c91
children f13ff27fa0d1
line source
1 #ifndef __ASM_MACH_APIC_H
2 #define __ASM_MACH_APIC_H
4 #include <asm/genapic.h>
5 #include <asm/smp.h>
7 /* ESR was originally disabled in Linux for NUMA-Q. Do we really need to? */
8 #define esr_disable (0)
10 /* The following are dependent on APIC delivery mode (logical vs. physical). */
11 #define INT_DELIVERY_MODE (genapic->int_delivery_mode)
12 #define INT_DEST_MODE (genapic->int_dest_mode)
13 #define TARGET_CPUS (genapic->target_cpus())
14 #define init_apic_ldr (genapic->init_apic_ldr)
15 #define clustered_apic_check (genapic->clustered_apic_check)
16 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
18 static inline void enable_apic_mode(void)
19 {
20 /* Not needed for modern ES7000 which boot in Virtual Wire mode. */
21 /*es7000_sw_apic();*/
22 }
24 #define apicid_to_node(apicid) ((int)apicid_to_node[(u8)apicid])
26 extern u8 bios_cpu_apicid[];
27 static inline int cpu_present_to_apicid(int mps_cpu)
28 {
29 if (mps_cpu < NR_CPUS)
30 return (int)bios_cpu_apicid[mps_cpu];
31 else
32 return BAD_APICID;
33 }
35 static inline int mpc_apic_id(struct mpc_config_processor *m,
36 struct mpc_config_translation *translation_record)
37 {
38 printk("Processor #%d %d:%d APIC version %d\n",
39 m->mpc_apicid,
40 (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
41 (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
42 m->mpc_apicver);
43 return (m->mpc_apicid);
44 }
46 static inline void setup_portio_remap(void)
47 {
48 }
50 static inline int multi_timer_check(int apic, int irq)
51 {
52 return 0;
53 }
55 extern void generic_bigsmp_probe(void);
57 /*
58 * The following functions based around phys_cpu_present_map are disabled in
59 * some i386 Linux subarchitectures, and in x86_64 'cluster' genapic mode. I'm
60 * really not sure why, since all local APICs should have distinct physical
61 * IDs, and we need to know what they are.
62 */
63 static inline int apic_id_registered(void)
64 {
65 return physid_isset(GET_APIC_ID(apic_read(APIC_ID)),
66 phys_cpu_present_map);
67 }
69 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
70 {
71 return phys_map;
72 }
74 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
75 {
76 return physid_isset(apicid, bitmap);
77 }
79 static inline unsigned long check_apicid_present(int apicid)
80 {
81 return physid_isset(apicid, phys_cpu_present_map);
82 }
84 static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
85 {
86 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
87 }
89 static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
90 {
91 return physid_mask_of_physid(phys_apicid);
92 }
94 #endif /* __ASM_MACH_APIC_H */