ia64/xen-unstable

view xen/include/asm-x86/ldt.h @ 15812:86a154e1ef5d

[HVM] Shadow: don't shadow the p2m table.
For HVM vcpus with paging disabled, we used to shadow the p2m table,
and skip the p2m lookup to go from gfn to mfn. Instead, we now
provide a simple pagetable that gives a one-to-one mapping of 4GB, and
shadow that, making the translations from gfn to mfn via the p2m.
This removes the paging-disabled special-case code from the shadow
fault handler, and allows us to expand the p2m interface, since all HVM
translations now go through the same p2m lookups.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
author Tim Deegan <Tim.Deegan@xensource.com>
date Fri Aug 31 11:06:22 2007 +0100 (2007-08-31)
parents 405573aedd24
children 7f1a36b834e1
line source
2 #ifndef __ARCH_LDT_H
3 #define __ARCH_LDT_H
5 #ifndef __ASSEMBLY__
7 static inline void load_LDT(struct vcpu *v)
8 {
9 unsigned int cpu;
10 struct desc_struct *desc;
11 unsigned long ents;
13 if ( (ents = v->arch.guest_context.ldt_ents) == 0 )
14 {
15 __asm__ __volatile__ ( "lldt %%ax" : : "a" (0) );
16 }
17 else
18 {
19 cpu = smp_processor_id();
20 desc = (!is_pv_32on64_vcpu(v) ? gdt_table : compat_gdt_table)
21 + __LDT(cpu) - FIRST_RESERVED_GDT_ENTRY;
22 _set_tssldt_desc(desc, LDT_VIRT_START(v), ents*8-1, 2);
23 __asm__ __volatile__ ( "lldt %%ax" : : "a" (__LDT(cpu)<<3) );
24 }
25 }
27 #endif /* !__ASSEMBLY__ */
29 #endif
31 /*
32 * Local variables:
33 * mode: C
34 * c-set-style: "BSD"
35 * c-basic-offset: 4
36 * tab-width: 4
37 * indent-tabs-mode: nil
38 * End:
39 */