ia64/xen-unstable

view xen/include/asm-x86/byteorder.h @ 15812:86a154e1ef5d

[HVM] Shadow: don't shadow the p2m table.
For HVM vcpus with paging disabled, we used to shadow the p2m table,
and skip the p2m lookup to go from gfn to mfn. Instead, we now
provide a simple pagetable that gives a one-to-one mapping of 4GB, and
shadow that, making the translations from gfn to mfn via the p2m.
This removes the paging-disabled special-case code from the shadow
fault handler, and allows us to expand the p2m interface, since all HVM
translations now go through the same p2m lookups.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
author Tim Deegan <Tim.Deegan@xensource.com>
date Fri Aug 31 11:06:22 2007 +0100 (2007-08-31)
parents fe76b80d081a
children 5ccf8bbf8628
line source
1 #ifndef __ASM_X86_BYTEORDER_H__
2 #define __ASM_X86_BYTEORDER_H__
4 #include <asm/types.h>
5 #include <xen/compiler.h>
7 static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
8 {
9 asm("bswap %0" : "=r" (x) : "0" (x));
10 return x;
11 }
13 static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
14 {
15 union {
16 struct { __u32 a,b; } s;
17 __u64 u;
18 } v;
19 v.u = val;
20 asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
21 : "=r" (v.s.a), "=r" (v.s.b)
22 : "0" (v.s.a), "1" (v.s.b));
23 return v.u;
24 }
26 /* Do not define swab16. Gcc is smart enough to recognize "C" version and
27 convert it into rotation or exhange. */
29 #define __arch__swab64(x) ___arch__swab64(x)
30 #define __arch__swab32(x) ___arch__swab32(x)
32 #define __BYTEORDER_HAS_U64__
34 #include <xen/byteorder/little_endian.h>
36 #endif /* __ASM_X86_BYTEORDER_H__ */