ia64/xen-unstable

view xen/include/asm-ia64/vmx_vpd.h @ 6538:84ee014ebd41

Merge xen-vtx-unstable.hg
author adsharma@los-vmm.sc.intel.com
date Wed Aug 17 12:34:38 2005 -0800 (2005-08-17)
parents 23979fb12c49 f294acb25858
children 99914b54f7bf
line source
1 /* -*- Mode:C; c-basic-offset:4; tab-width:4; indent-tabs-mode:nil -*- */
2 /*
3 * vmx.h: prototype for generial vmx related interface
4 * Copyright (c) 2004, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
17 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 *
19 * Kun Tian (Kevin Tian) (kevin.tian@intel.com)
20 */
22 #ifndef _ASM_IA64_VMX_VPD_H_
23 #define _ASM_IA64_VMX_VPD_H_
25 #ifndef __ASSEMBLY__
27 #include <asm/vtm.h>
28 #include <public/arch-ia64.h>
30 #define VPD_SHIFT 17 /* 128K requirement */
31 #define VPD_SIZE (1 << VPD_SHIFT)
33 typedef struct {
34 unsigned long dcr; // CR0
35 unsigned long itm;
36 unsigned long iva;
37 unsigned long rsv1[5];
38 unsigned long pta; // CR8
39 unsigned long rsv2[7];
40 unsigned long ipsr; // CR16
41 unsigned long isr;
42 unsigned long rsv3;
43 unsigned long iip;
44 unsigned long ifa;
45 unsigned long itir;
46 unsigned long iipa;
47 unsigned long ifs;
48 unsigned long iim; // CR24
49 unsigned long iha;
50 unsigned long rsv4[38];
51 unsigned long lid; // CR64
52 unsigned long ivr;
53 unsigned long tpr;
54 unsigned long eoi;
55 unsigned long irr[4];
56 unsigned long itv; // CR72
57 unsigned long pmv;
58 unsigned long cmcv;
59 unsigned long rsv5[5];
60 unsigned long lrr0; // CR80
61 unsigned long lrr1;
62 unsigned long rsv6[46];
63 } cr_t;
65 void vmx_enter_scheduler(void);
67 //FIXME: Map for LID to vcpu, Eddie
68 #define MAX_NUM_LPS (1UL<<16)
69 extern struct vcpu *lid_edt[MAX_NUM_LPS];
71 struct arch_vmx_struct {
72 // struct virutal_platform_def vmx_platform;
73 vpd_t *vpd;
74 vtime_t vtm;
75 unsigned long vrr[8];
76 unsigned long vkr[8];
77 unsigned long mrr5;
78 unsigned long mrr6;
79 unsigned long mrr7;
80 unsigned long mpta;
81 unsigned long rfi_pfs;
82 unsigned long rfi_iip;
83 unsigned long rfi_ipsr;
84 unsigned long rfi_ifs;
85 unsigned long in_service[4]; // vLsapic inservice IRQ bits
86 unsigned long flags;
87 };
89 #define vmx_schedule_tail(next) \
90 (next)->thread.arch_vmx.arch_vmx_schedule_tail((next))
92 #define VMX_DOMAIN(d) d->arch.arch_vmx.flags
94 #define ARCH_VMX_VMCS_LOADED 0 /* VMCS has been loaded and active */
95 #define ARCH_VMX_VMCS_LAUNCH 1 /* Needs VMCS launch */
96 #define ARCH_VMX_VMCS_RESUME 2 /* Needs VMCS resume */
97 #define ARCH_VMX_IO_WAIT 3 /* Waiting for I/O completion */
98 #define ARCH_VMX_INTR_ASSIST 4 /* Need DM's assist to issue intr */
101 #define VMX_DEBUG 1
102 #if VMX_DEBUG
103 #define DBG_LEVEL_0 (1 << 0)
104 #define DBG_LEVEL_1 (1 << 1)
105 #define DBG_LEVEL_2 (1 << 2)
106 #define DBG_LEVEL_3 (1 << 3)
107 #define DBG_LEVEL_IO (1 << 4)
108 #define DBG_LEVEL_VMMU (1 << 5)
110 extern unsigned int opt_vmx_debug_level;
111 #define VMX_DBG_LOG(level, _f, _a...) \
112 if ((level) & opt_vmx_debug_level) \
113 printk("[VMX]" _f "\n", ## _a )
114 #else
115 #define VMX_DBG_LOG(level, _f, _a...)
116 #endif
118 #define __vmx_bug(regs) \
119 do { \
120 printk("__vmx_bug at %s:%d\n", __FILE__, __LINE__); \
121 show_registers(regs); \
122 domain_crash(); \
123 } while (0)
125 #endif //__ASSEMBLY__
127 // VPD field offset
128 #define VPD_VAC_START_OFFSET 0
129 #define VPD_VDC_START_OFFSET 8
130 #define VPD_VHPI_START_OFFSET 256
131 #define VPD_VGR_START_OFFSET 1024
132 #define VPD_VBGR_START_OFFSET 1152
133 #define VPD_VNAT_START_OFFSET 1280
134 #define VPD_VBNAT_START_OFFSET 1288
135 #define VPD_VCPUID_START_OFFSET 1296
136 #define VPD_VPSR_START_OFFSET 1424
137 #define VPD_VPR_START_OFFSET 1432
138 #define VPD_VRSE_CFLE_START_OFFSET 1440
139 #define VPD_VCR_START_OFFSET 2048
140 #define VPD_VRR_START_OFFSET 3072
141 #define VPD_VMM_VAIL_START_OFFSET 31744
144 #endif /* _ASM_IA64_VMX_VPD_H_ */