ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-xen/asm-x86_64/io.h @ 6538:84ee014ebd41

Merge xen-vtx-unstable.hg
author adsharma@los-vmm.sc.intel.com
date Wed Aug 17 12:34:38 2005 -0800 (2005-08-17)
parents 23979fb12c49 f294acb25858
children 99914b54f7bf
line source
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
4 #include <linux/config.h>
5 #include <asm/fixmap.h>
6 /*
7 * This file contains the definitions for the x86 IO instructions
8 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
9 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
10 * versions of the single-IO instructions (inb_p/inw_p/..).
11 *
12 * This file is not meant to be obfuscating: it's just complicated
13 * to (a) handle it all in a way that makes gcc able to optimize it
14 * as well as possible and (b) trying to avoid writing the same thing
15 * over and over again with slight variations and possibly making a
16 * mistake somewhere.
17 */
19 /*
20 * Thanks to James van Artsdalen for a better timing-fix than
21 * the two short jumps: using outb's to a nonexistent port seems
22 * to guarantee better timings even on fast machines.
23 *
24 * On the other hand, I'd like to be sure of a non-existent port:
25 * I feel a bit unsafe about using 0x80 (should be safe, though)
26 *
27 * Linus
28 */
30 /*
31 * Bit simplified and optimized by Jan Hubicka
32 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
33 *
34 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
35 * isa_read[wl] and isa_write[wl] fixed
36 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
37 */
39 #define __SLOW_DOWN_IO "\noutb %%al,$0x80"
41 #ifdef REALLY_SLOW_IO
42 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
43 #else
44 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO
45 #endif
47 /*
48 * Talk about misusing macros..
49 */
50 #define __OUT1(s,x) \
51 extern inline void out##s(unsigned x value, unsigned short port) {
53 #define __OUT2(s,s1,s2) \
54 __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
56 #define __OUT(s,s1,x) \
57 __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
58 __OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} \
60 #define __IN1(s) \
61 extern inline RETURN_TYPE in##s(unsigned short port) { RETURN_TYPE _v;
63 #define __IN2(s,s1,s2) \
64 __asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
66 #define __IN(s,s1,i...) \
67 __IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
68 __IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
70 #define __INS(s) \
71 extern inline void ins##s(unsigned short port, void * addr, unsigned long count) \
72 { __asm__ __volatile__ ("rep ; ins" #s \
73 : "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
75 #define __OUTS(s) \
76 extern inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
77 { __asm__ __volatile__ ("rep ; outs" #s \
78 : "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
80 #define RETURN_TYPE unsigned char
81 __IN(b,"")
82 #undef RETURN_TYPE
83 #define RETURN_TYPE unsigned short
84 __IN(w,"")
85 #undef RETURN_TYPE
86 #define RETURN_TYPE unsigned int
87 __IN(l,"")
88 #undef RETURN_TYPE
90 __OUT(b,"b",char)
91 __OUT(w,"w",short)
92 __OUT(l,,int)
94 __INS(b)
95 __INS(w)
96 __INS(l)
98 __OUTS(b)
99 __OUTS(w)
100 __OUTS(l)
102 #define IO_SPACE_LIMIT 0xffff
104 #if defined(__KERNEL__) && __x86_64__
106 #include <linux/vmalloc.h>
108 #ifndef __i386__
109 /*
110 * Change virtual addresses to physical addresses and vv.
111 * These are pretty trivial
112 */
113 extern inline unsigned long virt_to_phys(volatile void * address)
114 {
115 return __pa(address);
116 }
118 extern inline void * phys_to_virt(unsigned long address)
119 {
120 return __va(address);
121 }
124 #define virt_to_bus(_x) phys_to_machine(__pa(_x))
125 #define bus_to_virt(_x) __va(machine_to_phys(_x))
126 #endif
128 /*
129 * Change "struct page" to physical address.
130 */
131 #ifdef CONFIG_DISCONTIGMEM
132 #include <asm/mmzone.h>
133 #define page_to_pseudophys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
134 #define page_to_phys(page) (phys_to_machine(page_to_pseudophys(page)))
136 #define bio_to_pseudophys(bio) (page_to_pseudophys(bio_page((bio))) + \
137 (unsigned long) bio_offset((bio)))
138 #define bvec_to_pseudophys(bv) (page_to_pseudophys((bv)->bv_page) + \
139 (unsigned long) (bv)->bv_offset)
141 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
142 (((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2))) && \
143 ((bvec_to_pseudophys((vec1)) + (vec1)->bv_len) == \
144 bvec_to_pseudophys((vec2))))
145 #else
146 // #define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
147 #define page_to_pseudophys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
148 #define page_to_phys(page) (phys_to_machine(page_to_pseudophys(page)))
150 #define bio_to_pseudophys(bio) (page_to_pseudophys(bio_page((bio))) + \
151 (unsigned long) bio_offset((bio)))
152 #define bvec_to_pseudophys(bv) (page_to_pseudophys((bv)->bv_page) + \
153 (unsigned long) (bv)->bv_offset)
155 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
156 (((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2))) && \
157 ((bvec_to_pseudophys((vec1)) + (vec1)->bv_len) == \
158 bvec_to_pseudophys((vec2))))
159 #endif
161 #include <asm-generic/iomap.h>
163 extern void __iomem *__ioremap(unsigned long offset, unsigned long size, unsigned long flags);
165 extern inline void __iomem * ioremap (unsigned long offset, unsigned long size)
166 {
167 return __ioremap(offset, size, 0);
168 }
170 /*
171 * This one maps high address device memory and turns off caching for that area.
172 * it's useful if some control registers are in such an area and write combining
173 * or read caching is not desirable:
174 */
175 extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size);
176 extern void iounmap(volatile void __iomem *addr);
178 /*
179 * ISA I/O bus memory addresses are 1:1 with the physical address.
180 */
182 #define isa_virt_to_bus(_x) isa_virt_to_bus_is_UNSUPPORTED->x
183 #define isa_page_to_bus(_x) isa_page_to_bus_is_UNSUPPORTED->x
184 #ifdef CONFIG_XEN_PHYSDEV_ACCESS
185 #define isa_bus_to_virt(_x) (void *)(__fix_to_virt(FIX_ISAMAP_BEGIN) + (_x))
186 #else
187 #define isa_bus_to_virt(_x) isa_bus_to_virt_needs_PRIVILEGED_BUILD
188 #endif
189 /*
190 * However PCI ones are not necessarily 1:1 and therefore these interfaces
191 * are forbidden in portable PCI drivers.
192 *
193 * Allow them on x86 for legacy drivers, though.
194 */
195 #define virt_to_bus(_x) phys_to_machine(__pa(_x))
196 #define bus_to_virt(_x) __va(machine_to_phys(_x))
198 /*
199 * readX/writeX() are used to access memory mapped devices. On some
200 * architectures the memory mapped IO stuff needs to be accessed
201 * differently. On the x86 architecture, we just read/write the
202 * memory location directly.
203 */
205 static inline __u8 __readb(const volatile void __iomem *addr)
206 {
207 return *(__force volatile __u8 *)addr;
208 }
209 static inline __u16 __readw(const volatile void __iomem *addr)
210 {
211 return *(__force volatile __u16 *)addr;
212 }
213 static inline __u32 __readl(const volatile void __iomem *addr)
214 {
215 return *(__force volatile __u32 *)addr;
216 }
217 static inline __u64 __readq(const volatile void __iomem *addr)
218 {
219 return *(__force volatile __u64 *)addr;
220 }
221 #define readb(x) __readb(x)
222 #define readw(x) __readw(x)
223 #define readl(x) __readl(x)
224 #define readq(x) __readq(x)
225 #define readb_relaxed(a) readb(a)
226 #define readw_relaxed(a) readw(a)
227 #define readl_relaxed(a) readl(a)
228 #define readq_relaxed(a) readq(a)
229 #define __raw_readb readb
230 #define __raw_readw readw
231 #define __raw_readl readl
232 #define __raw_readq readq
234 #define mmiowb()
236 #ifdef CONFIG_UNORDERED_IO
237 static inline void __writel(__u32 val, volatile void __iomem *addr)
238 {
239 volatile __u32 __iomem *target = addr;
240 asm volatile("movnti %1,%0"
241 : "=m" (*target)
242 : "r" (val) : "memory");
243 }
245 static inline void __writeq(__u64 val, volatile void __iomem *addr)
246 {
247 volatile __u64 __iomem *target = addr;
248 asm volatile("movnti %1,%0"
249 : "=m" (*target)
250 : "r" (val) : "memory");
251 }
252 #else
253 static inline void __writel(__u32 b, volatile void __iomem *addr)
254 {
255 *(__force volatile __u32 *)addr = b;
256 }
257 static inline void __writeq(__u64 b, volatile void __iomem *addr)
258 {
259 *(__force volatile __u64 *)addr = b;
260 }
261 #endif
262 static inline void __writeb(__u8 b, volatile void __iomem *addr)
263 {
264 *(__force volatile __u8 *)addr = b;
265 }
266 static inline void __writew(__u16 b, volatile void __iomem *addr)
267 {
268 *(__force volatile __u16 *)addr = b;
269 }
270 #define writeq(val,addr) __writeq((val),(addr))
271 #define writel(val,addr) __writel((val),(addr))
272 #define writew(val,addr) __writew((val),(addr))
273 #define writeb(val,addr) __writeb((val),(addr))
274 #define __raw_writeb writeb
275 #define __raw_writew writew
276 #define __raw_writel writel
277 #define __raw_writeq writeq
279 void __memcpy_fromio(void*,unsigned long,unsigned);
280 void __memcpy_toio(unsigned long,const void*,unsigned);
282 static inline void memcpy_fromio(void *to, const volatile void __iomem *from, unsigned len)
283 {
284 __memcpy_fromio(to,(unsigned long)from,len);
285 }
286 static inline void memcpy_toio(volatile void __iomem *to, const void *from, unsigned len)
287 {
288 __memcpy_toio((unsigned long)to,from,len);
289 }
291 void memset_io(volatile void __iomem *a, int b, size_t c);
293 /*
294 * ISA space is 'always mapped' on a typical x86 system, no need to
295 * explicitly ioremap() it. The fact that the ISA IO space is mapped
296 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
297 * are physical addresses. The following constant pointer can be
298 * used as the IO-area pointer (it can be iounmapped as well, so the
299 * analogy with PCI is quite large):
300 */
301 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
303 #define isa_readb(a) readb(__ISA_IO_base + (a))
304 #define isa_readw(a) readw(__ISA_IO_base + (a))
305 #define isa_readl(a) readl(__ISA_IO_base + (a))
306 #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
307 #define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
308 #define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
309 #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
310 #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
311 #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
314 /*
315 * Again, x86-64 does not require mem IO specific function.
316 */
318 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(b),(c),(d))
319 #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(__ISA_IO_base + (b)),(c),(d))
321 /**
322 * check_signature - find BIOS signatures
323 * @io_addr: mmio address to check
324 * @signature: signature block
325 * @length: length of signature
326 *
327 * Perform a signature comparison with the mmio address io_addr. This
328 * address should have been obtained by ioremap.
329 * Returns 1 on a match.
330 */
332 static inline int check_signature(void __iomem *io_addr,
333 const unsigned char *signature, int length)
334 {
335 int retval = 0;
336 do {
337 if (readb(io_addr) != *signature)
338 goto out;
339 io_addr++;
340 signature++;
341 length--;
342 } while (length);
343 retval = 1;
344 out:
345 return retval;
346 }
348 /* Nothing to do */
350 #define dma_cache_inv(_start,_size) do { } while (0)
351 #define dma_cache_wback(_start,_size) do { } while (0)
352 #define dma_cache_wback_inv(_start,_size) do { } while (0)
354 #define flush_write_buffers()
356 extern int iommu_bio_merge;
357 #define BIO_VMERGE_BOUNDARY iommu_bio_merge
359 /*
360 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
361 * access
362 */
363 #define xlate_dev_mem_ptr(p) __va(p)
365 /*
366 * Convert a virtual cached pointer to an uncached pointer
367 */
368 #define xlate_dev_kmem_ptr(p) p
370 #endif /* __KERNEL__ */
372 #define ARCH_HAS_DEV_MEM
374 #endif