ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-xen/asm-i386/hypercall.h @ 6538:84ee014ebd41

Merge xen-vtx-unstable.hg
author adsharma@los-vmm.sc.intel.com
date Wed Aug 17 12:34:38 2005 -0800 (2005-08-17)
parents 23979fb12c49 dc27fd3392b1
children 99914b54f7bf
line source
1 /******************************************************************************
2 * hypercall.h
3 *
4 * Linux-specific hypervisor handling.
5 *
6 * Copyright (c) 2002-2004, K A Fraser
7 *
8 * This file may be distributed separately from the Linux kernel, or
9 * incorporated into other software packages, subject to the following license:
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a copy
12 * of this source file (the "Software"), to deal in the Software without
13 * restriction, including without limitation the rights to use, copy, modify,
14 * merge, publish, distribute, sublicense, and/or sell copies of the Software,
15 * and to permit persons to whom the Software is furnished to do so, subject to
16 * the following conditions:
17 *
18 * The above copyright notice and this permission notice shall be included in
19 * all copies or substantial portions of the Software.
20 *
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
24 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 * IN THE SOFTWARE.
28 */
30 #ifndef __HYPERCALL_H__
31 #define __HYPERCALL_H__
32 #include <asm-xen/xen-public/xen.h>
34 /*
35 * Assembler stubs for hyper-calls.
36 */
38 static inline int
39 HYPERVISOR_set_trap_table(
40 trap_info_t *table)
41 {
42 int ret;
43 unsigned long ignore;
45 __asm__ __volatile__ (
46 TRAP_INSTR
47 : "=a" (ret), "=b" (ignore)
48 : "0" (__HYPERVISOR_set_trap_table), "1" (table)
49 : "memory" );
51 return ret;
52 }
54 static inline int
55 HYPERVISOR_mmu_update(
56 mmu_update_t *req, int count, int *success_count, domid_t domid)
57 {
58 int ret;
59 unsigned long ign1, ign2, ign3, ign4;
61 __asm__ __volatile__ (
62 TRAP_INSTR
63 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
64 : "0" (__HYPERVISOR_mmu_update), "1" (req), "2" (count),
65 "3" (success_count), "4" (domid)
66 : "memory" );
68 return ret;
69 }
71 static inline int
72 HYPERVISOR_mmuext_op(
73 struct mmuext_op *op, int count, int *success_count, domid_t domid)
74 {
75 int ret;
76 unsigned long ign1, ign2, ign3, ign4;
78 __asm__ __volatile__ (
79 TRAP_INSTR
80 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
81 : "0" (__HYPERVISOR_mmuext_op), "1" (op), "2" (count),
82 "3" (success_count), "4" (domid)
83 : "memory" );
85 return ret;
86 }
88 static inline int
89 HYPERVISOR_set_gdt(
90 unsigned long *frame_list, int entries)
91 {
92 int ret;
93 unsigned long ign1, ign2;
95 __asm__ __volatile__ (
96 TRAP_INSTR
97 : "=a" (ret), "=b" (ign1), "=c" (ign2)
98 : "0" (__HYPERVISOR_set_gdt), "1" (frame_list), "2" (entries)
99 : "memory" );
102 return ret;
103 }
105 static inline int
106 HYPERVISOR_stack_switch(
107 unsigned long ss, unsigned long esp)
108 {
109 int ret;
110 unsigned long ign1, ign2;
112 __asm__ __volatile__ (
113 TRAP_INSTR
114 : "=a" (ret), "=b" (ign1), "=c" (ign2)
115 : "0" (__HYPERVISOR_stack_switch), "1" (ss), "2" (esp)
116 : "memory" );
118 return ret;
119 }
121 static inline int
122 HYPERVISOR_set_callbacks(
123 unsigned long event_selector, unsigned long event_address,
124 unsigned long failsafe_selector, unsigned long failsafe_address)
125 {
126 int ret;
127 unsigned long ign1, ign2, ign3, ign4;
129 __asm__ __volatile__ (
130 TRAP_INSTR
131 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
132 : "0" (__HYPERVISOR_set_callbacks), "1" (event_selector),
133 "2" (event_address), "3" (failsafe_selector), "4" (failsafe_address)
134 : "memory" );
136 return ret;
137 }
139 static inline int
140 HYPERVISOR_fpu_taskswitch(
141 int set)
142 {
143 int ret;
144 unsigned long ign;
146 __asm__ __volatile__ (
147 TRAP_INSTR
148 : "=a" (ret), "=b" (ign)
149 : "0" (__HYPERVISOR_fpu_taskswitch), "1" (set)
150 : "memory" );
152 return ret;
153 }
155 static inline int
156 HYPERVISOR_yield(
157 void)
158 {
159 int ret;
160 unsigned long ign;
162 __asm__ __volatile__ (
163 TRAP_INSTR
164 : "=a" (ret), "=b" (ign)
165 : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_yield)
166 : "memory" );
168 return ret;
169 }
171 static inline int
172 HYPERVISOR_block(
173 void)
174 {
175 int ret;
176 unsigned long ign1;
177 __asm__ __volatile__ (
178 TRAP_INSTR
179 : "=a" (ret), "=b" (ign1)
180 : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_block)
181 : "memory" );
183 return ret;
184 }
186 static inline int
187 HYPERVISOR_shutdown(
188 void)
189 {
190 int ret;
191 unsigned long ign1;
192 __asm__ __volatile__ (
193 TRAP_INSTR
194 : "=a" (ret), "=b" (ign1)
195 : "0" (__HYPERVISOR_sched_op),
196 "1" (SCHEDOP_shutdown | (SHUTDOWN_poweroff << SCHEDOP_reasonshift))
197 : "memory" );
199 return ret;
200 }
202 static inline int
203 HYPERVISOR_reboot(
204 void)
205 {
206 int ret;
207 unsigned long ign1;
208 __asm__ __volatile__ (
209 TRAP_INSTR
210 : "=a" (ret), "=b" (ign1)
211 : "0" (__HYPERVISOR_sched_op),
212 "1" (SCHEDOP_shutdown | (SHUTDOWN_reboot << SCHEDOP_reasonshift))
213 : "memory" );
215 return ret;
216 }
218 static inline int
219 HYPERVISOR_suspend(
220 unsigned long srec)
221 {
222 int ret;
223 unsigned long ign1, ign2;
225 /* NB. On suspend, control software expects a suspend record in %esi. */
226 __asm__ __volatile__ (
227 TRAP_INSTR
228 : "=a" (ret), "=b" (ign1), "=S" (ign2)
229 : "0" (__HYPERVISOR_sched_op),
230 "b" (SCHEDOP_shutdown | (SHUTDOWN_suspend << SCHEDOP_reasonshift)),
231 "S" (srec) : "memory");
233 return ret;
234 }
236 static inline int
237 HYPERVISOR_crash(
238 void)
239 {
240 int ret;
241 unsigned long ign1;
242 __asm__ __volatile__ (
243 TRAP_INSTR
244 : "=a" (ret), "=b" (ign1)
245 : "0" (__HYPERVISOR_sched_op),
246 "1" (SCHEDOP_shutdown | (SHUTDOWN_crash << SCHEDOP_reasonshift))
247 : "memory" );
249 return ret;
250 }
252 static inline long
253 HYPERVISOR_set_timer_op(
254 u64 timeout)
255 {
256 int ret;
257 unsigned long timeout_hi = (unsigned long)(timeout>>32);
258 unsigned long timeout_lo = (unsigned long)timeout;
259 unsigned long ign1, ign2;
261 __asm__ __volatile__ (
262 TRAP_INSTR
263 : "=a" (ret), "=b" (ign1), "=c" (ign2)
264 : "0" (__HYPERVISOR_set_timer_op), "b" (timeout_lo), "c" (timeout_hi)
265 : "memory");
267 return ret;
268 }
270 static inline int
271 HYPERVISOR_dom0_op(
272 dom0_op_t *dom0_op)
273 {
274 int ret;
275 unsigned long ign1;
277 dom0_op->interface_version = DOM0_INTERFACE_VERSION;
278 __asm__ __volatile__ (
279 TRAP_INSTR
280 : "=a" (ret), "=b" (ign1)
281 : "0" (__HYPERVISOR_dom0_op), "1" (dom0_op)
282 : "memory");
284 return ret;
285 }
287 static inline int
288 HYPERVISOR_set_debugreg(
289 int reg, unsigned long value)
290 {
291 int ret;
292 unsigned long ign1, ign2;
293 __asm__ __volatile__ (
294 TRAP_INSTR
295 : "=a" (ret), "=b" (ign1), "=c" (ign2)
296 : "0" (__HYPERVISOR_set_debugreg), "1" (reg), "2" (value)
297 : "memory" );
299 return ret;
300 }
302 static inline unsigned long
303 HYPERVISOR_get_debugreg(
304 int reg)
305 {
306 unsigned long ret;
307 unsigned long ign;
308 __asm__ __volatile__ (
309 TRAP_INSTR
310 : "=a" (ret), "=b" (ign)
311 : "0" (__HYPERVISOR_get_debugreg), "1" (reg)
312 : "memory" );
314 return ret;
315 }
317 static inline int
318 HYPERVISOR_update_descriptor(
319 unsigned long ma, unsigned long word1, unsigned long word2)
320 {
321 int ret;
322 unsigned long ign1, ign2, ign3;
324 __asm__ __volatile__ (
325 TRAP_INSTR
326 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
327 : "0" (__HYPERVISOR_update_descriptor), "1" (ma), "2" (word1),
328 "3" (word2)
329 : "memory" );
331 return ret;
332 }
334 static inline int
335 HYPERVISOR_dom_mem_op(
336 unsigned int op, unsigned long *extent_list,
337 unsigned long nr_extents, unsigned int extent_order)
338 {
339 int ret;
340 unsigned long ign1, ign2, ign3, ign4, ign5;
342 __asm__ __volatile__ (
343 TRAP_INSTR
344 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4),
345 "=D" (ign5)
346 : "0" (__HYPERVISOR_dom_mem_op), "1" (op), "2" (extent_list),
347 "3" (nr_extents), "4" (extent_order), "5" (DOMID_SELF)
348 : "memory" );
350 return ret;
351 }
353 static inline int
354 HYPERVISOR_multicall(
355 void *call_list, int nr_calls)
356 {
357 int ret;
358 unsigned long ign1, ign2;
360 __asm__ __volatile__ (
361 TRAP_INSTR
362 : "=a" (ret), "=b" (ign1), "=c" (ign2)
363 : "0" (__HYPERVISOR_multicall), "1" (call_list), "2" (nr_calls)
364 : "memory" );
366 return ret;
367 }
369 static inline int
370 HYPERVISOR_update_va_mapping(
371 unsigned long va, pte_t new_val, unsigned long flags)
372 {
373 int ret;
374 unsigned long ign1, ign2, ign3, ign4;
376 __asm__ __volatile__ (
377 TRAP_INSTR
378 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
379 : "0" (__HYPERVISOR_update_va_mapping),
380 "1" (va), "2" ((new_val).pte_low),
381 #ifdef CONFIG_X86_PAE
382 "3" ((new_val).pte_high),
383 #else
384 "3" (0),
385 #endif
386 "4" (flags)
387 : "memory" );
389 return ret;
390 }
392 static inline int
393 HYPERVISOR_event_channel_op(
394 void *op)
395 {
396 int ret;
397 unsigned long ignore;
398 __asm__ __volatile__ (
399 TRAP_INSTR
400 : "=a" (ret), "=b" (ignore)
401 : "0" (__HYPERVISOR_event_channel_op), "1" (op)
402 : "memory" );
404 return ret;
405 }
407 static inline int
408 HYPERVISOR_xen_version(
409 int cmd)
410 {
411 int ret;
412 unsigned long ignore;
414 __asm__ __volatile__ (
415 TRAP_INSTR
416 : "=a" (ret), "=b" (ignore)
417 : "0" (__HYPERVISOR_xen_version), "1" (cmd)
418 : "memory" );
420 return ret;
421 }
423 static inline int
424 HYPERVISOR_console_io(
425 int cmd, int count, char *str)
426 {
427 int ret;
428 unsigned long ign1, ign2, ign3;
429 __asm__ __volatile__ (
430 TRAP_INSTR
431 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
432 : "0" (__HYPERVISOR_console_io), "1" (cmd), "2" (count), "3" (str)
433 : "memory" );
435 return ret;
436 }
438 static inline int
439 HYPERVISOR_physdev_op(
440 void *physdev_op)
441 {
442 int ret;
443 unsigned long ign;
445 __asm__ __volatile__ (
446 TRAP_INSTR
447 : "=a" (ret), "=b" (ign)
448 : "0" (__HYPERVISOR_physdev_op), "1" (physdev_op)
449 : "memory" );
451 return ret;
452 }
454 static inline int
455 HYPERVISOR_grant_table_op(
456 unsigned int cmd, void *uop, unsigned int count)
457 {
458 int ret;
459 unsigned long ign1, ign2, ign3;
461 __asm__ __volatile__ (
462 TRAP_INSTR
463 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
464 : "0" (__HYPERVISOR_grant_table_op), "1" (cmd), "2" (uop), "3" (count)
465 : "memory" );
467 return ret;
468 }
470 static inline int
471 HYPERVISOR_update_va_mapping_otherdomain(
472 unsigned long va, pte_t new_val, unsigned long flags, domid_t domid)
473 {
474 int ret;
475 unsigned long ign1, ign2, ign3, ign4, ign5;
477 __asm__ __volatile__ (
478 TRAP_INSTR
479 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3),
480 "=S" (ign4), "=D" (ign5)
481 : "0" (__HYPERVISOR_update_va_mapping_otherdomain),
482 "1" (va), "2" ((new_val).pte_low),
483 #ifdef CONFIG_X86_PAE
484 "3" ((new_val).pte_high),
485 #else
486 "3" (0),
487 #endif
488 "4" (flags), "5" (domid) :
489 "memory" );
491 return ret;
492 }
494 static inline int
495 HYPERVISOR_vm_assist(
496 unsigned int cmd, unsigned int type)
497 {
498 int ret;
499 unsigned long ign1, ign2;
501 __asm__ __volatile__ (
502 TRAP_INSTR
503 : "=a" (ret), "=b" (ign1), "=c" (ign2)
504 : "0" (__HYPERVISOR_vm_assist), "1" (cmd), "2" (type)
505 : "memory" );
507 return ret;
508 }
510 static inline int
511 HYPERVISOR_boot_vcpu(
512 unsigned long vcpu, vcpu_guest_context_t *ctxt)
513 {
514 int ret;
515 unsigned long ign1, ign2;
517 __asm__ __volatile__ (
518 TRAP_INSTR
519 : "=a" (ret), "=b" (ign1), "=c" (ign2)
520 : "0" (__HYPERVISOR_boot_vcpu), "1" (vcpu), "2" (ctxt)
521 : "memory");
523 return ret;
524 }
526 static inline int
527 HYPERVISOR_vcpu_down(
528 int vcpu)
529 {
530 int ret;
531 unsigned long ign1;
532 __asm__ __volatile__ (
533 TRAP_INSTR
534 : "=a" (ret), "=b" (ign1)
535 : "0" (__HYPERVISOR_sched_op),
536 "1" (SCHEDOP_vcpu_down | (vcpu << SCHEDOP_vcpushift))
537 : "memory" );
539 return ret;
540 }
542 static inline int
543 HYPERVISOR_vcpu_up(
544 int vcpu)
545 {
546 int ret;
547 unsigned long ign1;
548 __asm__ __volatile__ (
549 TRAP_INSTR
550 : "=a" (ret), "=b" (ign1)
551 : "0" (__HYPERVISOR_sched_op),
552 "1" (SCHEDOP_vcpu_up | (vcpu << SCHEDOP_vcpushift))
553 : "memory" );
555 return ret;
556 }
557 #endif /* __HYPERCALL_H__ */