ia64/xen-unstable

view linux-2.4-xen-sparse/include/asm-xen/io.h @ 6538:84ee014ebd41

Merge xen-vtx-unstable.hg
author adsharma@los-vmm.sc.intel.com
date Wed Aug 17 12:34:38 2005 -0800 (2005-08-17)
parents 23979fb12c49 f294acb25858
children 99914b54f7bf
line source
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
4 #include <linux/config.h>
6 /*
7 * This file contains the definitions for the x86 IO instructions
8 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
9 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
10 * versions of the single-IO instructions (inb_p/inw_p/..).
11 *
12 * This file is not meant to be obfuscating: it's just complicated
13 * to (a) handle it all in a way that makes gcc able to optimize it
14 * as well as possible and (b) trying to avoid writing the same thing
15 * over and over again with slight variations and possibly making a
16 * mistake somewhere.
17 */
19 /*
20 * Thanks to James van Artsdalen for a better timing-fix than
21 * the two short jumps: using outb's to a nonexistent port seems
22 * to guarantee better timings even on fast machines.
23 *
24 * On the other hand, I'd like to be sure of a non-existent port:
25 * I feel a bit unsafe about using 0x80 (should be safe, though)
26 *
27 * Linus
28 */
30 /*
31 * Bit simplified and optimized by Jan Hubicka
32 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
33 *
34 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
35 * isa_read[wl] and isa_write[wl] fixed
36 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
37 */
39 #define IO_SPACE_LIMIT 0xffff
41 #define XQUAD_PORTIO_BASE 0xfe400000
42 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
43 #define XQUAD_PORTIO_LEN 0x80000 /* Only remapping first 2 quads */
45 #ifdef __KERNEL__
47 #include <linux/vmalloc.h>
49 /*
50 * Temporary debugging check to catch old code using
51 * unmapped ISA addresses. Will be removed in 2.4.
52 */
53 #if CONFIG_DEBUG_IOVIRT
54 extern void *__io_virt_debug(unsigned long x, const char *file, int line);
55 extern unsigned long __io_phys_debug(unsigned long x, const char *file, int line);
56 #define __io_virt(x) __io_virt_debug((unsigned long)(x), __FILE__, __LINE__)
57 //#define __io_phys(x) __io_phys_debug((unsigned long)(x), __FILE__, __LINE__)
58 #else
59 #define __io_virt(x) ((void *)(x))
60 //#define __io_phys(x) __pa(x)
61 #endif
63 /**
64 * virt_to_phys - map virtual addresses to physical
65 * @address: address to remap
66 *
67 * The returned physical address is the physical (CPU) mapping for
68 * the memory address given. It is only valid to use this function on
69 * addresses directly mapped or allocated via kmalloc.
70 *
71 * This function does not give bus mappings for DMA transfers. In
72 * almost all conceivable cases a device driver should not be using
73 * this function
74 */
76 static inline unsigned long virt_to_phys(volatile void * address)
77 {
78 return __pa(address);
79 }
81 /**
82 * phys_to_virt - map physical address to virtual
83 * @address: address to remap
84 *
85 * The returned virtual address is a current CPU mapping for
86 * the memory address given. It is only valid to use this function on
87 * addresses that have a kernel mapping
88 *
89 * This function does not handle bus mappings for DMA transfers. In
90 * almost all conceivable cases a device driver should not be using
91 * this function
92 */
94 static inline void * phys_to_virt(unsigned long address)
95 {
96 return __va(address);
97 }
99 /*
100 * We define page_to_phys 'incorrectly' because it is used when merging blkdev
101 * requests, and the correct thing to do there is to use machine addresses.
102 */
103 #define page_to_phys(_x) phys_to_machine(((_x) - mem_map) << PAGE_SHIFT)
105 extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
107 /**
108 * ioremap - map bus memory into CPU space
109 * @offset: bus address of the memory
110 * @size: size of the resource to map
111 *
112 * ioremap performs a platform specific sequence of operations to
113 * make bus memory CPU accessible via the readb/readw/readl/writeb/
114 * writew/writel functions and the other mmio helpers. The returned
115 * address is not guaranteed to be usable directly as a virtual
116 * address.
117 */
119 static inline void * ioremap (unsigned long offset, unsigned long size)
120 {
121 return __ioremap(offset, size, 0);
122 }
124 /**
125 * ioremap_nocache - map bus memory into CPU space
126 * @offset: bus address of the memory
127 * @size: size of the resource to map
128 *
129 * ioremap_nocache performs a platform specific sequence of operations to
130 * make bus memory CPU accessible via the readb/readw/readl/writeb/
131 * writew/writel functions and the other mmio helpers. The returned
132 * address is not guaranteed to be usable directly as a virtual
133 * address.
134 *
135 * This version of ioremap ensures that the memory is marked uncachable
136 * on the CPU as well as honouring existing caching rules from things like
137 * the PCI bus. Note that there are other caches and buffers on many
138 * busses. In paticular driver authors should read up on PCI writes
139 *
140 * It's useful if some control registers are in such an area and
141 * write combining or read caching is not desirable:
142 */
144 static inline void * ioremap_nocache (unsigned long offset, unsigned long size)
145 {
146 return __ioremap(offset, size, _PAGE_PCD);
147 }
149 extern void iounmap(void *addr);
151 /*
152 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
153 * mappings, before the real ioremap() is functional.
154 * A boot-time mapping is currently limited to at most 16 pages.
155 */
156 extern void *bt_ioremap(unsigned long offset, unsigned long size);
157 extern void bt_iounmap(void *addr, unsigned long size);
159 #define virt_to_bus(_x) phys_to_machine(virt_to_phys(_x))
160 #define bus_to_virt(_x) phys_to_virt(machine_to_phys(_x))
161 #define page_to_bus(_x) phys_to_machine(((_x) - mem_map) << PAGE_SHIFT)
162 #define bus_to_phys(_x) machine_to_phys(_x)
163 #define bus_to_page(_x) (mem_map + (bus_to_phys(_x) >> PAGE_SHIFT))
165 /*
166 * readX/writeX() are used to access memory mapped devices. On some
167 * architectures the memory mapped IO stuff needs to be accessed
168 * differently. On the x86 architecture, we just read/write the
169 * memory location directly.
170 */
172 #define readb(addr) (*(volatile unsigned char *) __io_virt(addr))
173 #define readw(addr) (*(volatile unsigned short *) __io_virt(addr))
174 #define readl(addr) (*(volatile unsigned int *) __io_virt(addr))
175 #define __raw_readb readb
176 #define __raw_readw readw
177 #define __raw_readl readl
179 #define writeb(b,addr) (*(volatile unsigned char *) __io_virt(addr) = (b))
180 #define writew(b,addr) (*(volatile unsigned short *) __io_virt(addr) = (b))
181 #define writel(b,addr) (*(volatile unsigned int *) __io_virt(addr) = (b))
182 #define __raw_writeb writeb
183 #define __raw_writew writew
184 #define __raw_writel writel
186 #define memset_io(a,b,c) __memset(__io_virt(a),(b),(c))
187 #define memcpy_fromio(a,b,c) __memcpy((a),__io_virt(b),(c))
188 #define memcpy_toio(a,b,c) __memcpy(__io_virt(a),(b),(c))
190 /*
191 * ISA space is 'always mapped' on a typical x86 system, no need to
192 * explicitly ioremap() it. The fact that the ISA IO space is mapped
193 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
194 * are physical addresses. The following constant pointer can be
195 * used as the IO-area pointer (it can be iounmapped as well, so the
196 * analogy with PCI is quite large):
197 */
198 #define __ISA_IO_base ((char *)(PAGE_OFFSET))
200 #define isa_readb(a) readb(__ISA_IO_base + (a))
201 #define isa_readw(a) readw(__ISA_IO_base + (a))
202 #define isa_readl(a) readl(__ISA_IO_base + (a))
203 #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
204 #define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
205 #define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
206 #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
207 #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
208 #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
211 /*
212 * Again, i386 does not require mem IO specific function.
213 */
215 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),__io_virt(b),(c),(d))
216 #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),__io_virt(__ISA_IO_base + (b)),(c),(d))
218 /**
219 * check_signature - find BIOS signatures
220 * @io_addr: mmio address to check
221 * @signature: signature block
222 * @length: length of signature
223 *
224 * Perform a signature comparison with the mmio address io_addr. This
225 * address should have been obtained by ioremap.
226 * Returns 1 on a match.
227 */
229 static inline int check_signature(unsigned long io_addr,
230 const unsigned char *signature, int length)
231 {
232 int retval = 0;
233 do {
234 if (readb(io_addr) != *signature)
235 goto out;
236 io_addr++;
237 signature++;
238 length--;
239 } while (length);
240 retval = 1;
241 out:
242 return retval;
243 }
245 /**
246 * isa_check_signature - find BIOS signatures
247 * @io_addr: mmio address to check
248 * @signature: signature block
249 * @length: length of signature
250 *
251 * Perform a signature comparison with the ISA mmio address io_addr.
252 * Returns 1 on a match.
253 *
254 * This function is deprecated. New drivers should use ioremap and
255 * check_signature.
256 */
259 static inline int isa_check_signature(unsigned long io_addr,
260 const unsigned char *signature, int length)
261 {
262 int retval = 0;
263 do {
264 if (isa_readb(io_addr) != *signature)
265 goto out;
266 io_addr++;
267 signature++;
268 length--;
269 } while (length);
270 retval = 1;
271 out:
272 return retval;
273 }
275 /*
276 * Cache management
277 *
278 * This needed for two cases
279 * 1. Out of order aware processors
280 * 2. Accidentally out of order processors (PPro errata #51)
281 */
283 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
285 static inline void flush_write_buffers(void)
286 {
287 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
288 }
290 #define dma_cache_inv(_start,_size) flush_write_buffers()
291 #define dma_cache_wback(_start,_size) flush_write_buffers()
292 #define dma_cache_wback_inv(_start,_size) flush_write_buffers()
294 #else
296 /* Nothing to do */
298 #define dma_cache_inv(_start,_size) do { } while (0)
299 #define dma_cache_wback(_start,_size) do { } while (0)
300 #define dma_cache_wback_inv(_start,_size) do { } while (0)
301 #define flush_write_buffers()
303 #endif
305 #endif /* __KERNEL__ */
307 #ifdef SLOW_IO_BY_JUMPING
308 #define __SLOW_DOWN_IO "\njmp 1f\n1:\tjmp 1f\n1:"
309 #elif defined(__UNSAFE_IO__)
310 #define __SLOW_DOWN_IO "\noutb %%al,$0x80"
311 #else
312 #define __SLOW_DOWN_IO "\n1: outb %%al,$0x80\n" \
313 "2:\n" \
314 ".section __ex_table,\"a\"\n\t" \
315 ".align 4\n\t" \
316 ".long 1b,2b\n" \
317 ".previous"
318 #endif
320 #ifdef REALLY_SLOW_IO
321 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
322 #else
323 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO
324 #endif
326 #ifdef CONFIG_MULTIQUAD
327 extern void *xquad_portio; /* Where the IO area was mapped */
328 #endif /* CONFIG_MULTIQUAD */
330 /*
331 * Talk about misusing macros..
332 */
333 #define __OUT1(s,x) \
334 static inline void out##s(unsigned x value, unsigned short port) {
336 #ifdef __UNSAFE_IO__
337 #define __OUT2(s,s1,s2) \
338 __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
339 #else
340 #define __OUT2(s,s1,s2) \
341 __asm__ __volatile__ ("1: out" #s " %" s1 "0,%" s2 "1\n" \
342 "2:\n" \
343 ".section __ex_table,\"a\"\n\t" \
344 ".align 4\n\t" \
345 ".long 1b,2b\n" \
346 ".previous"
347 #endif
349 #if defined (CONFIG_MULTIQUAD) && !defined(STANDALONE)
350 #define __OUTQ(s,ss,x) /* Do the equivalent of the portio op on quads */ \
351 static inline void out##ss(unsigned x value, unsigned short port) { \
352 if (xquad_portio) \
353 write##s(value, (unsigned long) xquad_portio + port); \
354 else /* We're still in early boot, running on quad 0 */ \
355 out##ss##_local(value, port); \
356 } \
357 static inline void out##ss##_quad(unsigned x value, unsigned short port, int quad) { \
358 if (xquad_portio) \
359 write##s(value, (unsigned long) xquad_portio + (XQUAD_PORTIO_QUAD*quad)\
360 + port); \
361 }
363 #define __INQ(s,ss) /* Do the equivalent of the portio op on quads */ \
364 static inline RETURN_TYPE in##ss(unsigned short port) { \
365 if (xquad_portio) \
366 return read##s((unsigned long) xquad_portio + port); \
367 else /* We're still in early boot, running on quad 0 */ \
368 return in##ss##_local(port); \
369 } \
370 static inline RETURN_TYPE in##ss##_quad(unsigned short port, int quad) { \
371 if (xquad_portio) \
372 return read##s((unsigned long) xquad_portio + (XQUAD_PORTIO_QUAD*quad)\
373 + port); \
374 else\
375 return 0;\
376 }
377 #endif /* CONFIG_MULTIQUAD && !STANDALONE */
379 #if !defined(CONFIG_MULTIQUAD) || defined(STANDALONE)
380 #define __OUT(s,s1,x) \
381 __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
382 __OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));}
383 #else
384 /* Make the default portio routines operate on quad 0 */
385 #define __OUT(s,s1,x) \
386 __OUT1(s##_local,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
387 __OUT1(s##_p_local,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} \
388 __OUTQ(s,s,x) \
389 __OUTQ(s,s##_p,x)
390 #endif /* !CONFIG_MULTIQUAD || STANDALONE */
392 #define __IN1(s) \
393 static inline RETURN_TYPE in##s(unsigned short port) { RETURN_TYPE _v;
395 #ifdef __UNSAFE_IO__
396 #define __IN2(s,s1,s2) \
397 __asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
398 #else
399 #define __IN2(s,s1,s2) \
400 __asm__ __volatile__ ("1: in" #s " %" s2 "1,%" s1 "0\n" \
401 "2:\n" \
402 ".section .fixup,\"ax\"\n" \
403 "3: mov" #s " $~0,%" s1 "0\n\t" \
404 "jmp 2b\n" \
405 ".previous\n" \
406 ".section __ex_table,\"a\"\n\t" \
407 ".align 4\n\t" \
408 ".long 1b,3b\n" \
409 ".previous"
410 #endif
412 #if !defined(CONFIG_MULTIQUAD) || defined(STANDALONE)
413 #define __IN(s,s1,i...) \
414 __IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
415 __IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; }
416 #else
417 /* Make the default portio routines operate on quad 0 */
418 #define __IN(s,s1,i...) \
419 __IN1(s##_local) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
420 __IN1(s##_p_local) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
421 __INQ(s,s) \
422 __INQ(s,s##_p)
423 #endif /* !CONFIG_MULTIQUAD || STANDALONE */
425 #define __INS(s) \
426 static inline void ins##s(unsigned short port, void * addr, unsigned long count) \
427 { __asm__ __volatile__ ("rep ; ins" #s \
428 : "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
430 #define __OUTS(s) \
431 static inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
432 { __asm__ __volatile__ ("rep ; outs" #s \
433 : "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
435 #define RETURN_TYPE unsigned char
436 __IN(b,"")
437 #undef RETURN_TYPE
438 #define RETURN_TYPE unsigned short
439 __IN(w,"")
440 #undef RETURN_TYPE
441 #define RETURN_TYPE unsigned int
442 __IN(l,"")
443 #undef RETURN_TYPE
445 __OUT(b,"b",char)
446 __OUT(w,"w",short)
447 __OUT(l,,int)
449 __INS(b)
450 __INS(w)
451 __INS(l)
453 __OUTS(b)
454 __OUTS(w)
455 __OUTS(l)
457 #endif