ia64/xen-unstable

view xen/include/public/xen.h @ 9891:84780e2ea775

Define 8 hypercall numbers for arch-specific purposes.

Signed-off-by: Keir Fraser <Keir.Fraser@cl.cam.ac.uk>
Signed-off-by: Tian Kevin <kevin.tian@intel.com>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author kaf24@firebug.cl.cam.ac.uk
date Fri Apr 28 14:38:39 2006 +0100 (2006-04-28)
parents 3726c0afc5af
children 42a8e3101c6c
line source
1 /******************************************************************************
2 * xen.h
3 *
4 * Guest OS interface to Xen.
5 *
6 * Copyright (c) 2004, K A Fraser
7 */
9 #ifndef __XEN_PUBLIC_XEN_H__
10 #define __XEN_PUBLIC_XEN_H__
12 #if defined(__i386__)
13 #include "arch-x86_32.h"
14 #elif defined(__x86_64__)
15 #include "arch-x86_64.h"
16 #elif defined(__ia64__)
17 #include "arch-ia64.h"
18 #else
19 #error "Unsupported architecture"
20 #endif
22 /*
23 * XEN "SYSTEM CALLS" (a.k.a. HYPERCALLS).
24 */
26 /*
27 * x86_32: EAX = vector; EBX, ECX, EDX, ESI, EDI = args 1, 2, 3, 4, 5.
28 * EAX = return value
29 * (argument registers may be clobbered on return)
30 * x86_64: RAX = vector; RDI, RSI, RDX, R10, R8, R9 = args 1, 2, 3, 4, 5, 6.
31 * RAX = return value
32 * (argument registers not clobbered on return; RCX, R11 are)
33 */
34 #define __HYPERVISOR_set_trap_table 0
35 #define __HYPERVISOR_mmu_update 1
36 #define __HYPERVISOR_set_gdt 2
37 #define __HYPERVISOR_stack_switch 3
38 #define __HYPERVISOR_set_callbacks 4
39 #define __HYPERVISOR_fpu_taskswitch 5
40 #define __HYPERVISOR_sched_op_compat 6 /* compat as of 0x00030101 */
41 #define __HYPERVISOR_dom0_op 7
42 #define __HYPERVISOR_set_debugreg 8
43 #define __HYPERVISOR_get_debugreg 9
44 #define __HYPERVISOR_update_descriptor 10
45 #define __HYPERVISOR_memory_op 12
46 #define __HYPERVISOR_multicall 13
47 #define __HYPERVISOR_update_va_mapping 14
48 #define __HYPERVISOR_set_timer_op 15
49 #define __HYPERVISOR_event_channel_op 16
50 #define __HYPERVISOR_xen_version 17
51 #define __HYPERVISOR_console_io 18
52 #define __HYPERVISOR_physdev_op 19
53 #define __HYPERVISOR_grant_table_op 20
54 #define __HYPERVISOR_vm_assist 21
55 #define __HYPERVISOR_update_va_mapping_otherdomain 22
56 #define __HYPERVISOR_iret 23 /* x86 only */
57 #define __HYPERVISOR_vcpu_op 24
58 #define __HYPERVISOR_set_segment_base 25 /* x86/64 only */
59 #define __HYPERVISOR_mmuext_op 26
60 #define __HYPERVISOR_acm_op 27
61 #define __HYPERVISOR_nmi_op 28
62 #define __HYPERVISOR_sched_op 29
63 #define __HYPERVISOR_callback_op 30
64 #define __HYPERVISOR_xenoprof_op 31
66 /* Architecture-specific hypercall definitions. */
67 #define __HYPERVISOR_arch_0 48
68 #define __HYPERVISOR_arch_1 49
69 #define __HYPERVISOR_arch_2 50
70 #define __HYPERVISOR_arch_3 51
71 #define __HYPERVISOR_arch_4 52
72 #define __HYPERVISOR_arch_5 53
73 #define __HYPERVISOR_arch_6 54
74 #define __HYPERVISOR_arch_7 55
76 /*
77 * VIRTUAL INTERRUPTS
78 *
79 * Virtual interrupts that a guest OS may receive from Xen.
80 *
81 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
82 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
83 * The latter can be allocated only once per guest: they must initially be
84 * allocated to VCPU0 but can subsequently be re-bound.
85 */
86 #define VIRQ_TIMER 0 /* V. Timebase update, and/or requested timeout. */
87 #define VIRQ_DEBUG 1 /* V. Request guest to dump debug info. */
88 #define VIRQ_CONSOLE 2 /* G. (DOM0) Bytes received on emergency console. */
89 #define VIRQ_DOM_EXC 3 /* G. (DOM0) Exceptional event for some domain. */
90 #define VIRQ_TBUF 4 /* G. (DOM0) Trace buffer has records available. */
91 #define VIRQ_DEBUGGER 6 /* G. (DOM0) A domain has paused for debugging. */
92 #define VIRQ_XENOPROF 7 /* V. XenOprofile interrupt: new sample available */
94 /* Architecture-specific VIRQ definitions. */
95 #define VIRQ_ARCH_0 16
96 #define VIRQ_ARCH_1 17
97 #define VIRQ_ARCH_2 18
98 #define VIRQ_ARCH_3 19
99 #define VIRQ_ARCH_4 20
100 #define VIRQ_ARCH_5 21
101 #define VIRQ_ARCH_6 22
102 #define VIRQ_ARCH_7 23
104 #define NR_VIRQS 24
106 /*
107 * MMU-UPDATE REQUESTS
108 *
109 * HYPERVISOR_mmu_update() accepts a list of (ptr, val) pairs.
110 * A foreigndom (FD) can be specified (or DOMID_SELF for none).
111 * Where the FD has some effect, it is described below.
112 * ptr[1:0] specifies the appropriate MMU_* command.
113 *
114 * ptr[1:0] == MMU_NORMAL_PT_UPDATE:
115 * Updates an entry in a page table. If updating an L1 table, and the new
116 * table entry is valid/present, the mapped frame must belong to the FD, if
117 * an FD has been specified. If attempting to map an I/O page then the
118 * caller assumes the privilege of the FD.
119 * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller.
120 * FD == DOMID_XEN: Map restricted areas of Xen's heap space.
121 * ptr[:2] -- Machine address of the page-table entry to modify.
122 * val -- Value to write.
123 *
124 * ptr[1:0] == MMU_MACHPHYS_UPDATE:
125 * Updates an entry in the machine->pseudo-physical mapping table.
126 * ptr[:2] -- Machine address within the frame whose mapping to modify.
127 * The frame must belong to the FD, if one is specified.
128 * val -- Value to write into the mapping entry.
129 */
130 #define MMU_NORMAL_PT_UPDATE 0 /* checked '*ptr = val'. ptr is MA. */
131 #define MMU_MACHPHYS_UPDATE 1 /* ptr = MA of frame to modify entry for */
133 /*
134 * MMU EXTENDED OPERATIONS
135 *
136 * HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures.
137 * A foreigndom (FD) can be specified (or DOMID_SELF for none).
138 * Where the FD has some effect, it is described below.
139 *
140 * cmd: MMUEXT_(UN)PIN_*_TABLE
141 * mfn: Machine frame number to be (un)pinned as a p.t. page.
142 * The frame must belong to the FD, if one is specified.
143 *
144 * cmd: MMUEXT_NEW_BASEPTR
145 * mfn: Machine frame number of new page-table base to install in MMU.
146 *
147 * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only]
148 * mfn: Machine frame number of new page-table base to install in MMU
149 * when in user space.
150 *
151 * cmd: MMUEXT_TLB_FLUSH_LOCAL
152 * No additional arguments. Flushes local TLB.
153 *
154 * cmd: MMUEXT_INVLPG_LOCAL
155 * linear_addr: Linear address to be flushed from the local TLB.
156 *
157 * cmd: MMUEXT_TLB_FLUSH_MULTI
158 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
159 *
160 * cmd: MMUEXT_INVLPG_MULTI
161 * linear_addr: Linear address to be flushed.
162 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
163 *
164 * cmd: MMUEXT_TLB_FLUSH_ALL
165 * No additional arguments. Flushes all VCPUs' TLBs.
166 *
167 * cmd: MMUEXT_INVLPG_ALL
168 * linear_addr: Linear address to be flushed from all VCPUs' TLBs.
169 *
170 * cmd: MMUEXT_FLUSH_CACHE
171 * No additional arguments. Writes back and flushes cache contents.
172 *
173 * cmd: MMUEXT_SET_LDT
174 * linear_addr: Linear address of LDT base (NB. must be page-aligned).
175 * nr_ents: Number of entries in LDT.
176 */
177 #define MMUEXT_PIN_L1_TABLE 0
178 #define MMUEXT_PIN_L2_TABLE 1
179 #define MMUEXT_PIN_L3_TABLE 2
180 #define MMUEXT_PIN_L4_TABLE 3
181 #define MMUEXT_UNPIN_TABLE 4
182 #define MMUEXT_NEW_BASEPTR 5
183 #define MMUEXT_TLB_FLUSH_LOCAL 6
184 #define MMUEXT_INVLPG_LOCAL 7
185 #define MMUEXT_TLB_FLUSH_MULTI 8
186 #define MMUEXT_INVLPG_MULTI 9
187 #define MMUEXT_TLB_FLUSH_ALL 10
188 #define MMUEXT_INVLPG_ALL 11
189 #define MMUEXT_FLUSH_CACHE 12
190 #define MMUEXT_SET_LDT 13
191 #define MMUEXT_NEW_USER_BASEPTR 15
193 #ifndef __ASSEMBLY__
194 typedef struct mmuext_op {
195 unsigned int cmd;
196 union {
197 /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR */
198 unsigned long mfn;
199 /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */
200 unsigned long linear_addr;
201 } arg1;
202 union {
203 /* SET_LDT */
204 unsigned int nr_ents;
205 /* TLB_FLUSH_MULTI, INVLPG_MULTI */
206 void *vcpumask;
207 } arg2;
208 } mmuext_op_t;
209 DEFINE_XEN_GUEST_HANDLE(mmuext_op_t);
210 #endif
212 /* These are passed as 'flags' to update_va_mapping. They can be ORed. */
213 /* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */
214 /* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */
215 #define UVMF_NONE (0UL<<0) /* No flushing at all. */
216 #define UVMF_TLB_FLUSH (1UL<<0) /* Flush entire TLB(s). */
217 #define UVMF_INVLPG (2UL<<0) /* Flush only one entry. */
218 #define UVMF_FLUSHTYPE_MASK (3UL<<0)
219 #define UVMF_MULTI (0UL<<2) /* Flush subset of TLBs. */
220 #define UVMF_LOCAL (0UL<<2) /* Flush local TLB. */
221 #define UVMF_ALL (1UL<<2) /* Flush all TLBs. */
223 /*
224 * Commands to HYPERVISOR_console_io().
225 */
226 #define CONSOLEIO_write 0
227 #define CONSOLEIO_read 1
229 /*
230 * Commands to HYPERVISOR_vm_assist().
231 */
232 #define VMASST_CMD_enable 0
233 #define VMASST_CMD_disable 1
234 #define VMASST_TYPE_4gb_segments 0
235 #define VMASST_TYPE_4gb_segments_notify 1
236 #define VMASST_TYPE_writable_pagetables 2
237 #define MAX_VMASST_TYPE 2
239 #ifndef __ASSEMBLY__
241 typedef uint16_t domid_t;
243 /* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */
244 #define DOMID_FIRST_RESERVED (0x7FF0U)
246 /* DOMID_SELF is used in certain contexts to refer to oneself. */
247 #define DOMID_SELF (0x7FF0U)
249 /*
250 * DOMID_IO is used to restrict page-table updates to mapping I/O memory.
251 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO
252 * is useful to ensure that no mappings to the OS's own heap are accidentally
253 * installed. (e.g., in Linux this could cause havoc as reference counts
254 * aren't adjusted on the I/O-mapping code path).
255 * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can
256 * be specified by any calling domain.
257 */
258 #define DOMID_IO (0x7FF1U)
260 /*
261 * DOMID_XEN is used to allow privileged domains to map restricted parts of
262 * Xen's heap space (e.g., the machine_to_phys table).
263 * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if
264 * the caller is privileged.
265 */
266 #define DOMID_XEN (0x7FF2U)
268 /*
269 * Send an array of these to HYPERVISOR_mmu_update().
270 * NB. The fields are natural pointer/address size for this architecture.
271 */
272 typedef struct mmu_update {
273 uint64_t ptr; /* Machine address of PTE. */
274 uint64_t val; /* New contents of PTE. */
275 } mmu_update_t;
276 DEFINE_XEN_GUEST_HANDLE(mmu_update_t);
278 /*
279 * Send an array of these to HYPERVISOR_multicall().
280 * NB. The fields are natural register size for this architecture.
281 */
282 typedef struct multicall_entry {
283 unsigned long op, result;
284 unsigned long args[6];
285 } multicall_entry_t;
286 DEFINE_XEN_GUEST_HANDLE(multicall_entry_t);
288 /*
289 * Event channel endpoints per domain:
290 * 1024 if a long is 32 bits; 4096 if a long is 64 bits.
291 */
292 #define NR_EVENT_CHANNELS (sizeof(unsigned long) * sizeof(unsigned long) * 64)
294 typedef struct vcpu_time_info {
295 /*
296 * Updates to the following values are preceded and followed by an
297 * increment of 'version'. The guest can therefore detect updates by
298 * looking for changes to 'version'. If the least-significant bit of
299 * the version number is set then an update is in progress and the guest
300 * must wait to read a consistent set of values.
301 * The correct way to interact with the version number is similar to
302 * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry.
303 */
304 uint32_t version;
305 uint32_t pad0;
306 uint64_t tsc_timestamp; /* TSC at last update of time vals. */
307 uint64_t system_time; /* Time, in nanosecs, since boot. */
308 /*
309 * Current system time:
310 * system_time +
311 * ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32)
312 * CPU frequency (Hz):
313 * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
314 */
315 uint32_t tsc_to_system_mul;
316 int8_t tsc_shift;
317 int8_t pad1[3];
318 } vcpu_time_info_t; /* 32 bytes */
320 typedef struct vcpu_info {
321 /*
322 * 'evtchn_upcall_pending' is written non-zero by Xen to indicate
323 * a pending notification for a particular VCPU. It is then cleared
324 * by the guest OS /before/ checking for pending work, thus avoiding
325 * a set-and-check race. Note that the mask is only accessed by Xen
326 * on the CPU that is currently hosting the VCPU. This means that the
327 * pending and mask flags can be updated by the guest without special
328 * synchronisation (i.e., no need for the x86 LOCK prefix).
329 * This may seem suboptimal because if the pending flag is set by
330 * a different CPU then an IPI may be scheduled even when the mask
331 * is set. However, note:
332 * 1. The task of 'interrupt holdoff' is covered by the per-event-
333 * channel mask bits. A 'noisy' event that is continually being
334 * triggered can be masked at source at this very precise
335 * granularity.
336 * 2. The main purpose of the per-VCPU mask is therefore to restrict
337 * reentrant execution: whether for concurrency control, or to
338 * prevent unbounded stack usage. Whatever the purpose, we expect
339 * that the mask will be asserted only for short periods at a time,
340 * and so the likelihood of a 'spurious' IPI is suitably small.
341 * The mask is read before making an event upcall to the guest: a
342 * non-zero mask therefore guarantees that the VCPU will not receive
343 * an upcall activation. The mask is cleared when the VCPU requests
344 * to block: this avoids wakeup-waiting races.
345 */
346 uint8_t evtchn_upcall_pending;
347 uint8_t evtchn_upcall_mask;
348 unsigned long evtchn_pending_sel;
349 arch_vcpu_info_t arch;
350 vcpu_time_info_t time;
351 } vcpu_info_t; /* 64 bytes (x86) */
353 /*
354 * Xen/kernel shared data -- pointer provided in start_info.
355 * NB. We expect that this struct is smaller than a page.
356 */
357 typedef struct shared_info {
358 vcpu_info_t vcpu_info[MAX_VIRT_CPUS];
360 /*
361 * A domain can create "event channels" on which it can send and receive
362 * asynchronous event notifications. There are three classes of event that
363 * are delivered by this mechanism:
364 * 1. Bi-directional inter- and intra-domain connections. Domains must
365 * arrange out-of-band to set up a connection (usually by allocating
366 * an unbound 'listener' port and avertising that via a storage service
367 * such as xenstore).
368 * 2. Physical interrupts. A domain with suitable hardware-access
369 * privileges can bind an event-channel port to a physical interrupt
370 * source.
371 * 3. Virtual interrupts ('events'). A domain can bind an event-channel
372 * port to a virtual interrupt source, such as the virtual-timer
373 * device or the emergency console.
374 *
375 * Event channels are addressed by a "port index". Each channel is
376 * associated with two bits of information:
377 * 1. PENDING -- notifies the domain that there is a pending notification
378 * to be processed. This bit is cleared by the guest.
379 * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING
380 * will cause an asynchronous upcall to be scheduled. This bit is only
381 * updated by the guest. It is read-only within Xen. If a channel
382 * becomes pending while the channel is masked then the 'edge' is lost
383 * (i.e., when the channel is unmasked, the guest must manually handle
384 * pending notifications as no upcall will be scheduled by Xen).
385 *
386 * To expedite scanning of pending notifications, any 0->1 pending
387 * transition on an unmasked channel causes a corresponding bit in a
388 * per-vcpu selector word to be set. Each bit in the selector covers a
389 * 'C long' in the PENDING bitfield array.
390 */
391 unsigned long evtchn_pending[sizeof(unsigned long) * 8];
392 unsigned long evtchn_mask[sizeof(unsigned long) * 8];
394 /*
395 * Wallclock time: updated only by control software. Guests should base
396 * their gettimeofday() syscall on this wallclock-base value.
397 */
398 uint32_t wc_version; /* Version counter: see vcpu_time_info_t. */
399 uint32_t wc_sec; /* Secs 00:00:00 UTC, Jan 1, 1970. */
400 uint32_t wc_nsec; /* Nsecs 00:00:00 UTC, Jan 1, 1970. */
402 arch_shared_info_t arch;
404 } shared_info_t;
406 /*
407 * Start-of-day memory layout for the initial domain (DOM0):
408 * 1. The domain is started within contiguous virtual-memory region.
409 * 2. The contiguous region begins and ends on an aligned 4MB boundary.
410 * 3. The region start corresponds to the load address of the OS image.
411 * If the load address is not 4MB aligned then the address is rounded down.
412 * 4. This the order of bootstrap elements in the initial virtual region:
413 * a. relocated kernel image
414 * b. initial ram disk [mod_start, mod_len]
415 * c. list of allocated page frames [mfn_list, nr_pages]
416 * d. start_info_t structure [register ESI (x86)]
417 * e. bootstrap page tables [pt_base, CR3 (x86)]
418 * f. bootstrap stack [register ESP (x86)]
419 * 5. Bootstrap elements are packed together, but each is 4kB-aligned.
420 * 6. The initial ram disk may be omitted.
421 * 7. The list of page frames forms a contiguous 'pseudo-physical' memory
422 * layout for the domain. In particular, the bootstrap virtual-memory
423 * region is a 1:1 mapping to the first section of the pseudo-physical map.
424 * 8. All bootstrap elements are mapped read-writable for the guest OS. The
425 * only exception is the bootstrap page table, which is mapped read-only.
426 * 9. There is guaranteed to be at least 512kB padding after the final
427 * bootstrap element. If necessary, the bootstrap virtual region is
428 * extended by an extra 4MB to ensure this.
429 */
431 #define MAX_GUEST_CMDLINE 1024
432 typedef struct start_info {
433 /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME. */
434 char magic[32]; /* "xen-<version>-<platform>". */
435 unsigned long nr_pages; /* Total pages allocated to this domain. */
436 unsigned long shared_info; /* MACHINE address of shared info struct. */
437 uint32_t flags; /* SIF_xxx flags. */
438 unsigned long store_mfn; /* MACHINE page number of shared page. */
439 uint32_t store_evtchn; /* Event channel for store communication. */
440 unsigned long console_mfn; /* MACHINE address of console page. */
441 uint32_t console_evtchn; /* Event channel for console messages. */
442 /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME). */
443 unsigned long pt_base; /* VIRTUAL address of page directory. */
444 unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames. */
445 unsigned long mfn_list; /* VIRTUAL address of page-frame list. */
446 unsigned long mod_start; /* VIRTUAL address of pre-loaded module. */
447 unsigned long mod_len; /* Size (bytes) of pre-loaded module. */
448 int8_t cmd_line[MAX_GUEST_CMDLINE];
449 } start_info_t;
451 /* These flags are passed in the 'flags' field of start_info_t. */
452 #define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */
453 #define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */
455 typedef uint64_t cpumap_t;
457 typedef uint8_t xen_domain_handle_t[16];
459 /* Turn a plain number into a C unsigned long constant. */
460 #define __mk_unsigned_long(x) x ## UL
461 #define mk_unsigned_long(x) __mk_unsigned_long(x)
463 #else /* __ASSEMBLY__ */
465 /* In assembly code we cannot use C numeric constant suffixes. */
466 #define mk_unsigned_long(x) x
468 #endif /* !__ASSEMBLY__ */
470 #include "xen-compat.h"
472 #endif /* __XEN_PUBLIC_XEN_H__ */
474 /*
475 * Local variables:
476 * mode: C
477 * c-set-style: "BSD"
478 * c-basic-offset: 4
479 * tab-width: 4
480 * indent-tabs-mode: nil
481 * End:
482 */