ia64/xen-unstable

view xen/include/asm-x86/config.h @ 9891:84780e2ea775

Define 8 hypercall numbers for arch-specific purposes.

Signed-off-by: Keir Fraser <Keir.Fraser@cl.cam.ac.uk>
Signed-off-by: Tian Kevin <kevin.tian@intel.com>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author kaf24@firebug.cl.cam.ac.uk
date Fri Apr 28 14:38:39 2006 +0100 (2006-04-28)
parents 8e78e6b391e0
children dc3c59367403
line source
1 /******************************************************************************
2 * config.h
3 *
4 * A Linux-style configuration list.
5 */
7 #ifndef __X86_CONFIG_H__
8 #define __X86_CONFIG_H__
10 #if defined(__x86_64__)
11 # define CONFIG_PAGING_LEVELS 4
12 #elif defined(CONFIG_X86_PAE)
13 # define CONFIG_PAGING_LEVELS 3
14 #else
15 # define CONFIG_PAGING_LEVELS 2
16 #endif
18 #define CONFIG_X86 1
19 #define CONFIG_X86_HT 1
20 #define CONFIG_SHADOW 1
21 #define CONFIG_SMP 1
22 #define CONFIG_X86_LOCAL_APIC 1
23 #define CONFIG_X86_GOOD_APIC 1
24 #define CONFIG_X86_IO_APIC 1
25 #define CONFIG_HPET_TIMER 1
26 #define CONFIG_X86_MCE_P4THERMAL 1
28 /* Intel P4 currently has largest cache line (L2 line size is 128 bytes). */
29 #define CONFIG_X86_L1_CACHE_SHIFT 7
31 #define CONFIG_ACPI 1
32 #define CONFIG_ACPI_BOOT 1
34 #define HZ 100
36 #define OPT_CONSOLE_STR "com1,vga"
38 #ifdef MAX_PHYS_CPUS
39 #define NR_CPUS MAX_PHYS_CPUS
40 #else
41 #define NR_CPUS 32
42 #endif
44 #if defined(__i386__) && (NR_CPUS > 32)
45 #error "Maximum of 32 physical processors supported by Xen on x86_32"
46 #endif
48 #ifdef CONFIG_X86_SUPERVISOR_MODE_KERNEL
49 # define supervisor_mode_kernel (1)
50 #else
51 # define supervisor_mode_kernel (0)
52 #endif
54 /* Linkage for x86 */
55 #define __ALIGN .align 16,0x90
56 #define __ALIGN_STR ".align 16,0x90"
57 #ifdef __ASSEMBLY__
58 #define ALIGN __ALIGN
59 #define ALIGN_STR __ALIGN_STR
60 #define ENTRY(name) \
61 .globl name; \
62 ALIGN; \
63 name:
64 #endif
66 #define barrier() __asm__ __volatile__("": : :"memory")
68 /* A power-of-two value greater than or equal to number of hypercalls. */
69 #define NR_hypercalls 64
71 #if NR_hypercalls & (NR_hypercalls - 1)
72 #error "NR_hypercalls must be a power-of-two value"
73 #endif
75 #ifndef NDEBUG
76 #define MEMORY_GUARD
77 #ifdef __x86_64__
78 #define STACK_ORDER 2
79 #endif
80 #endif
82 #ifndef STACK_ORDER
83 #define STACK_ORDER 1
84 #endif
85 #define STACK_SIZE (PAGE_SIZE << STACK_ORDER)
87 #define MAX_DMADOM_PFN 0x7FFFFUL /* 31 addressable bits */
89 #ifndef __ASSEMBLY__
90 extern unsigned long _end; /* standard ELF symbol */
91 #endif /* __ASSEMBLY__ */
93 #define FORCE_CRASH() __asm__ __volatile__ ( "ud2" )
95 #if defined(__x86_64__)
97 #define CONFIG_X86_64 1
99 #define asmlinkage
101 #define XENHEAP_DEFAULT_MB (16)
103 #define PML4_ENTRY_BITS 39
104 #ifndef __ASSEMBLY__
105 #define PML4_ENTRY_BYTES (1UL << PML4_ENTRY_BITS)
106 #define PML4_ADDR(_slot) \
107 ((((_slot ## UL) >> 8) * 0xffff000000000000UL) | \
108 (_slot ## UL << PML4_ENTRY_BITS))
109 #else
110 #define PML4_ENTRY_BYTES (1 << PML4_ENTRY_BITS)
111 #define PML4_ADDR(_slot) \
112 (((_slot >> 8) * 0xffff000000000000) | (_slot << PML4_ENTRY_BITS))
113 #endif
115 /*
116 * Memory layout:
117 * 0x0000000000000000 - 0x00007fffffffffff [128TB, 2^47 bytes, PML4:0-255]
118 * Guest-defined use.
119 * 0x0000800000000000 - 0xffff7fffffffffff [16EB]
120 * Inaccessible: current arch only supports 48-bit sign-extended VAs.
121 * 0xffff800000000000 - 0xffff803fffffffff [256GB, 2^38 bytes, PML4:256]
122 * Read-only machine-to-phys translation table (GUEST ACCESSIBLE).
123 * 0xffff804000000000 - 0xffff807fffffffff [256GB, 2^38 bytes, PML4:256]
124 * Reserved for future shared info with the guest OS (GUEST ACCESSIBLE).
125 * 0xffff808000000000 - 0xffff80ffffffffff [512GB, 2^39 bytes, PML4:257]
126 * Read-only guest linear page table (GUEST ACCESSIBLE).
127 * 0xffff810000000000 - 0xffff817fffffffff [512GB, 2^39 bytes, PML4:258]
128 * Guest linear page table.
129 * 0xffff818000000000 - 0xffff81ffffffffff [512GB, 2^39 bytes, PML4:259]
130 * Shadow linear page table.
131 * 0xffff820000000000 - 0xffff827fffffffff [512GB, 2^39 bytes, PML4:260]
132 * Per-domain mappings (e.g., GDT, LDT).
133 * 0xffff828000000000 - 0xffff8283ffffffff [16GB, 2^34 bytes, PML4:261]
134 * Machine-to-phys translation table.
135 * 0xffff828400000000 - 0xffff8287ffffffff [16GB, 2^34 bytes, PML4:261]
136 * Page-frame information array.
137 * 0xffff828800000000 - 0xffff828bffffffff [16GB, 2^34 bytes, PML4:261]
138 * ioremap()/fixmap area.
139 * 0xffff828c00000000 - 0xffff82ffffffffff [464GB, PML4:261]
140 * Reserved for future use.
141 * 0xffff830000000000 - 0xffff83ffffffffff [1TB, 2^40 bytes, PML4:262-263]
142 * 1:1 direct mapping of all physical memory. Xen and its heap live here.
143 * 0xffff840000000000 - 0xffff87ffffffffff [4TB, 2^42 bytes, PML4:264-271]
144 * Reserved for future use.
145 * 0xffff880000000000 - 0xffffffffffffffff [120TB, PML4:272-511]
146 * Guest-defined use.
147 */
150 #define ROOT_PAGETABLE_FIRST_XEN_SLOT 256
151 #define ROOT_PAGETABLE_LAST_XEN_SLOT 271
152 #define ROOT_PAGETABLE_XEN_SLOTS \
153 (ROOT_PAGETABLE_LAST_XEN_SLOT - ROOT_PAGETABLE_FIRST_XEN_SLOT + 1)
155 /* Hypervisor reserves PML4 slots 256 to 271 inclusive. */
156 #define HYPERVISOR_VIRT_START (PML4_ADDR(256))
157 #define HYPERVISOR_VIRT_END (HYPERVISOR_VIRT_START + PML4_ENTRY_BYTES*16)
158 /* Slot 256: read-only guest-accessible machine-to-phys translation table. */
159 #define RO_MPT_VIRT_START (PML4_ADDR(256))
160 #define RO_MPT_VIRT_END (RO_MPT_VIRT_START + PML4_ENTRY_BYTES/2)
161 /* Slot 257: read-only guest-accessible linear page table. */
162 #define RO_LINEAR_PT_VIRT_START (PML4_ADDR(257))
163 #define RO_LINEAR_PT_VIRT_END (RO_LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
164 /* Slot 258: linear page table (guest table). */
165 #define LINEAR_PT_VIRT_START (PML4_ADDR(258))
166 #define LINEAR_PT_VIRT_END (LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
167 /* Slot 259: linear page table (shadow table). */
168 #define SH_LINEAR_PT_VIRT_START (PML4_ADDR(259))
169 #define SH_LINEAR_PT_VIRT_END (SH_LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
170 /* Slot 260: per-domain mappings. */
171 #define PERDOMAIN_VIRT_START (PML4_ADDR(260))
172 #define PERDOMAIN_VIRT_END (PERDOMAIN_VIRT_START + (PERDOMAIN_MBYTES<<20))
173 #define PERDOMAIN_MBYTES ((unsigned long)GDT_LDT_MBYTES)
174 /* Slot 261: machine-to-phys conversion table (16GB). */
175 #define RDWR_MPT_VIRT_START (PML4_ADDR(261))
176 #define RDWR_MPT_VIRT_END (RDWR_MPT_VIRT_START + (16UL<<30))
177 /* Slot 261: page-frame information array (16GB). */
178 #define FRAMETABLE_VIRT_START (RDWR_MPT_VIRT_END)
179 #define FRAMETABLE_VIRT_END (FRAMETABLE_VIRT_START + (16UL<<30))
180 /* Slot 261: ioremap()/fixmap area (16GB). */
181 #define IOREMAP_VIRT_START (FRAMETABLE_VIRT_END)
182 #define IOREMAP_VIRT_END (IOREMAP_VIRT_START + (16UL<<30))
183 /* Slot 262-263: A direct 1:1 mapping of all of physical memory. */
184 #define DIRECTMAP_VIRT_START (PML4_ADDR(262))
185 #define DIRECTMAP_VIRT_END (DIRECTMAP_VIRT_START + PML4_ENTRY_BYTES*2)
187 #define PGT_base_page_table PGT_l4_page_table
189 #define __HYPERVISOR_CS64 0xe010
190 #define __HYPERVISOR_CS32 0xe008
191 #define __HYPERVISOR_CS __HYPERVISOR_CS64
192 #define __HYPERVISOR_DS64 0x0000
193 #define __HYPERVISOR_DS32 0xe018
194 #define __HYPERVISOR_DS __HYPERVISOR_DS64
196 #define __GUEST_CS64 0xe033
197 #define __GUEST_CS32 0xe023
198 #define __GUEST_CS __GUEST_CS64
199 #define __GUEST_DS 0x0000
200 #define __GUEST_SS 0xe02b
202 /* For generic assembly code: use macros to define operation/operand sizes. */
203 #define __OS "q" /* Operation Suffix */
204 #define __OP "r" /* Operand Prefix */
205 #define __FIXUP_ALIGN ".align 8"
206 #define __FIXUP_WORD ".quad"
208 #elif defined(__i386__)
210 #define CONFIG_X86_32 1
211 #define CONFIG_DOMAIN_PAGE 1
213 #define asmlinkage __attribute__((regparm(0)))
215 /*
216 * Memory layout (high to low): SIZE PAE-SIZE
217 * ------ ------
218 * I/O remapping area ( 4MB)
219 * Direct-map (1:1) area [Xen code/data/heap] (12MB)
220 * Per-domain mappings (inc. 4MB map_domain_page cache) ( 8MB)
221 * Shadow linear pagetable ( 4MB) ( 8MB)
222 * Guest linear pagetable ( 4MB) ( 8MB)
223 * Machine-to-physical translation table [writable] ( 4MB) (16MB)
224 * Frame-info table (24MB) (96MB)
225 * * Start of guest inaccessible area
226 * Machine-to-physical translation table [read-only] ( 4MB) (16MB)
227 * * Start of guest unmodifiable area
228 */
230 #define IOREMAP_MBYTES 4
231 #define DIRECTMAP_MBYTES 12
232 #define MAPCACHE_MBYTES 4
233 #define PERDOMAIN_MBYTES 8
235 #ifdef CONFIG_X86_PAE
236 # define LINEARPT_MBYTES 8
237 # define MACHPHYS_MBYTES 16 /* 1 MB needed per 1 GB memory */
238 # define FRAMETABLE_MBYTES (MACHPHYS_MBYTES * 6)
239 #else
240 # define LINEARPT_MBYTES 4
241 # define MACHPHYS_MBYTES 4
242 # define FRAMETABLE_MBYTES 24
243 #endif
245 #define IOREMAP_VIRT_END 0UL
246 #define IOREMAP_VIRT_START (IOREMAP_VIRT_END - (IOREMAP_MBYTES<<20))
247 #define DIRECTMAP_VIRT_END IOREMAP_VIRT_START
248 #define DIRECTMAP_VIRT_START (DIRECTMAP_VIRT_END - (DIRECTMAP_MBYTES<<20))
249 #define MAPCACHE_VIRT_END DIRECTMAP_VIRT_START
250 #define MAPCACHE_VIRT_START (MAPCACHE_VIRT_END - (MAPCACHE_MBYTES<<20))
251 #define PERDOMAIN_VIRT_END DIRECTMAP_VIRT_START
252 #define PERDOMAIN_VIRT_START (PERDOMAIN_VIRT_END - (PERDOMAIN_MBYTES<<20))
253 #define SH_LINEAR_PT_VIRT_END PERDOMAIN_VIRT_START
254 #define SH_LINEAR_PT_VIRT_START (SH_LINEAR_PT_VIRT_END - (LINEARPT_MBYTES<<20))
255 #define LINEAR_PT_VIRT_END SH_LINEAR_PT_VIRT_START
256 #define LINEAR_PT_VIRT_START (LINEAR_PT_VIRT_END - (LINEARPT_MBYTES<<20))
257 #define RDWR_MPT_VIRT_END LINEAR_PT_VIRT_START
258 #define RDWR_MPT_VIRT_START (RDWR_MPT_VIRT_END - (MACHPHYS_MBYTES<<20))
259 #define FRAMETABLE_VIRT_END RDWR_MPT_VIRT_START
260 #define FRAMETABLE_VIRT_START (FRAMETABLE_VIRT_END - (FRAMETABLE_MBYTES<<20))
261 #define RO_MPT_VIRT_END FRAMETABLE_VIRT_START
262 #define RO_MPT_VIRT_START (RO_MPT_VIRT_END - (MACHPHYS_MBYTES<<20))
264 #define XENHEAP_DEFAULT_MB (DIRECTMAP_MBYTES)
265 #define DIRECTMAP_PHYS_END (DIRECTMAP_MBYTES<<20)
267 /* Maximum linear address accessible via guest memory segments. */
268 #define GUEST_SEGMENT_MAX_ADDR RO_MPT_VIRT_END
270 #ifdef CONFIG_X86_PAE
271 /* Hypervisor owns top 168MB of virtual address space. */
272 #define HYPERVISOR_VIRT_START mk_unsigned_long(0xF5800000)
273 #else
274 /* Hypervisor owns top 64MB of virtual address space. */
275 #define HYPERVISOR_VIRT_START mk_unsigned_long(0xFC000000)
276 #endif
278 #define L2_PAGETABLE_FIRST_XEN_SLOT \
279 (HYPERVISOR_VIRT_START >> L2_PAGETABLE_SHIFT)
280 #define L2_PAGETABLE_LAST_XEN_SLOT \
281 (~0UL >> L2_PAGETABLE_SHIFT)
282 #define L2_PAGETABLE_XEN_SLOTS \
283 (L2_PAGETABLE_LAST_XEN_SLOT - L2_PAGETABLE_FIRST_XEN_SLOT + 1)
285 #ifdef CONFIG_X86_PAE
286 # define PGT_base_page_table PGT_l3_page_table
287 #else
288 # define PGT_base_page_table PGT_l2_page_table
289 #endif
291 #define __HYPERVISOR_CS 0xe008
292 #define __HYPERVISOR_DS 0xe010
294 /* For generic assembly code: use macros to define operation/operand sizes. */
295 #define __OS "l" /* Operation Suffix */
296 #define __OP "e" /* Operand Prefix */
297 #define __FIXUP_ALIGN ".align 4"
298 #define __FIXUP_WORD ".long"
300 #endif /* __i386__ */
302 #ifndef __ASSEMBLY__
303 extern unsigned long xenheap_phys_end; /* user-configurable */
304 #endif
306 /* GDT/LDT shadow mapping area. The first per-domain-mapping sub-area. */
307 #define GDT_LDT_VCPU_SHIFT 5
308 #define GDT_LDT_VCPU_VA_SHIFT (GDT_LDT_VCPU_SHIFT + PAGE_SHIFT)
309 #define GDT_LDT_MBYTES (MAX_VIRT_CPUS >> (20-GDT_LDT_VCPU_VA_SHIFT))
310 #define GDT_LDT_VIRT_START PERDOMAIN_VIRT_START
311 #define GDT_LDT_VIRT_END (GDT_LDT_VIRT_START + (GDT_LDT_MBYTES << 20))
313 /* The address of a particular VCPU's GDT or LDT. */
314 #define GDT_VIRT_START(v) \
315 (PERDOMAIN_VIRT_START + ((v)->vcpu_id << GDT_LDT_VCPU_VA_SHIFT))
316 #define LDT_VIRT_START(v) \
317 (GDT_VIRT_START(v) + (64*1024))
319 #define PDPT_L1_ENTRIES \
320 ((PERDOMAIN_VIRT_END - PERDOMAIN_VIRT_START) >> PAGE_SHIFT)
321 #define PDPT_L2_ENTRIES \
322 ((PDPT_L1_ENTRIES + (1 << PAGETABLE_ORDER) - 1) >> PAGETABLE_ORDER)
324 #if defined(__x86_64__)
325 #define ELFSIZE 64
326 #else
327 #define ELFSIZE 32
328 #endif
330 #endif /* __X86_CONFIG_H__ */