ia64/xen-unstable

view xen/include/asm-x86/domain.h @ 17443:80ba1b427032

x86: Emulate accesses to PCI window registers cf8/cfc to synchronise
with accesses by teh hypervisor itself. All users of cf8/cfc go
through new access functions which take the appropriate spinlock.

Based on a patch by Haitao Shan <haitao.shan@intel.com>

Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Apr 11 13:19:55 2008 +0100 (2008-04-11)
parents 9b635405ef90
children 18727843db60
line source
1 #ifndef __ASM_DOMAIN_H__
2 #define __ASM_DOMAIN_H__
4 #include <xen/config.h>
5 #include <xen/mm.h>
6 #include <asm/hvm/vcpu.h>
7 #include <asm/hvm/domain.h>
8 #include <asm/e820.h>
10 #define has_32bit_shinfo(d) ((d)->arch.has_32bit_shinfo)
11 #define is_pv_32bit_domain(d) ((d)->arch.is_32bit_pv)
12 #define is_pv_32bit_vcpu(v) (is_pv_32bit_domain((v)->domain))
13 #ifdef __x86_64__
14 #define is_pv_32on64_domain(d) (is_pv_32bit_domain(d))
15 #else
16 #define is_pv_32on64_domain(d) (0)
17 #endif
18 #define is_pv_32on64_vcpu(v) (is_pv_32on64_domain((v)->domain))
19 #define IS_COMPAT(d) (is_pv_32on64_domain(d))
21 struct trap_bounce {
22 uint32_t error_code;
23 uint8_t flags; /* TBF_ */
24 uint16_t cs;
25 unsigned long eip;
26 };
28 #define MAPHASH_ENTRIES 8
29 #define MAPHASH_HASHFN(pfn) ((pfn) & (MAPHASH_ENTRIES-1))
30 #define MAPHASHENT_NOTINUSE ((u16)~0U)
31 struct mapcache_vcpu {
32 /* Shadow of mapcache_domain.epoch. */
33 unsigned int shadow_epoch;
35 /* Lock-free per-VCPU hash of recently-used mappings. */
36 struct vcpu_maphash_entry {
37 unsigned long mfn;
38 uint16_t idx;
39 uint16_t refcnt;
40 } hash[MAPHASH_ENTRIES];
41 };
43 #define MAPCACHE_ORDER 10
44 #define MAPCACHE_ENTRIES (1 << MAPCACHE_ORDER)
45 struct mapcache_domain {
46 /* The PTEs that provide the mappings, and a cursor into the array. */
47 l1_pgentry_t *l1tab;
48 unsigned int cursor;
50 /* Protects map_domain_page(). */
51 spinlock_t lock;
53 /* Garbage mappings are flushed from TLBs in batches called 'epochs'. */
54 unsigned int epoch;
55 u32 tlbflush_timestamp;
57 /* Which mappings are in use, and which are garbage to reap next epoch? */
58 unsigned long inuse[BITS_TO_LONGS(MAPCACHE_ENTRIES)];
59 unsigned long garbage[BITS_TO_LONGS(MAPCACHE_ENTRIES)];
60 };
62 void mapcache_domain_init(struct domain *);
63 void mapcache_vcpu_init(struct vcpu *);
65 /* x86/64: toggle guest between kernel and user modes. */
66 void toggle_guest_mode(struct vcpu *);
68 /*
69 * Initialise a hypercall-transfer page. The given pointer must be mapped
70 * in Xen virtual address space (accesses are not validated or checked).
71 */
72 void hypercall_page_initialise(struct domain *d, void *);
74 /************************************************/
75 /* shadow paging extension */
76 /************************************************/
77 struct shadow_domain {
78 spinlock_t lock; /* shadow domain lock */
79 int locker; /* processor which holds the lock */
80 const char *locker_function; /* Func that took it */
81 unsigned int opt_flags; /* runtime tunable optimizations on/off */
82 struct list_head pinned_shadows;
84 /* Memory allocation */
85 struct list_head freelists[SHADOW_MAX_ORDER + 1];
86 struct list_head p2m_freelist;
87 unsigned int total_pages; /* number of pages allocated */
88 unsigned int free_pages; /* number of pages on freelists */
89 unsigned int p2m_pages; /* number of pages allocates to p2m */
91 /* 1-to-1 map for use when HVM vcpus have paging disabled */
92 pagetable_t unpaged_pagetable;
94 /* Shadow hashtable */
95 struct shadow_page_info **hash_table;
96 int hash_walking; /* Some function is walking the hash table */
98 /* Fast MMIO path heuristic */
99 int has_fast_mmio_entries;
101 /* reflect guest table dirty status, incremented by write
102 * emulation and remove write permission
103 */
104 atomic_t gtable_dirty_version;
105 };
107 struct shadow_vcpu {
108 #if CONFIG_PAGING_LEVELS >= 3
109 /* PAE guests: per-vcpu shadow top-level table */
110 l3_pgentry_t l3table[4] __attribute__((__aligned__(32)));
111 /* PAE guests: per-vcpu cache of the top-level *guest* entries */
112 l3_pgentry_t gl3e[4] __attribute__((__aligned__(32)));
113 #endif
114 /* Non-PAE guests: pointer to guest top-level pagetable */
115 void *guest_vtable;
116 /* Last MFN that we emulated a write to as unshadow heuristics. */
117 unsigned long last_emulated_mfn_for_unshadow;
118 /* MFN of the last shadow that we shot a writeable mapping in */
119 unsigned long last_writeable_pte_smfn;
120 /* Last frame number that we emulated a write to. */
121 unsigned long last_emulated_frame;
122 /* Last MFN that we emulated a write successfully */
123 unsigned long last_emulated_mfn;
124 };
126 /************************************************/
127 /* hardware assisted paging */
128 /************************************************/
129 struct hap_domain {
130 spinlock_t lock;
131 int locker;
132 const char *locker_function;
134 struct list_head freelist;
135 unsigned int total_pages; /* number of pages allocated */
136 unsigned int free_pages; /* number of pages on freelists */
137 unsigned int p2m_pages; /* number of pages allocates to p2m */
138 };
140 /************************************************/
141 /* common paging data structure */
142 /************************************************/
143 struct log_dirty_domain {
144 /* log-dirty lock */
145 spinlock_t lock;
146 int locker; /* processor that holds the lock */
147 const char *locker_function; /* func that took it */
149 /* log-dirty radix tree to record dirty pages */
150 mfn_t top;
151 unsigned int allocs;
152 unsigned int failed_allocs;
154 /* log-dirty mode stats */
155 unsigned int fault_count;
156 unsigned int dirty_count;
158 /* functions which are paging mode specific */
159 int (*enable_log_dirty )(struct domain *d);
160 int (*disable_log_dirty )(struct domain *d);
161 void (*clean_dirty_bitmap )(struct domain *d);
162 };
164 struct paging_domain {
165 /* flags to control paging operation */
166 u32 mode;
167 /* extension for shadow paging support */
168 struct shadow_domain shadow;
169 /* extension for hardware-assited paging */
170 struct hap_domain hap;
171 /* log dirty support */
172 struct log_dirty_domain log_dirty;
173 };
175 struct paging_vcpu {
176 /* Pointers to mode-specific entry points. */
177 struct paging_mode *mode;
178 /* HVM guest: last emulate was to a pagetable */
179 unsigned int last_write_was_pt:1;
180 /* HVM guest: last write emulation succeeds */
181 unsigned int last_write_emul_ok:1;
182 /* Translated guest: virtual TLB */
183 struct shadow_vtlb *vtlb;
184 spinlock_t vtlb_lock;
186 /* paging support extension */
187 struct shadow_vcpu shadow;
188 };
190 struct p2m_domain;
192 struct arch_domain
193 {
194 l1_pgentry_t *mm_perdomain_pt;
195 #ifdef CONFIG_X86_64
196 l2_pgentry_t *mm_perdomain_l2;
197 l3_pgentry_t *mm_perdomain_l3;
198 #endif
200 #ifdef CONFIG_X86_32
201 /* map_domain_page() mapping cache. */
202 struct mapcache_domain mapcache;
203 #endif
205 #ifdef CONFIG_COMPAT
206 unsigned int hv_compat_vstart;
207 l3_pgentry_t *mm_arg_xlat_l3;
208 #endif
210 /* I/O-port admin-specified access capabilities. */
211 struct rangeset *ioport_caps;
212 uint32_t pci_cf8;
214 struct hvm_domain hvm_domain;
216 struct paging_domain paging;
217 struct p2m_domain *p2m;
219 /* Shadow translated domain: P2M mapping */
220 pagetable_t phys_table;
222 /* Pseudophysical e820 map (XENMEM_memory_map). */
223 struct e820entry e820[3];
224 unsigned int nr_e820;
226 /* Maximum physical-address bitwidth supported by this guest. */
227 unsigned int physaddr_bitsize;
229 /* Is a 32-bit PV (non-HVM) guest? */
230 bool_t is_32bit_pv;
231 /* Is shared-info page in 32-bit format? */
232 bool_t has_32bit_shinfo;
234 /* Continuable domain_relinquish_resources(). */
235 enum {
236 RELMEM_not_started,
237 RELMEM_xen_l4,
238 RELMEM_dom_l4,
239 RELMEM_xen_l3,
240 RELMEM_dom_l3,
241 RELMEM_xen_l2,
242 RELMEM_dom_l2,
243 RELMEM_done,
244 } relmem;
245 struct list_head relmem_list;
246 } __cacheline_aligned;
248 #ifdef CONFIG_X86_PAE
249 struct pae_l3_cache {
250 /*
251 * Two low-memory (<4GB) PAE L3 tables, used as fallback when the guest
252 * supplies a >=4GB PAE L3 table. We need two because we cannot set up
253 * an L3 table while we are currently running on it (without using
254 * expensive atomic 64-bit operations).
255 */
256 l3_pgentry_t table[2][4] __attribute__((__aligned__(32)));
257 unsigned long high_mfn; /* The >=4GB MFN being shadowed. */
258 unsigned int inuse_idx; /* Which of the two cache slots is in use? */
259 spinlock_t lock;
260 };
261 #define pae_l3_cache_init(c) spin_lock_init(&(c)->lock)
262 #else /* !CONFIG_X86_PAE */
263 struct pae_l3_cache { };
264 #define pae_l3_cache_init(c) ((void)0)
265 #endif
267 struct arch_vcpu
268 {
269 /* Needs 16-byte aligment for FXSAVE/FXRSTOR. */
270 struct vcpu_guest_context guest_context
271 __attribute__((__aligned__(16)));
273 struct pae_l3_cache pae_l3_cache;
275 unsigned long flags; /* TF_ */
277 void (*schedule_tail) (struct vcpu *);
279 void (*ctxt_switch_from) (struct vcpu *);
280 void (*ctxt_switch_to) (struct vcpu *);
282 /* Record information required to continue execution after migration */
283 void *continue_info;
285 /* Bounce information for propagating an exception to guest OS. */
286 struct trap_bounce trap_bounce;
288 /* I/O-port access bitmap. */
289 XEN_GUEST_HANDLE(uint8) iobmp; /* Guest kernel vaddr of the bitmap. */
290 int iobmp_limit; /* Number of ports represented in the bitmap. */
291 int iopl; /* Current IOPL for this VCPU. */
293 #ifdef CONFIG_X86_32
294 struct desc_struct int80_desc;
295 #endif
296 #ifdef CONFIG_X86_64
297 struct trap_bounce int80_bounce;
298 unsigned long syscall32_callback_eip;
299 unsigned long sysenter_callback_eip;
300 unsigned short syscall32_callback_cs;
301 unsigned short sysenter_callback_cs;
302 bool_t syscall32_disables_events;
303 bool_t sysenter_disables_events;
304 #endif
306 /* Virtual Machine Extensions */
307 struct hvm_vcpu hvm_vcpu;
309 /*
310 * Every domain has a L1 pagetable of its own. Per-domain mappings
311 * are put in this table (eg. the current GDT is mapped here).
312 */
313 l1_pgentry_t *perdomain_ptes;
315 #ifdef CONFIG_X86_64
316 pagetable_t guest_table_user; /* (MFN) x86/64 user-space pagetable */
317 #endif
318 pagetable_t guest_table; /* (MFN) guest notion of cr3 */
319 /* guest_table holds a ref to the page, and also a type-count unless
320 * shadow refcounts are in use */
321 pagetable_t shadow_table[4]; /* (MFN) shadow(s) of guest */
322 pagetable_t monitor_table; /* (MFN) hypervisor PT (for HVM) */
323 unsigned long cr3; /* (MA) value to install in HW CR3 */
325 /* Current LDT details. */
326 unsigned long shadow_ldt_mapcnt;
328 struct paging_vcpu paging;
330 /* Guest-specified relocation of vcpu_info. */
331 unsigned long vcpu_info_mfn;
333 #ifdef CONFIG_X86_32
334 /* map_domain_page() mapping cache. */
335 struct mapcache_vcpu mapcache;
336 #endif
338 } __cacheline_aligned;
340 /* Shorthands to improve code legibility. */
341 #define hvm_vmx hvm_vcpu.u.vmx
342 #define hvm_svm hvm_vcpu.u.svm
344 /* Continue the current hypercall via func(data) on specified cpu. */
345 int continue_hypercall_on_cpu(int cpu, long (*func)(void *data), void *data);
347 /* Clean up CR4 bits that are not under guest control. */
348 unsigned long pv_guest_cr4_fixup(unsigned long guest_cr4);
350 /* Convert between guest-visible and real CR4 values. */
351 #define pv_guest_cr4_to_real_cr4(c) \
352 (((c) | (mmu_cr4_features & (X86_CR4_PGE | X86_CR4_PSE))) & ~X86_CR4_DE)
353 #define real_cr4_to_pv_guest_cr4(c) \
354 ((c) & ~(X86_CR4_PGE | X86_CR4_PSE))
356 #endif /* __ASM_DOMAIN_H__ */
358 /*
359 * Local variables:
360 * mode: C
361 * c-set-style: "BSD"
362 * c-basic-offset: 4
363 * tab-width: 4
364 * indent-tabs-mode: nil
365 * End:
366 */