ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-x86_64/mach-xen/asm/io.h @ 11221:7c9d7fc3dce5

[HVM] Fix SMBIOS entry point copy destination.
Spotted by Xiaowei Yang <xiaowei.yang@intel.com>
Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@localhost.localdomain
date Sat Aug 19 12:06:36 2006 +0100 (2006-08-19)
parents b765c96f8127
children 395aa5609e6d
line source
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
4 #include <linux/config.h>
5 #include <asm/fixmap.h>
7 /*
8 * This file contains the definitions for the x86 IO instructions
9 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
10 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
11 * versions of the single-IO instructions (inb_p/inw_p/..).
12 *
13 * This file is not meant to be obfuscating: it's just complicated
14 * to (a) handle it all in a way that makes gcc able to optimize it
15 * as well as possible and (b) trying to avoid writing the same thing
16 * over and over again with slight variations and possibly making a
17 * mistake somewhere.
18 */
20 /*
21 * Thanks to James van Artsdalen for a better timing-fix than
22 * the two short jumps: using outb's to a nonexistent port seems
23 * to guarantee better timings even on fast machines.
24 *
25 * On the other hand, I'd like to be sure of a non-existent port:
26 * I feel a bit unsafe about using 0x80 (should be safe, though)
27 *
28 * Linus
29 */
31 /*
32 * Bit simplified and optimized by Jan Hubicka
33 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
34 *
35 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
36 * isa_read[wl] and isa_write[wl] fixed
37 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
38 */
40 #define __SLOW_DOWN_IO "\noutb %%al,$0x80"
42 #ifdef REALLY_SLOW_IO
43 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
44 #else
45 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO
46 #endif
48 /*
49 * Talk about misusing macros..
50 */
51 #define __OUT1(s,x) \
52 static inline void out##s(unsigned x value, unsigned short port) {
54 #define __OUT2(s,s1,s2) \
55 __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
57 #define __OUT(s,s1,x) \
58 __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
59 __OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} \
61 #define __IN1(s) \
62 static inline RETURN_TYPE in##s(unsigned short port) { RETURN_TYPE _v;
64 #define __IN2(s,s1,s2) \
65 __asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
67 #define __IN(s,s1,i...) \
68 __IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
69 __IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
71 #define __INS(s) \
72 static inline void ins##s(unsigned short port, void * addr, unsigned long count) \
73 { __asm__ __volatile__ ("rep ; ins" #s \
74 : "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
76 #define __OUTS(s) \
77 static inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
78 { __asm__ __volatile__ ("rep ; outs" #s \
79 : "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
81 #define RETURN_TYPE unsigned char
82 __IN(b,"")
83 #undef RETURN_TYPE
84 #define RETURN_TYPE unsigned short
85 __IN(w,"")
86 #undef RETURN_TYPE
87 #define RETURN_TYPE unsigned int
88 __IN(l,"")
89 #undef RETURN_TYPE
91 __OUT(b,"b",char)
92 __OUT(w,"w",short)
93 __OUT(l,,int)
95 __INS(b)
96 __INS(w)
97 __INS(l)
99 __OUTS(b)
100 __OUTS(w)
101 __OUTS(l)
103 #define IO_SPACE_LIMIT 0xffff
105 #if defined(__KERNEL__) && __x86_64__
107 #include <linux/vmalloc.h>
109 #ifndef __i386__
110 /*
111 * Change virtual addresses to physical addresses and vv.
112 * These are pretty trivial
113 */
114 static inline unsigned long virt_to_phys(volatile void * address)
115 {
116 return __pa(address);
117 }
119 static inline void * phys_to_virt(unsigned long address)
120 {
121 return __va(address);
122 }
124 #define virt_to_bus(_x) phys_to_machine(__pa(_x))
125 #define bus_to_virt(_x) __va(machine_to_phys(_x))
126 #endif
128 /*
129 * Change "struct page" to physical address.
130 */
131 #define page_to_pseudophys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
132 #define page_to_phys(page) (phys_to_machine(page_to_pseudophys(page)))
133 #define page_to_bus(page) (phys_to_machine(page_to_pseudophys(page)))
135 #define bio_to_pseudophys(bio) (page_to_pseudophys(bio_page((bio))) + \
136 (unsigned long) bio_offset((bio)))
137 #define bvec_to_pseudophys(bv) (page_to_pseudophys((bv)->bv_page) + \
138 (unsigned long) (bv)->bv_offset)
140 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
141 (((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2))) && \
142 ((bvec_to_pseudophys((vec1)) + (vec1)->bv_len) == \
143 bvec_to_pseudophys((vec2))))
145 #include <asm-generic/iomap.h>
147 extern void __iomem *__ioremap(unsigned long offset, unsigned long size, unsigned long flags);
149 static inline void __iomem * ioremap (unsigned long offset, unsigned long size)
150 {
151 return __ioremap(offset, size, 0);
152 }
154 /*
155 * This one maps high address device memory and turns off caching for that area.
156 * it's useful if some control registers are in such an area and write combining
157 * or read caching is not desirable:
158 */
159 extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size);
160 extern void iounmap(volatile void __iomem *addr);
162 /* Use normal IO mappings for DMI */
163 #define dmi_ioremap ioremap
164 #define dmi_iounmap(x,l) iounmap(x)
165 #define dmi_alloc(l) kmalloc(l, GFP_ATOMIC)
167 /*
168 * ISA I/O bus memory addresses are 1:1 with the physical address.
169 */
171 #define isa_virt_to_bus(_x) isa_virt_to_bus_is_UNSUPPORTED->x
172 #define isa_page_to_bus(_x) isa_page_to_bus_is_UNSUPPORTED->x
173 #define isa_bus_to_virt(_x) (void *)(__fix_to_virt(FIX_ISAMAP_BEGIN) + (_x))
175 /*
176 * However PCI ones are not necessarily 1:1 and therefore these interfaces
177 * are forbidden in portable PCI drivers.
178 *
179 * Allow them on x86 for legacy drivers, though.
180 */
181 #define virt_to_bus(_x) phys_to_machine(__pa(_x))
182 #define bus_to_virt(_x) __va(machine_to_phys(_x))
184 /*
185 * readX/writeX() are used to access memory mapped devices. On some
186 * architectures the memory mapped IO stuff needs to be accessed
187 * differently. On the x86 architecture, we just read/write the
188 * memory location directly.
189 */
191 static inline __u8 __readb(const volatile void __iomem *addr)
192 {
193 return *(__force volatile __u8 *)addr;
194 }
195 static inline __u16 __readw(const volatile void __iomem *addr)
196 {
197 return *(__force volatile __u16 *)addr;
198 }
199 static inline __u32 __readl(const volatile void __iomem *addr)
200 {
201 return *(__force volatile __u32 *)addr;
202 }
203 static inline __u64 __readq(const volatile void __iomem *addr)
204 {
205 return *(__force volatile __u64 *)addr;
206 }
207 #define readb(x) __readb(x)
208 #define readw(x) __readw(x)
209 #define readl(x) __readl(x)
210 #define readq(x) __readq(x)
211 #define readb_relaxed(a) readb(a)
212 #define readw_relaxed(a) readw(a)
213 #define readl_relaxed(a) readl(a)
214 #define readq_relaxed(a) readq(a)
215 #define __raw_readb readb
216 #define __raw_readw readw
217 #define __raw_readl readl
218 #define __raw_readq readq
220 #define mmiowb()
222 #ifdef CONFIG_UNORDERED_IO
223 static inline void __writel(__u32 val, volatile void __iomem *addr)
224 {
225 volatile __u32 __iomem *target = addr;
226 asm volatile("movnti %1,%0"
227 : "=m" (*target)
228 : "r" (val) : "memory");
229 }
231 static inline void __writeq(__u64 val, volatile void __iomem *addr)
232 {
233 volatile __u64 __iomem *target = addr;
234 asm volatile("movnti %1,%0"
235 : "=m" (*target)
236 : "r" (val) : "memory");
237 }
238 #else
239 static inline void __writel(__u32 b, volatile void __iomem *addr)
240 {
241 *(__force volatile __u32 *)addr = b;
242 }
243 static inline void __writeq(__u64 b, volatile void __iomem *addr)
244 {
245 *(__force volatile __u64 *)addr = b;
246 }
247 #endif
248 static inline void __writeb(__u8 b, volatile void __iomem *addr)
249 {
250 *(__force volatile __u8 *)addr = b;
251 }
252 static inline void __writew(__u16 b, volatile void __iomem *addr)
253 {
254 *(__force volatile __u16 *)addr = b;
255 }
256 #define writeq(val,addr) __writeq((val),(addr))
257 #define writel(val,addr) __writel((val),(addr))
258 #define writew(val,addr) __writew((val),(addr))
259 #define writeb(val,addr) __writeb((val),(addr))
260 #define __raw_writeb writeb
261 #define __raw_writew writew
262 #define __raw_writel writel
263 #define __raw_writeq writeq
265 void __memcpy_fromio(void*,unsigned long,unsigned);
266 void __memcpy_toio(unsigned long,const void*,unsigned);
268 static inline void memcpy_fromio(void *to, const volatile void __iomem *from, unsigned len)
269 {
270 __memcpy_fromio(to,(unsigned long)from,len);
271 }
272 static inline void memcpy_toio(volatile void __iomem *to, const void *from, unsigned len)
273 {
274 __memcpy_toio((unsigned long)to,from,len);
275 }
277 void memset_io(volatile void __iomem *a, int b, size_t c);
279 /*
280 * ISA space is 'always mapped' on a typical x86 system, no need to
281 * explicitly ioremap() it. The fact that the ISA IO space is mapped
282 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
283 * are physical addresses. The following constant pointer can be
284 * used as the IO-area pointer (it can be iounmapped as well, so the
285 * analogy with PCI is quite large):
286 */
287 #define __ISA_IO_base ((char __iomem *)(fix_to_virt(FIX_ISAMAP_BEGIN)))
289 #define isa_readb(a) readb(__ISA_IO_base + (a))
290 #define isa_readw(a) readw(__ISA_IO_base + (a))
291 #define isa_readl(a) readl(__ISA_IO_base + (a))
292 #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
293 #define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
294 #define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
295 #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
296 #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
297 #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
300 /*
301 * Again, x86-64 does not require mem IO specific function.
302 */
304 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(b),(c),(d))
305 #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(__ISA_IO_base + (b)),(c),(d))
307 /**
308 * check_signature - find BIOS signatures
309 * @io_addr: mmio address to check
310 * @signature: signature block
311 * @length: length of signature
312 *
313 * Perform a signature comparison with the mmio address io_addr. This
314 * address should have been obtained by ioremap.
315 * Returns 1 on a match.
316 */
318 static inline int check_signature(void __iomem *io_addr,
319 const unsigned char *signature, int length)
320 {
321 int retval = 0;
322 do {
323 if (readb(io_addr) != *signature)
324 goto out;
325 io_addr++;
326 signature++;
327 length--;
328 } while (length);
329 retval = 1;
330 out:
331 return retval;
332 }
334 /* Nothing to do */
336 #define dma_cache_inv(_start,_size) do { } while (0)
337 #define dma_cache_wback(_start,_size) do { } while (0)
338 #define dma_cache_wback_inv(_start,_size) do { } while (0)
340 #define flush_write_buffers()
342 extern int iommu_bio_merge;
343 #define BIO_VMERGE_BOUNDARY iommu_bio_merge
345 /*
346 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
347 * access
348 */
349 #define xlate_dev_mem_ptr(p) __va(p)
351 /*
352 * Convert a virtual cached pointer to an uncached pointer
353 */
354 #define xlate_dev_kmem_ptr(p) p
356 #endif /* __KERNEL__ */
358 #define ARCH_HAS_DEV_MEM
360 #endif