ia64/xen-unstable

view xen/include/asm-ia64/vmmu.h @ 9765:7c7bcf173f8b

[IA64] cleanup vtlb code

This patch is to clean up vtlb code.

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
author awilliam@xenbuild.aw
date Tue Apr 25 20:53:38 2006 -0600 (2006-04-25)
parents 695aa28b7cb1
children 18b087bafac6
line source
2 /* -*- Mode:C; c-basic-offset:4; tab-width:4; indent-tabs-mode:nil -*- */
3 /*
4 * vmmu.h: virtual memory management unit related APIs and data structure.
5 * Copyright (c) 2004, Intel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
18 * Place - Suite 330, Boston, MA 02111-1307 USA.
19 *
20 * Yaozu Dong (Eddie Dong) (Eddie.dong@intel.com)
21 */
23 #ifndef XEN_TLBthash_H
24 #define XEN_TLBthash_H
26 #define MAX_CCN_DEPTH 15 // collision chain depth
27 #define VCPU_VTLB_SHIFT (20) // 1M for VTLB
28 #define VCPU_VTLB_SIZE (1UL<<VCPU_VTLB_SHIFT)
29 #define VCPU_VTLB_ORDER (VCPU_VTLB_SHIFT - PAGE_SHIFT)
30 #define VCPU_VHPT_SHIFT (24) // 16M for VTLB
31 #define VCPU_VHPT_SIZE (1UL<<VCPU_VHPT_SHIFT)
32 #define VCPU_VHPT_ORDER (VCPU_VHPT_SHIFT - PAGE_SHIFT)
33 #define VTLB(v,_x) (v->arch.vtlb._x)
34 #define VHPT(v,_x) (v->arch.vhpt._x)
35 #ifndef __ASSEMBLY__
37 #include <xen/config.h>
38 #include <xen/types.h>
39 #include <public/xen.h>
40 #include <asm/tlb.h>
41 #include <asm/regionreg.h>
42 #include <asm/vmx_mm_def.h>
43 //#define THASH_TLB_TR 0
44 //#define THASH_TLB_TC 1
47 // bit definition of TR, TC search cmobination
48 //#define THASH_SECTION_TR (1<<0)
49 //#define THASH_SECTION_TC (1<<1)
51 /*
52 * Next bit definition must be same with THASH_TLB_XX
53 #define PTA_BASE_SHIFT (15)
54 */
59 #define HIGH_32BITS(x) bits(x,32,63)
60 #define LOW_32BITS(x) bits(x,0,31)
62 typedef union search_section {
63 struct {
64 u32 tr : 1;
65 u32 tc : 1;
66 u32 rsv: 30;
67 };
68 u32 v;
69 } search_section_t;
72 enum {
73 ISIDE_TLB=0,
74 DSIDE_TLB=1
75 };
76 #define VTLB_PTE_P_BIT 0
77 #define VTLB_PTE_IO_BIT 60
78 #define VTLB_PTE_IO (1UL<<VTLB_PTE_IO_BIT)
79 #define VTLB_PTE_P (1UL<<VTLB_PTE_P_BIT)
80 typedef struct thash_data {
81 union {
82 struct {
83 u64 p : 1; // 0
84 u64 rv1 : 1; // 1
85 u64 ma : 3; // 2-4
86 u64 a : 1; // 5
87 u64 d : 1; // 6
88 u64 pl : 2; // 7-8
89 u64 ar : 3; // 9-11
90 u64 ppn : 38; // 12-49
91 u64 rv2 : 2; // 50-51
92 u64 ed : 1; // 52
93 u64 ig1 : 3; // 53-63
94 };
95 struct {
96 u64 __rv1 : 53; // 0-52
97 u64 contiguous : 1; //53
98 u64 tc : 1; // 54 TR or TC
99 u64 cl : 1; // 55 I side or D side cache line
100 // next extension to ig1, only for TLB instance
101 u64 len : 4; // 56-59
102 u64 io : 1; // 60 entry is for io or not
103 u64 nomap : 1; // 61 entry cann't be inserted into machine TLB.
104 u64 checked : 1; // 62 for VTLB/VHPT sanity check
105 u64 invalid : 1; // 63 invalid entry
106 };
107 u64 page_flags;
108 }; // same for VHPT and TLB
110 union {
111 struct {
112 u64 rv3 : 2; // 0-1
113 u64 ps : 6; // 2-7
114 u64 key : 24; // 8-31
115 u64 rv4 : 32; // 32-63
116 };
117 // struct {
118 // u64 __rv3 : 32; // 0-31
119 // next extension to rv4
120 // u64 rid : 24; // 32-55
121 // u64 __rv4 : 8; // 56-63
122 // };
123 u64 itir;
124 };
125 union {
126 struct { // For TLB
127 u64 ig2 : 12; // 0-11
128 u64 vpn : 49; // 12-60
129 u64 vrn : 3; // 61-63
130 };
131 u64 vadr;
132 u64 ifa;
133 struct { // For VHPT
134 u64 tag : 63; // 0-62
135 u64 ti : 1; // 63, invalid entry for VHPT
136 };
137 u64 etag; // extended tag for VHPT
138 };
139 union {
140 struct thash_data *next;
141 u64 rid; // only used in guest TR
142 // u64 tr_idx;
143 };
144 } thash_data_t;
146 #define INVALIDATE_VHPT_HEADER(hdata) \
147 { ((hdata)->page_flags)=0; \
148 ((hdata)->ti)=1; \
149 ((hdata)->next)=0; }
151 #define INVALIDATE_TLB_HEADER(hdata) \
152 { ((hdata)->page_flags)=0; \
153 ((hdata)->ti)=1; \
154 ((hdata)->next)=0; }
156 #define INVALID_VHPT(hdata) ((hdata)->ti)
157 #define INVALID_TLB(hdata) ((hdata)->ti)
158 #define INVALID_TR(hdata) (!(hdata)->p)
159 #define INVALID_ENTRY(hcb, hdata) INVALID_VHPT(hdata)
161 /* ((hcb)->ht==THASH_TLB ? INVALID_TLB(hdata) : INVALID_VHPT(hdata)) */
164 /*
165 * Architecture ppn is in 4KB unit while XEN
166 * page may be different(1<<PAGE_SHIFT).
167 */
168 static inline u64 arch_to_xen_ppn(u64 appn)
169 {
170 return (appn >>(PAGE_SHIFT-ARCH_PAGE_SHIFT));
171 }
173 static inline u64 xen_to_arch_ppn(u64 xppn)
174 {
175 return (xppn <<(PAGE_SHIFT- ARCH_PAGE_SHIFT));
176 }
178 typedef enum {
179 THASH_TLB=0,
180 THASH_VHPT
181 } THASH_TYPE;
183 struct thash_cb;
184 /*
185 * Use to calculate the HASH index of thash_data_t.
186 */
187 typedef u64 *(THASH_FN)(PTA pta, u64 va);
188 typedef u64 *(TTAG_FN)(PTA pta, u64 va);
189 typedef u64 *(GET_MFN_FN)(domid_t d, u64 gpfn, u64 pages);
190 typedef void *(REM_NOTIFIER_FN)(struct thash_cb *hcb, thash_data_t *entry);
191 typedef void (RECYCLE_FN)(struct thash_cb *hc, u64 para);
192 typedef ia64_rr (GET_RR_FN)(struct vcpu *vcpu, u64 reg);
193 typedef thash_data_t *(FIND_OVERLAP_FN)(struct thash_cb *hcb,
194 u64 va, u64 ps, int rid, char cl, search_section_t s_sect);
195 typedef thash_data_t *(FIND_NEXT_OVL_FN)(struct thash_cb *hcb);
196 typedef void (REM_THASH_FN)(struct thash_cb *hcb, thash_data_t *entry);
197 typedef void (INS_THASH_FN)(struct thash_cb *hcb, thash_data_t *entry, u64 va);
199 //typedef struct tlb_special {
200 // thash_data_t itr[NITRS];
201 // thash_data_t dtr[NDTRS];
202 // struct thash_cb *vhpt;
203 //} tlb_special_t;
205 //typedef struct vhpt_cb {
206 //u64 pta; // pta value.
207 // GET_MFN_FN *get_mfn;
208 // TTAG_FN *tag_func;
209 //} vhpt_special;
210 /*
211 typedef struct thash_internal {
212 thash_data_t *hash_base;
213 thash_data_t *cur_cch; // head of overlap search
214 int rid;
215 int ps;
216 union {
217 u64 tag; // for VHPT
218 struct { // for TLB
219 char _tr_idx; // -1: means done of TR search
220 char cl;
221 search_section_t s_sect; // search section combinations
222 };
223 };
224 u64 _curva; // current address to search
225 u64 _eva;
226 } thash_internal_t;
227 */
228 //#define THASH_CB_MAGIC 0x55aa00aa55aa55aaUL
229 typedef struct thash_cb {
230 /* THASH base information */
231 // THASH_TYPE ht; // For TLB or VHPT
232 // u64 magic;
233 thash_data_t *hash; // hash table pointer, aligned at thash_sz.
234 u64 hash_sz; // size of above data.
235 void *cch_buf; // base address of collision chain.
236 u64 cch_sz; // size of above data.
237 // THASH_FN *hash_func;
238 // GET_RR_FN *get_rr_fn;
239 // RECYCLE_FN *recycle_notifier;
240 thash_data_t *cch_freelist;
241 // struct vcpu *vcpu;
242 PTA pta;
243 // struct thash_cb *vhpt;
244 /* VTLB/VHPT common information */
245 // FIND_OVERLAP_FN *find_overlap;
246 // FIND_NEXT_OVL_FN *next_overlap;
247 // REM_THASH_FN *rem_hash; // remove hash entry.
248 // INS_THASH_FN *ins_hash; // insert hash entry.
249 // REM_NOTIFIER_FN *remove_notifier;
250 /* private information */
251 // thash_internal_t priv;
252 // union {
253 // tlb_special_t *ts;
254 // vhpt_special *vs;
255 // };
256 // Internal positon information, buffer and storage etc. TBD
257 } thash_cb_t;
259 //#define ITR(hcb,id) ((hcb)->ts->itr[id])
260 //#define DTR(hcb,id) ((hcb)->ts->dtr[id])
261 #define INVALIDATE_HASH_HEADER(hcb,hash) INVALIDATE_TLB_HEADER(hash)
262 /* \
263 { if ((hcb)->ht==THASH_TLB){ \
264 INVALIDATE_TLB_HEADER(hash); \
265 }else{ \
266 INVALIDATE_VHPT_HEADER(hash); \
267 } \
268 }
269 */
270 #define PURGABLE_ENTRY(hcb,en) 1
271 // ((hcb)->ht == THASH_VHPT || ( (en)->tc && !(en->locked)) )
274 /*
275 * Initialize internal control data before service.
276 */
277 extern void thash_init(thash_cb_t *hcb, u64 sz);
279 /*
280 * Insert an entry to hash table.
281 * NOTES:
282 * 1: TLB entry may be TR, TC or Foreign Map. For TR entry,
283 * itr[]/dtr[] need to be updated too.
284 * 2: Inserting to collision chain may trigger recycling if
285 * the buffer for collision chain is empty.
286 * 3: The new entry is inserted at the hash table.
287 * (I.e. head of the collision chain)
288 * 4: Return the entry in hash table or collision chain.
289 *
290 */
291 extern void thash_vhpt_insert(thash_cb_t *hcb, u64 pte, u64 itir, u64 ifa);
292 //extern void thash_insert(thash_cb_t *hcb, thash_data_t *entry, u64 va);
293 //extern void thash_tr_insert(thash_cb_t *hcb, thash_data_t *entry, u64 va, int idx);
294 extern int vtr_find_overlap(struct vcpu *vcpu, u64 va, u64 ps, int is_data);
295 extern u64 get_mfn(struct domain *d, u64 gpfn);
296 /*
297 * Force to delete a found entry no matter TR or foreign map for TLB.
298 * NOTES:
299 * 1: TLB entry may be TR, TC or Foreign Map. For TR entry,
300 * itr[]/dtr[] need to be updated too.
301 * 2: This API must be called after thash_find_overlap() or
302 * thash_find_next_overlap().
303 * 3: Return TRUE or FALSE
304 *
305 */
306 extern void thash_remove(thash_cb_t *hcb, thash_data_t *entry);
307 extern void thash_tr_remove(thash_cb_t *hcb, thash_data_t *entry/*, int idx*/);
309 /*
310 * Find an overlap entry in hash table and its collision chain.
311 * Refer to SDM2 4.1.1.4 for overlap definition.
312 * PARAS:
313 * 1: in: TLB format entry, rid:ps must be same with vrr[].
314 * va & ps identify the address space for overlap lookup
315 * 2: section can be combination of TR, TC and FM. (THASH_SECTION_XX)
316 * 3: cl means I side or D side.
317 * RETURNS:
318 * NULL to indicate the end of findings.
319 * NOTES:
320 *
321 */
322 extern thash_data_t *thash_find_overlap(thash_cb_t *hcb,
323 thash_data_t *in, search_section_t s_sect);
324 extern thash_data_t *thash_find_overlap_ex(thash_cb_t *hcb,
325 u64 va, u64 ps, int rid, char cl, search_section_t s_sect);
328 /*
329 * Similar with thash_find_overlap but find next entry.
330 * NOTES:
331 * Intermediate position information is stored in hcb->priv.
332 */
333 extern thash_data_t *thash_find_next_overlap(thash_cb_t *hcb);
335 /*
336 * Find and purge overlap entries in hash table and its collision chain.
337 * PARAS:
338 * 1: in: TLB format entry, rid:ps must be same with vrr[].
339 * rid, va & ps identify the address space for purge
340 * 2: section can be combination of TR, TC and FM. (thash_SECTION_XX)
341 * 3: cl means I side or D side.
342 * NOTES:
343 *
344 */
345 extern void thash_purge_entries(struct vcpu *v, u64 va, u64 ps);
346 extern void thash_purge_and_insert(struct vcpu *v, u64 pte, u64 itir, u64 ifa);
348 /*
349 * Purge all TCs or VHPT entries including those in Hash table.
350 *
351 */
352 extern void thash_purge_all(struct vcpu *v);
354 /*
355 * Lookup the hash table and its collision chain to find an entry
356 * covering this address rid:va.
357 *
358 */
359 extern thash_data_t *vtlb_lookup(struct vcpu *v,u64 va,int is_data);
360 extern int thash_lock_tc(thash_cb_t *hcb, u64 va, u64 size, int rid, char cl, int lock);
363 #define ITIR_RV_MASK (((1UL<<32)-1)<<32 | 0x3)
364 #define PAGE_FLAGS_RV_MASK (0x2 | (0x3UL<<50)|(((1UL<<11)-1)<<53))
365 extern u64 machine_ttag(PTA pta, u64 va);
366 extern u64 machine_thash(PTA pta, u64 va);
367 extern void purge_machine_tc_by_domid(domid_t domid);
368 extern void machine_tlb_insert(struct vcpu *d, thash_data_t *tlb);
369 extern ia64_rr vmmu_get_rr(struct vcpu *vcpu, u64 va);
370 extern void init_domain_tlb(struct vcpu *d);
371 extern void free_domain_tlb(struct vcpu *v);
372 extern thash_data_t * vsa_thash(PTA vpta, u64 va, u64 vrr, u64 *tag);
373 extern thash_data_t * vhpt_lookup(u64 va);
374 extern void machine_tlb_purge(u64 va, u64 ps);
375 extern int fetch_code(struct vcpu *vcpu, u64 gip, u64 *code1, u64 *code2);
376 extern void emulate_io_inst(struct vcpu *vcpu, u64 padr, u64 ma);
377 extern int vhpt_enabled(struct vcpu *vcpu, uint64_t vadr, vhpt_ref_t ref);
379 static inline void vmx_vcpu_set_tr (thash_data_t *trp, u64 pte, u64 itir, u64 va, u64 rid)
380 {
381 trp->page_flags = pte;
382 trp->itir = itir;
383 trp->vadr = va;
384 trp->rid = rid;
385 }
388 //#define VTLB_DEBUG
389 #ifdef VTLB_DEBUG
390 extern void check_vtlb_sanity(thash_cb_t *vtlb);
391 extern void dump_vtlb(thash_cb_t *vtlb);
392 #endif
394 #endif /* __ASSEMBLY__ */
396 #endif /* XEN_TLBthash_H */