ia64/xen-unstable

view xen/include/public/arch-x86_32.h @ 6671:7a36f58f64ee

merge?
author kaf24@firebug.cl.cam.ac.uk
date Wed Sep 07 09:50:57 2005 +0000 (2005-09-07)
parents fb90dd31c6d7 8db9c5873b9b
children a75b08af8d19
line source
1 /******************************************************************************
2 * arch-x86_32.h
3 *
4 * Guest OS interface to x86 32-bit Xen.
5 *
6 * Copyright (c) 2004, K A Fraser
7 */
9 #ifndef __XEN_PUBLIC_ARCH_X86_32_H__
10 #define __XEN_PUBLIC_ARCH_X86_32_H__
12 /*
13 * SEGMENT DESCRIPTOR TABLES
14 */
15 /*
16 * A number of GDT entries are reserved by Xen. These are not situated at the
17 * start of the GDT because some stupid OSes export hard-coded selector values
18 * in their ABI. These hard-coded values are always near the start of the GDT,
19 * so Xen places itself out of the way, at the far end of the GDT.
20 */
21 #define FIRST_RESERVED_GDT_PAGE 14
22 #define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096)
23 #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
25 /*
26 * These flat segments are in the Xen-private section of every GDT. Since these
27 * are also present in the initial GDT, many OSes will be able to avoid
28 * installing their own GDT.
29 */
30 #define FLAT_RING1_CS 0xe019 /* GDT index 259 */
31 #define FLAT_RING1_DS 0xe021 /* GDT index 260 */
32 #define FLAT_RING1_SS 0xe021 /* GDT index 260 */
33 #define FLAT_RING3_CS 0xe02b /* GDT index 261 */
34 #define FLAT_RING3_DS 0xe033 /* GDT index 262 */
35 #define FLAT_RING3_SS 0xe033 /* GDT index 262 */
37 #define FLAT_KERNEL_CS FLAT_RING1_CS
38 #define FLAT_KERNEL_DS FLAT_RING1_DS
39 #define FLAT_KERNEL_SS FLAT_RING1_SS
40 #define FLAT_USER_CS FLAT_RING3_CS
41 #define FLAT_USER_DS FLAT_RING3_DS
42 #define FLAT_USER_SS FLAT_RING3_SS
44 /* And the trap vector is... */
45 #define TRAP_INSTR "int $0x82"
48 /*
49 * Virtual addresses beyond this are not modifiable by guest OSes. The
50 * machine->physical mapping table starts at this address, read-only.
51 */
52 #ifdef CONFIG_X86_PAE
53 # define HYPERVISOR_VIRT_START (0xF5800000UL)
54 #else
55 # define HYPERVISOR_VIRT_START (0xFC000000UL)
56 #endif
57 #ifndef machine_to_phys_mapping
58 #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
59 #endif
61 /* Maximum number of virtual CPUs in multi-processor guests. */
62 #define MAX_VIRT_CPUS 32
64 #ifndef __ASSEMBLY__
66 /*
67 * Send an array of these to HYPERVISOR_set_trap_table()
68 */
69 #define TI_GET_DPL(_ti) ((_ti)->flags & 3)
70 #define TI_GET_IF(_ti) ((_ti)->flags & 4)
71 #define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl))
72 #define TI_SET_IF(_ti,_if) ((_ti)->flags |= ((!!(_if))<<2))
73 typedef struct trap_info {
74 u8 vector; /* exception vector */
75 u8 flags; /* 0-3: privilege level; 4: clear event enable? */
76 u16 cs; /* code selector */
77 unsigned long address; /* code offset */
78 } trap_info_t;
80 typedef struct cpu_user_regs {
81 u32 ebx;
82 u32 ecx;
83 u32 edx;
84 u32 esi;
85 u32 edi;
86 u32 ebp;
87 u32 eax;
88 u16 error_code; /* private */
89 u16 entry_vector; /* private */
90 u32 eip;
91 u16 cs;
92 u8 saved_upcall_mask;
93 u8 _pad0;
94 u32 eflags;
95 u32 esp;
96 u16 ss, _pad1;
97 u16 es, _pad2;
98 u16 ds, _pad3;
99 u16 fs, _pad4;
100 u16 gs, _pad5;
101 } cpu_user_regs_t;
103 typedef u64 tsc_timestamp_t; /* RDTSC timestamp */
105 /*
106 * The following is all CPU context. Note that the fpu_ctxt block is filled
107 * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
108 */
109 typedef struct vcpu_guest_context {
110 /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
111 struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */
112 #define VGCF_I387_VALID (1<<0)
113 #define VGCF_VMX_GUEST (1<<1)
114 #define VGCF_IN_KERNEL (1<<2)
115 unsigned long flags; /* VGCF_* flags */
116 cpu_user_regs_t user_regs; /* User-level CPU registers */
117 trap_info_t trap_ctxt[256]; /* Virtual IDT */
118 unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */
119 unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
120 unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */
121 unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */
122 unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */
123 unsigned long event_callback_cs; /* CS:EIP of event callback */
124 unsigned long event_callback_eip;
125 unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */
126 unsigned long failsafe_callback_eip;
127 unsigned long vm_assist; /* VMASST_TYPE_* bitmap */
128 } vcpu_guest_context_t;
130 typedef struct arch_shared_info {
131 unsigned long max_pfn; /* max pfn that appears in table */
132 unsigned long pfn_to_mfn_frame_list_list;
133 /* frame containing list of mfns
134 containing list of mfns
135 containing the p2m table. */
136 } arch_shared_info_t;
138 #endif
140 #endif