ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-xen/asm-x86_64/pgtable.h @ 7906:69ea493e415a

Simplify arbitrary_virt_to_phys, and fix the x86/64 version to mask
out the NX bit.

Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Fri Nov 18 17:41:03 2005 +0100 (2005-11-18)
parents fe3a892b33b4
children 99a1f5dc75a9
line source
1 #ifndef _X86_64_PGTABLE_H
2 #define _X86_64_PGTABLE_H
4 /*
5 * This file contains the functions and defines necessary to modify and use
6 * the x86-64 page table tree.
7 */
8 #include <asm/processor.h>
9 #include <asm/fixmap.h>
10 #include <asm/bitops.h>
11 #include <linux/threads.h>
12 #include <linux/sched.h>
13 #include <asm/pda.h>
14 #ifdef CONFIG_XEN
15 #include <asm/hypervisor.h>
17 extern pud_t level3_user_pgt[512];
18 extern pud_t init_level4_user_pgt[];
20 extern void xen_init_pt(void);
22 #define virt_to_ptep(__va) \
23 ({ \
24 pgd_t *__pgd = pgd_offset_k((unsigned long)(__va)); \
25 pud_t *__pud = pud_offset(__pgd, (unsigned long)(__va)); \
26 pmd_t *__pmd = pmd_offset(__pud, (unsigned long)(__va)); \
27 pte_offset_kernel(__pmd, (unsigned long)(__va)); \
28 })
30 #define arbitrary_virt_to_machine(__va) \
31 ({ \
32 maddr_t m = (maddr_t)pte_mfn(*virt_to_ptep(__va)) << PAGE_SHIFT;\
33 m | ((unsigned long)(__va) & (PAGE_SIZE-1)); \
34 })
35 #endif
37 extern pud_t level3_kernel_pgt[512];
38 extern pud_t level3_physmem_pgt[512];
39 extern pud_t level3_ident_pgt[512];
40 extern pmd_t level2_kernel_pgt[512];
41 extern pgd_t init_level4_pgt[];
42 extern unsigned long __supported_pte_mask;
44 #define swapper_pg_dir init_level4_pgt
46 extern int nonx_setup(char *str);
47 extern void paging_init(void);
48 extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
50 extern unsigned long pgkern_mask;
52 /*
53 * ZERO_PAGE is a global shared page that is always zero: used
54 * for zero-mapped memory areas etc..
55 */
56 extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
57 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
59 /*
60 * PGDIR_SHIFT determines what a top-level page table entry can map
61 */
62 #define PGDIR_SHIFT 39
63 #define PTRS_PER_PGD 512
65 /*
66 * 3rd level page
67 */
68 #define PUD_SHIFT 30
69 #define PTRS_PER_PUD 512
71 /*
72 * PMD_SHIFT determines the size of the area a middle-level
73 * page table can map
74 */
75 #define PMD_SHIFT 21
76 #define PTRS_PER_PMD 512
78 /*
79 * entries per page directory level
80 */
81 #define PTRS_PER_PTE 512
83 #define pte_ERROR(e) \
84 printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
85 #define pmd_ERROR(e) \
86 printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
87 #define pud_ERROR(e) \
88 printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
89 #define pgd_ERROR(e) \
90 printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
92 #define pgd_none(x) (!pgd_val(x))
93 #define pud_none(x) (!pud_val(x))
95 #define set_pte_batched(pteptr, pteval) \
96 queue_l1_entry_update(pteptr, (pteval))
98 extern inline int pud_present(pud_t pud) { return !pud_none(pud); }
100 static inline void set_pte(pte_t *dst, pte_t val)
101 {
102 *dst = val;
103 }
105 #define set_pmd(pmdptr, pmdval) xen_l2_entry_update(pmdptr, (pmdval))
106 #define set_pud(pudptr, pudval) xen_l3_entry_update(pudptr, (pudval))
107 #define set_pgd(pgdptr, pgdval) xen_l4_entry_update(pgdptr, (pgdval))
109 extern inline void pud_clear (pud_t * pud)
110 {
111 set_pud(pud, __pud(0));
112 }
114 #define __user_pgd(pgd) ((pgd) + PTRS_PER_PGD)
116 extern inline void pgd_clear (pgd_t * pgd)
117 {
118 set_pgd(pgd, __pgd(0));
119 set_pgd(__user_pgd(pgd), __pgd(0));
120 }
122 #define pud_page(pud) \
123 ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
125 /*
126 * A note on implementation of this atomic 'get-and-clear' operation.
127 * This is actually very simple because Xen Linux can only run on a single
128 * processor. Therefore, we cannot race other processors setting the 'accessed'
129 * or 'dirty' bits on a page-table entry.
130 * Even if pages are shared between domains, that is not a problem because
131 * each domain will have separate page tables, with their own versions of
132 * accessed & dirty state.
133 */
134 #define ptep_get_and_clear(mm,addr,xp) __pte_ma(xchg(&(xp)->pte, 0))
136 #if 0
137 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *xp)
138 {
139 pte_t pte = *xp;
140 if (pte.pte)
141 set_pte(xp, __pte_ma(0));
142 return pte;
143 }
144 #endif
146 #define pte_same(a, b) ((a).pte == (b).pte)
148 #define PMD_SIZE (1UL << PMD_SHIFT)
149 #define PMD_MASK (~(PMD_SIZE-1))
150 #define PUD_SIZE (1UL << PUD_SHIFT)
151 #define PUD_MASK (~(PUD_SIZE-1))
152 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
153 #define PGDIR_MASK (~(PGDIR_SIZE-1))
155 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
156 #define FIRST_USER_ADDRESS 0
158 #ifndef __ASSEMBLY__
159 #define MAXMEM 0x3fffffffffffUL
160 #define VMALLOC_START 0xffffc20000000000UL
161 #define VMALLOC_END 0xffffe1ffffffffffUL
162 #define MODULES_VADDR 0xffffffff88000000UL
163 #define MODULES_END 0xfffffffffff00000UL
164 #define MODULES_LEN (MODULES_END - MODULES_VADDR)
166 #define _PAGE_BIT_PRESENT 0
167 #define _PAGE_BIT_RW 1
168 #define _PAGE_BIT_USER 2
169 #define _PAGE_BIT_PWT 3
170 #define _PAGE_BIT_PCD 4
171 #define _PAGE_BIT_ACCESSED 5
172 #define _PAGE_BIT_DIRTY 6
173 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
174 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
175 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
177 #define _PAGE_PRESENT 0x001
178 #define _PAGE_RW 0x002
179 #define _PAGE_USER 0x004
180 #define _PAGE_PWT 0x008
181 #define _PAGE_PCD 0x010
182 #define _PAGE_ACCESSED 0x020
183 #define _PAGE_DIRTY 0x040
184 #define _PAGE_PSE 0x080 /* 2MB page */
185 #define _PAGE_FILE 0x040 /* set:pagecache, unset:swap */
186 #define _PAGE_GLOBAL 0x100 /* Global TLB entry */
188 #define _PAGE_PROTNONE 0x080 /* If not present */
189 #define _PAGE_NX (1UL<<_PAGE_BIT_NX)
191 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
192 #define _KERNPG_TABLE _PAGE_TABLE
194 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
196 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
197 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
198 #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
199 #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
200 #define PAGE_COPY PAGE_COPY_NOEXEC
201 #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
202 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
203 #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
204 #define __PAGE_KERNEL \
205 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX | _PAGE_USER )
206 #define __PAGE_KERNEL_EXEC \
207 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_USER )
208 #define __PAGE_KERNEL_NOCACHE \
209 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_PCD | _PAGE_ACCESSED | _PAGE_NX | _PAGE_USER )
210 #define __PAGE_KERNEL_RO \
211 (_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX | _PAGE_USER )
212 #define __PAGE_KERNEL_VSYSCALL \
213 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_USER )
214 #define __PAGE_KERNEL_VSYSCALL_NOCACHE \
215 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_PCD | _PAGE_USER )
216 #define __PAGE_KERNEL_LARGE \
217 (__PAGE_KERNEL | _PAGE_PSE | _PAGE_USER )
220 /*
221 * We don't support GLOBAL page in xenolinux64
222 */
223 #define MAKE_GLOBAL(x) __pgprot((x))
225 #define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
226 #define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
227 #define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
228 #define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
229 #define PAGE_KERNEL_VSYSCALL32 __pgprot(__PAGE_KERNEL_VSYSCALL)
230 #define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL)
231 #define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
232 #define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE)
234 /* xwr */
235 #define __P000 PAGE_NONE
236 #define __P001 PAGE_READONLY
237 #define __P010 PAGE_COPY
238 #define __P011 PAGE_COPY
239 #define __P100 PAGE_READONLY_EXEC
240 #define __P101 PAGE_READONLY_EXEC
241 #define __P110 PAGE_COPY_EXEC
242 #define __P111 PAGE_COPY_EXEC
244 #define __S000 PAGE_NONE
245 #define __S001 PAGE_READONLY
246 #define __S010 PAGE_SHARED
247 #define __S011 PAGE_SHARED
248 #define __S100 PAGE_READONLY_EXEC
249 #define __S101 PAGE_READONLY_EXEC
250 #define __S110 PAGE_SHARED_EXEC
251 #define __S111 PAGE_SHARED_EXEC
253 static inline unsigned long pgd_bad(pgd_t pgd)
254 {
255 unsigned long val = pgd_val(pgd);
256 val &= ~PTE_MASK;
257 val &= ~(_PAGE_USER | _PAGE_DIRTY);
258 return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED);
259 }
261 static inline unsigned long pud_bad(pud_t pud)
262 {
263 unsigned long val = pud_val(pud);
264 val &= ~PTE_MASK;
265 val &= ~(_PAGE_USER | _PAGE_DIRTY);
266 return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED);
267 }
269 inline static void set_pte_at(struct mm_struct *mm, unsigned long addr,
270 pte_t *ptep, pte_t val )
271 {
272 if ( ((mm != current->mm) && (mm != &init_mm)) ||
273 HYPERVISOR_update_va_mapping( (addr), (val), 0 ) )
274 {
275 set_pte(ptep, val);
276 }
277 }
279 #define pte_none(x) (!(x).pte)
280 #define pte_present(x) ((x).pte & (_PAGE_PRESENT | _PAGE_PROTNONE))
281 #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
283 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
285 /*
286 * We detect special mappings in one of two ways:
287 * 1. If the MFN is an I/O page then Xen will set the m2p entry
288 * to be outside our maximum possible pseudophys range.
289 * 2. If the MFN belongs to a different domain then we will certainly
290 * not have MFN in our p2m table. Conversely, if the page is ours,
291 * then we'll have p2m(m2p(MFN))==MFN.
292 * If we detect a special mapping then it doesn't have a 'struct page'.
293 * We force !pfn_valid() by returning an out-of-range pointer.
294 *
295 * NB. These checks require that, for any MFN that is not in our reservation,
296 * there is no PFN such that p2m(PFN) == MFN. Otherwise we can get confused if
297 * we are foreign-mapping the MFN, and the other domain as m2p(MFN) == PFN.
298 * Yikes! Various places must poke in INVALID_P2M_ENTRY for safety.
299 *
300 * NB2. When deliberately mapping foreign pages into the p2m table, you *must*
301 * use FOREIGN_FRAME(). This will cause pte_pfn() to choke on it, as we
302 * require. In all the cases we care about, the FOREIGN_FRAME bit is
303 * masked (e.g., pfn_to_mfn()) so behaviour there is correct.
304 */
305 #define pte_mfn(_pte) (((_pte).pte & PTE_MASK) >> PAGE_SHIFT)
306 #define pte_pfn(_pte) \
307 ({ \
308 unsigned long mfn = pte_mfn(_pte); \
309 unsigned long pfn = mfn_to_pfn(mfn); \
310 if ((pfn >= max_mapnr) || (phys_to_machine_mapping[pfn] != mfn))\
311 pfn = max_mapnr; /* special: force !pfn_valid() */ \
312 pfn; \
313 })
315 #define pte_page(x) pfn_to_page(pte_pfn(x))
317 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
318 {
319 pte_t pte;
321 (pte).pte = (pfn_to_mfn(page_nr) << PAGE_SHIFT);
322 (pte).pte |= pgprot_val(pgprot);
323 (pte).pte &= __supported_pte_mask;
324 return pte;
325 }
327 #define pfn_pte_ma(pfn, prot) __pte_ma((((pfn) << PAGE_SHIFT) | pgprot_val(prot)) & __supported_pte_mask)
328 /*
329 * The following only work if pte_present() is true.
330 * Undefined behaviour if not..
331 */
332 #define __pte_val(x) ((x).pte)
334 static inline int pte_user(pte_t pte) { return __pte_val(pte) & _PAGE_USER; }
335 extern inline int pte_read(pte_t pte) { return __pte_val(pte) & _PAGE_USER; }
336 extern inline int pte_exec(pte_t pte) { return __pte_val(pte) & _PAGE_USER; }
337 extern inline int pte_dirty(pte_t pte) { return __pte_val(pte) & _PAGE_DIRTY; }
338 extern inline int pte_young(pte_t pte) { return __pte_val(pte) & _PAGE_ACCESSED; }
339 extern inline int pte_write(pte_t pte) { return __pte_val(pte) & _PAGE_RW; }
340 static inline int pte_file(pte_t pte) { return __pte_val(pte) & _PAGE_FILE; }
342 extern inline pte_t pte_rdprotect(pte_t pte) { __pte_val(pte) &= ~_PAGE_USER; return pte; }
343 extern inline pte_t pte_exprotect(pte_t pte) { __pte_val(pte) &= ~_PAGE_USER; return pte; }
344 extern inline pte_t pte_mkclean(pte_t pte) { __pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
345 extern inline pte_t pte_mkold(pte_t pte) { __pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
346 extern inline pte_t pte_wrprotect(pte_t pte) { __pte_val(pte) &= ~_PAGE_RW; return pte; }
347 extern inline pte_t pte_mkread(pte_t pte) { __pte_val(pte) |= _PAGE_USER; return pte; }
348 extern inline pte_t pte_mkexec(pte_t pte) { __pte_val(pte) |= _PAGE_USER; return pte; }
349 extern inline pte_t pte_mkdirty(pte_t pte) { __pte_val(pte) |= _PAGE_DIRTY; return pte; }
350 extern inline pte_t pte_mkyoung(pte_t pte) { __pte_val(pte) |= _PAGE_ACCESSED; return pte; }
351 extern inline pte_t pte_mkwrite(pte_t pte) { __pte_val(pte) |= _PAGE_RW; return pte; }
353 struct vm_area_struct;
355 static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
356 {
357 pte_t pte = *ptep;
358 int ret = pte_dirty(pte);
359 if (ret)
360 set_pte(ptep, pte_mkclean(pte));
361 return ret;
362 }
364 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
365 {
366 pte_t pte = *ptep;
367 int ret = pte_young(pte);
368 if (ret)
369 set_pte(ptep, pte_mkold(pte));
370 return ret;
371 }
373 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
374 {
375 pte_t pte = *ptep;
376 if (pte_write(pte))
377 set_pte(ptep, pte_wrprotect(pte));
378 }
380 /*
381 * Macro to mark a page protection value as "uncacheable".
382 */
383 #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
385 #define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
386 static inline int pmd_large(pmd_t pte) {
387 return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE;
388 }
391 /*
392 * Conversion functions: convert a page and protection to a page entry,
393 * and a page entry and page directory to the page they refer to.
394 */
396 #define page_pte(page) page_pte_prot(page, __pgprot(0))
398 /*
399 * Level 4 access.
400 * Never use these in the common code.
401 */
402 #define pgd_page(pgd) ((unsigned long) __va(pgd_val(pgd) & PTE_MASK))
403 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
404 #define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
405 #define pgd_offset_k(address) (pgd_t *)(init_level4_pgt + pgd_index(address))
406 #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
407 #define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)
409 /* PUD - Level3 access */
410 /* to find an entry in a page-table-directory. */
411 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
412 #define pud_offset(pgd, address) ((pud_t *) pgd_page(*(pgd)) + pud_index(address))
413 static inline pud_t *__pud_offset_k(pud_t *pud, unsigned long address)
414 {
415 return pud + pud_index(address);
416 }
418 /* Find correct pud via the hidden fourth level page level: */
420 /* This accesses the reference page table of the boot cpu.
421 Other CPUs get synced lazily via the page fault handler. */
422 static inline pud_t *pud_offset_k(unsigned long address)
423 {
424 unsigned long addr;
426 addr = pgd_val(init_level4_pgt[pud_index(address)]);
427 addr &= PHYSICAL_PAGE_MASK; /* machine physical */
428 addr = machine_to_phys(addr);
429 return __pud_offset_k((pud_t *)__va(addr), address);
430 }
432 /* PMD - Level 2 access */
433 #define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
434 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
436 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
437 #define pmd_offset(dir, address) ((pmd_t *) pud_page(*(dir)) + \
438 pmd_index(address))
439 #define pmd_none(x) (!pmd_val(x))
440 /* pmd_present doesn't just test the _PAGE_PRESENT bit since wr.p.t.
441 can temporarily clear it. */
442 #define pmd_present(x) (pmd_val(x))
443 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
444 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_PRESENT)) != (_KERNPG_TABLE & ~_PAGE_PRESENT))
445 #define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
446 #define pmd_pfn(x) ((pmd_val(x) >> PAGE_SHIFT) & __PHYSICAL_MASK)
448 #define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
449 #define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
450 #define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
452 /* PTE - Level 1 access. */
454 /* page, protection -> pte */
455 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
456 #define mk_pte_huge(entry) (pte_val(entry) |= _PAGE_PRESENT | _PAGE_PSE)
458 /* physical address -> PTE */
459 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
460 {
461 pte_t pte;
462 (pte).pte = physpage | pgprot_val(pgprot);
463 return pte;
464 }
466 /* Change flags of a PTE */
467 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
468 {
469 (pte).pte &= _PAGE_CHG_MASK;
470 (pte).pte |= pgprot_val(newprot);
471 (pte).pte &= __supported_pte_mask;
472 return pte;
473 }
475 #define pte_index(address) \
476 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
477 #define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_kernel(*(dir)) + \
478 pte_index(address))
480 /* x86-64 always has all page tables mapped. */
481 #define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
482 #define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
483 #define pte_unmap(pte) /* NOP */
484 #define pte_unmap_nested(pte) /* NOP */
486 #define update_mmu_cache(vma,address,pte) do { } while (0)
488 /* We only update the dirty/accessed state if we set
489 * the dirty bit by hand in the kernel, since the hardware
490 * will do the accessed bit for us, and we don't want to
491 * race with other CPU's that might be updating the dirty
492 * bit at the same time. */
493 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
494 #if 0
495 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
496 do { \
497 if (__dirty) { \
498 set_pte(__ptep, __entry); \
499 flush_tlb_page(__vma, __address); \
500 } \
501 } while (0)
502 #endif
503 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
504 do { \
505 if (__dirty) { \
506 if ( likely((__vma)->vm_mm == current->mm) ) { \
507 BUG_ON(HYPERVISOR_update_va_mapping((__address), (__entry), UVMF_INVLPG|UVMF_MULTI|(unsigned long)((__vma)->vm_mm->cpu_vm_mask.bits))); \
508 } else { \
509 xen_l1_entry_update((__ptep), (__entry)); \
510 flush_tlb_page((__vma), (__address)); \
511 } \
512 } \
513 } while (0)
515 /* Encode and de-code a swap entry */
516 #define __swp_type(x) (((x).val >> 1) & 0x3f)
517 #define __swp_offset(x) ((x).val >> 8)
518 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
519 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
520 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
522 #endif /* !__ASSEMBLY__ */
524 extern int kern_addr_valid(unsigned long addr);
526 #define DOMID_LOCAL (0xFFFFU)
528 int direct_remap_pfn_range(struct vm_area_struct *vma,
529 unsigned long address,
530 unsigned long mfn,
531 unsigned long size,
532 pgprot_t prot,
533 domid_t domid);
535 int direct_kernel_remap_pfn_range(unsigned long address,
536 unsigned long mfn,
537 unsigned long size,
538 pgprot_t prot,
539 domid_t domid);
541 int create_lookup_pte_addr(struct mm_struct *mm,
542 unsigned long address,
543 uint64_t *ptep);
545 int touch_pte_range(struct mm_struct *mm,
546 unsigned long address,
547 unsigned long size);
549 #define io_remap_page_range(vma, vaddr, paddr, size, prot) \
550 direct_remap_pfn_range(vma,vaddr,(paddr)>>PAGE_SHIFT,size,prot,DOMID_IO)
552 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
553 direct_remap_pfn_range(vma,vaddr,pfn,size,prot,DOMID_IO)
555 #define MK_IOSPACE_PFN(space, pfn) (pfn)
556 #define GET_IOSPACE(pfn) 0
557 #define GET_PFN(pfn) (pfn)
559 #define HAVE_ARCH_UNMAPPED_AREA
561 #define pgtable_cache_init() do { } while (0)
562 #define check_pgt_cache() do { } while (0)
564 #define PAGE_AGP PAGE_KERNEL_NOCACHE
565 #define HAVE_PAGE_AGP 1
567 /* fs/proc/kcore.c */
568 #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
569 #define kc_offset_to_vaddr(o) \
570 (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))
572 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
573 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
574 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
575 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
576 #define __HAVE_ARCH_PTE_SAME
577 #include <asm-generic/pgtable.h>
579 #endif /* _X86_64_PGTABLE_H */