ia64/xen-unstable

view xen/arch/x86/domain.c @ 19107:696351cde9a4

Allow memflags to be specified to alloc_xenheap_pages().

Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Jan 28 16:58:41 2009 +0000 (2009-01-28)
parents d7f524bf90b0
children 839bece33989
line source
1 /******************************************************************************
2 * arch/x86/domain.c
3 *
4 * x86-specific domain handling (e.g., register setup and context switching).
5 */
7 /*
8 * Copyright (C) 1995 Linus Torvalds
9 *
10 * Pentium III FXSR, SSE support
11 * Gareth Hughes <gareth@valinux.com>, May 2000
12 */
14 #include <xen/config.h>
15 #include <xen/init.h>
16 #include <xen/lib.h>
17 #include <xen/errno.h>
18 #include <xen/sched.h>
19 #include <xen/domain.h>
20 #include <xen/smp.h>
21 #include <xen/delay.h>
22 #include <xen/softirq.h>
23 #include <xen/grant_table.h>
24 #include <xen/iocap.h>
25 #include <xen/kernel.h>
26 #include <xen/multicall.h>
27 #include <xen/irq.h>
28 #include <xen/event.h>
29 #include <xen/console.h>
30 #include <xen/percpu.h>
31 #include <xen/compat.h>
32 #include <xen/acpi.h>
33 #include <xen/pci.h>
34 #include <xen/paging.h>
35 #include <asm/regs.h>
36 #include <asm/mc146818rtc.h>
37 #include <asm/system.h>
38 #include <asm/io.h>
39 #include <asm/processor.h>
40 #include <asm/desc.h>
41 #include <asm/i387.h>
42 #include <asm/mpspec.h>
43 #include <asm/ldt.h>
44 #include <asm/hypercall.h>
45 #include <asm/hvm/hvm.h>
46 #include <asm/hvm/support.h>
47 #include <asm/debugreg.h>
48 #include <asm/msr.h>
49 #include <asm/nmi.h>
50 #include <xen/numa.h>
51 #include <xen/iommu.h>
52 #ifdef CONFIG_COMPAT
53 #include <compat/vcpu.h>
54 #endif
56 DEFINE_PER_CPU(struct vcpu *, curr_vcpu);
57 DEFINE_PER_CPU(u64, efer);
58 DEFINE_PER_CPU(unsigned long, cr4);
60 static void default_idle(void);
61 void (*pm_idle) (void) = default_idle;
63 static void paravirt_ctxt_switch_from(struct vcpu *v);
64 static void paravirt_ctxt_switch_to(struct vcpu *v);
66 static void vcpu_destroy_pagetables(struct vcpu *v);
68 static void continue_idle_domain(struct vcpu *v)
69 {
70 reset_stack_and_jump(idle_loop);
71 }
73 static void continue_nonidle_domain(struct vcpu *v)
74 {
75 reset_stack_and_jump(ret_from_intr);
76 }
78 static void default_idle(void)
79 {
80 local_irq_disable();
81 if ( !softirq_pending(smp_processor_id()) )
82 safe_halt();
83 else
84 local_irq_enable();
85 }
87 static void play_dead(void)
88 {
89 /*
90 * Flush pending softirqs if any. They can be queued up before this CPU
91 * was taken out of cpu_online_map in __cpu_disable().
92 */
93 do_softirq();
95 /* This must be done before dead CPU ack */
96 cpu_exit_clear();
97 hvm_cpu_down();
98 wbinvd();
99 mb();
100 /* Ack it */
101 __get_cpu_var(cpu_state) = CPU_DEAD;
103 /* With physical CPU hotplug, we should halt the cpu. */
104 local_irq_disable();
105 for ( ; ; )
106 halt();
107 }
109 void idle_loop(void)
110 {
111 for ( ; ; )
112 {
113 if ( cpu_is_offline(smp_processor_id()) )
114 play_dead();
115 page_scrub_schedule_work();
116 (*pm_idle)();
117 do_softirq();
118 }
119 }
121 void startup_cpu_idle_loop(void)
122 {
123 struct vcpu *v = current;
125 ASSERT(is_idle_vcpu(v));
126 cpu_set(smp_processor_id(), v->domain->domain_dirty_cpumask);
127 cpu_set(smp_processor_id(), v->vcpu_dirty_cpumask);
129 reset_stack_and_jump(idle_loop);
130 }
132 void dump_pageframe_info(struct domain *d)
133 {
134 struct page_info *page;
136 printk("Memory pages belonging to domain %u:\n", d->domain_id);
138 if ( d->tot_pages >= 10 )
139 {
140 printk(" DomPage list too long to display\n");
141 }
142 else
143 {
144 list_for_each_entry ( page, &d->page_list, list )
145 {
146 printk(" DomPage %p: caf=%08lx, taf=%" PRtype_info "\n",
147 _p(page_to_mfn(page)),
148 page->count_info, page->u.inuse.type_info);
149 }
150 }
152 if ( is_hvm_domain(d) )
153 {
154 p2m_pod_dump_data(d);
155 }
157 list_for_each_entry ( page, &d->xenpage_list, list )
158 {
159 printk(" XenPage %p: caf=%08lx, taf=%" PRtype_info "\n",
160 _p(page_to_mfn(page)),
161 page->count_info, page->u.inuse.type_info);
162 }
163 }
165 struct vcpu *alloc_vcpu_struct(void)
166 {
167 struct vcpu *v;
168 if ( (v = xmalloc(struct vcpu)) != NULL )
169 memset(v, 0, sizeof(*v));
170 return v;
171 }
173 void free_vcpu_struct(struct vcpu *v)
174 {
175 xfree(v);
176 }
178 #ifdef CONFIG_COMPAT
180 static int setup_compat_l4(struct vcpu *v)
181 {
182 struct page_info *pg;
183 l4_pgentry_t *l4tab;
185 pg = alloc_domheap_page(NULL, MEMF_node(vcpu_to_node(v)));
186 if ( pg == NULL )
187 return -ENOMEM;
189 /* This page needs to look like a pagetable so that it can be shadowed */
190 pg->u.inuse.type_info = PGT_l4_page_table|PGT_validated|1;
192 l4tab = page_to_virt(pg);
193 copy_page(l4tab, idle_pg_table);
194 l4tab[0] = l4e_empty();
195 l4tab[l4_table_offset(LINEAR_PT_VIRT_START)] =
196 l4e_from_page(pg, __PAGE_HYPERVISOR);
197 l4tab[l4_table_offset(PERDOMAIN_VIRT_START)] =
198 l4e_from_paddr(__pa(v->domain->arch.mm_perdomain_l3),
199 __PAGE_HYPERVISOR);
201 v->arch.guest_table = pagetable_from_page(pg);
202 v->arch.guest_table_user = v->arch.guest_table;
204 return 0;
205 }
207 static void release_compat_l4(struct vcpu *v)
208 {
209 free_domheap_page(pagetable_get_page(v->arch.guest_table));
210 v->arch.guest_table = pagetable_null();
211 v->arch.guest_table_user = pagetable_null();
212 }
214 static inline int may_switch_mode(struct domain *d)
215 {
216 return (!is_hvm_domain(d) && (d->tot_pages == 0));
217 }
219 int switch_native(struct domain *d)
220 {
221 unsigned int vcpuid;
223 if ( d == NULL )
224 return -EINVAL;
225 if ( !may_switch_mode(d) )
226 return -EACCES;
227 if ( !is_pv_32on64_domain(d) )
228 return 0;
230 d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
232 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
233 {
234 if (d->vcpu[vcpuid])
235 release_compat_l4(d->vcpu[vcpuid]);
236 }
238 return 0;
239 }
241 int switch_compat(struct domain *d)
242 {
243 unsigned int vcpuid;
245 if ( d == NULL )
246 return -EINVAL;
247 if ( !may_switch_mode(d) )
248 return -EACCES;
249 if ( is_pv_32on64_domain(d) )
250 return 0;
252 d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 1;
254 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
255 {
256 if ( (d->vcpu[vcpuid] != NULL) &&
257 (setup_compat_l4(d->vcpu[vcpuid]) != 0) )
258 goto undo_and_fail;
259 }
261 domain_set_alloc_bitsize(d);
263 return 0;
265 undo_and_fail:
266 d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
267 while ( vcpuid-- != 0 )
268 {
269 if ( d->vcpu[vcpuid] != NULL )
270 release_compat_l4(d->vcpu[vcpuid]);
271 }
272 return -ENOMEM;
273 }
275 #else
276 #define setup_compat_l4(v) 0
277 #define release_compat_l4(v) ((void)0)
278 #endif
280 int vcpu_initialise(struct vcpu *v)
281 {
282 struct domain *d = v->domain;
283 int rc;
285 v->arch.vcpu_info_mfn = INVALID_MFN;
287 v->arch.flags = TF_kernel_mode;
289 #if defined(__i386__)
290 mapcache_vcpu_init(v);
291 #endif
293 pae_l3_cache_init(&v->arch.pae_l3_cache);
295 paging_vcpu_init(v);
297 if ( is_hvm_domain(d) )
298 {
299 if ( (rc = hvm_vcpu_initialise(v)) != 0 )
300 return rc;
301 }
302 else
303 {
304 /* PV guests by default have a 100Hz ticker. */
305 if ( !is_idle_domain(d) )
306 v->periodic_period = MILLISECS(10);
308 /* PV guests get an emulated PIT too for video BIOSes to use. */
309 if ( !is_idle_domain(d) && (v->vcpu_id == 0) )
310 pit_init(v, cpu_khz);
312 v->arch.schedule_tail = continue_nonidle_domain;
313 v->arch.ctxt_switch_from = paravirt_ctxt_switch_from;
314 v->arch.ctxt_switch_to = paravirt_ctxt_switch_to;
316 if ( is_idle_domain(d) )
317 {
318 v->arch.schedule_tail = continue_idle_domain;
319 v->arch.cr3 = __pa(idle_pg_table);
320 }
322 v->arch.guest_context.ctrlreg[4] =
323 real_cr4_to_pv_guest_cr4(mmu_cr4_features);
324 }
326 v->arch.perdomain_ptes =
327 d->arch.mm_perdomain_pt + (v->vcpu_id << GDT_LDT_VCPU_SHIFT);
329 return (is_pv_32on64_vcpu(v) ? setup_compat_l4(v) : 0);
330 }
332 void vcpu_destroy(struct vcpu *v)
333 {
334 if ( is_pv_32on64_vcpu(v) )
335 release_compat_l4(v);
337 if ( is_hvm_vcpu(v) )
338 hvm_vcpu_destroy(v);
339 }
341 int arch_domain_create(struct domain *d, unsigned int domcr_flags)
342 {
343 #ifdef __x86_64__
344 struct page_info *pg;
345 #endif
346 int i, pdpt_order, paging_initialised = 0;
347 int rc = -ENOMEM;
349 d->arch.hvm_domain.hap_enabled =
350 is_hvm_domain(d) &&
351 hvm_funcs.hap_supported &&
352 (domcr_flags & DOMCRF_hap);
354 INIT_LIST_HEAD(&d->arch.pdev_list);
356 d->arch.relmem = RELMEM_not_started;
357 INIT_LIST_HEAD(&d->arch.relmem_list);
359 pdpt_order = get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t));
360 d->arch.mm_perdomain_pt = alloc_xenheap_pages(pdpt_order, 0);
361 if ( d->arch.mm_perdomain_pt == NULL )
362 goto fail;
363 memset(d->arch.mm_perdomain_pt, 0, PAGE_SIZE << pdpt_order);
365 #if defined(__i386__)
367 mapcache_domain_init(d);
369 #else /* __x86_64__ */
371 pg = alloc_domheap_page(NULL, MEMF_node(domain_to_node(d)));
372 if ( pg == NULL )
373 goto fail;
374 d->arch.mm_perdomain_l2 = page_to_virt(pg);
375 clear_page(d->arch.mm_perdomain_l2);
376 for ( i = 0; i < (1 << pdpt_order); i++ )
377 d->arch.mm_perdomain_l2[l2_table_offset(PERDOMAIN_VIRT_START)+i] =
378 l2e_from_page(virt_to_page(d->arch.mm_perdomain_pt)+i,
379 __PAGE_HYPERVISOR);
381 pg = alloc_domheap_page(NULL, MEMF_node(domain_to_node(d)));
382 if ( pg == NULL )
383 goto fail;
384 d->arch.mm_perdomain_l3 = page_to_virt(pg);
385 clear_page(d->arch.mm_perdomain_l3);
386 d->arch.mm_perdomain_l3[l3_table_offset(PERDOMAIN_VIRT_START)] =
387 l3e_from_page(virt_to_page(d->arch.mm_perdomain_l2),
388 __PAGE_HYPERVISOR);
390 #endif /* __x86_64__ */
392 #ifdef CONFIG_COMPAT
393 HYPERVISOR_COMPAT_VIRT_START(d) = __HYPERVISOR_COMPAT_VIRT_START;
394 #endif
396 if ( (rc = paging_domain_init(d)) != 0 )
397 goto fail;
398 paging_initialised = 1;
400 if ( !is_idle_domain(d) )
401 {
402 d->arch.ioport_caps =
403 rangeset_new(d, "I/O Ports", RANGESETF_prettyprint_hex);
404 rc = -ENOMEM;
405 if ( d->arch.ioport_caps == NULL )
406 goto fail;
408 /*
409 * The shared_info machine address must fit in a 32-bit field within a
410 * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32).
411 */
412 if ( (d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32))) == NULL )
413 goto fail;
415 clear_page(d->shared_info);
416 share_xen_page_with_guest(
417 virt_to_page(d->shared_info), d, XENSHARE_writable);
419 if ( (rc = iommu_domain_init(d)) != 0 )
420 goto fail;
421 }
423 if ( is_hvm_domain(d) )
424 {
425 if ( (rc = hvm_domain_initialise(d)) != 0 )
426 {
427 iommu_domain_destroy(d);
428 goto fail;
429 }
430 }
431 else
432 {
433 /* 32-bit PV guest by default only if Xen is not 64-bit. */
434 d->arch.is_32bit_pv = d->arch.has_32bit_shinfo =
435 (CONFIG_PAGING_LEVELS != 4);
436 }
438 memset(d->arch.cpuids, 0, sizeof(d->arch.cpuids));
439 for ( i = 0; i < MAX_CPUID_INPUT; i++ )
440 {
441 d->arch.cpuids[i].input[0] = XEN_CPUID_INPUT_UNUSED;
442 d->arch.cpuids[i].input[1] = XEN_CPUID_INPUT_UNUSED;
443 }
445 return 0;
447 fail:
448 d->is_dying = DOMDYING_dead;
449 free_xenheap_page(d->shared_info);
450 if ( paging_initialised )
451 paging_final_teardown(d);
452 #ifdef __x86_64__
453 if ( d->arch.mm_perdomain_l2 )
454 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
455 if ( d->arch.mm_perdomain_l3 )
456 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
457 #endif
458 free_xenheap_pages(d->arch.mm_perdomain_pt, pdpt_order);
459 return rc;
460 }
462 void arch_domain_destroy(struct domain *d)
463 {
464 if ( is_hvm_domain(d) )
465 hvm_domain_destroy(d);
467 pci_release_devices(d);
468 free_domain_pirqs(d);
469 if ( !is_idle_domain(d) )
470 iommu_domain_destroy(d);
472 paging_final_teardown(d);
474 free_xenheap_pages(
475 d->arch.mm_perdomain_pt,
476 get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t)));
478 #ifdef __x86_64__
479 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
480 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
481 #endif
483 free_xenheap_page(d->shared_info);
484 }
486 unsigned long pv_guest_cr4_fixup(unsigned long guest_cr4)
487 {
488 unsigned long hv_cr4_mask, hv_cr4 = real_cr4_to_pv_guest_cr4(read_cr4());
490 hv_cr4_mask = ~X86_CR4_TSD;
491 if ( cpu_has_de )
492 hv_cr4_mask &= ~X86_CR4_DE;
494 if ( (guest_cr4 & hv_cr4_mask) != (hv_cr4 & hv_cr4_mask) )
495 gdprintk(XENLOG_WARNING,
496 "Attempt to change CR4 flags %08lx -> %08lx\n",
497 hv_cr4, guest_cr4);
499 return (hv_cr4 & hv_cr4_mask) | (guest_cr4 & ~hv_cr4_mask);
500 }
502 /* This is called by arch_final_setup_guest and do_boot_vcpu */
503 int arch_set_info_guest(
504 struct vcpu *v, vcpu_guest_context_u c)
505 {
506 struct domain *d = v->domain;
507 unsigned long cr3_pfn = INVALID_MFN;
508 unsigned long flags, cr4;
509 int i, rc = 0, compat;
511 /* The context is a compat-mode one if the target domain is compat-mode;
512 * we expect the tools to DTRT even in compat-mode callers. */
513 compat = is_pv_32on64_domain(d);
515 #ifdef CONFIG_COMPAT
516 #define c(fld) (compat ? (c.cmp->fld) : (c.nat->fld))
517 #else
518 #define c(fld) (c.nat->fld)
519 #endif
520 flags = c(flags);
522 if ( !is_hvm_vcpu(v) )
523 {
524 if ( !compat )
525 {
526 fixup_guest_stack_selector(d, c.nat->user_regs.ss);
527 fixup_guest_stack_selector(d, c.nat->kernel_ss);
528 fixup_guest_code_selector(d, c.nat->user_regs.cs);
529 #ifdef __i386__
530 fixup_guest_code_selector(d, c.nat->event_callback_cs);
531 fixup_guest_code_selector(d, c.nat->failsafe_callback_cs);
532 #endif
534 for ( i = 0; i < 256; i++ )
535 fixup_guest_code_selector(d, c.nat->trap_ctxt[i].cs);
537 /* LDT safety checks. */
538 if ( ((c.nat->ldt_base & (PAGE_SIZE-1)) != 0) ||
539 (c.nat->ldt_ents > 8192) ||
540 !array_access_ok(c.nat->ldt_base,
541 c.nat->ldt_ents,
542 LDT_ENTRY_SIZE) )
543 return -EINVAL;
544 }
545 #ifdef CONFIG_COMPAT
546 else
547 {
548 fixup_guest_stack_selector(d, c.cmp->user_regs.ss);
549 fixup_guest_stack_selector(d, c.cmp->kernel_ss);
550 fixup_guest_code_selector(d, c.cmp->user_regs.cs);
551 fixup_guest_code_selector(d, c.cmp->event_callback_cs);
552 fixup_guest_code_selector(d, c.cmp->failsafe_callback_cs);
554 for ( i = 0; i < 256; i++ )
555 fixup_guest_code_selector(d, c.cmp->trap_ctxt[i].cs);
557 /* LDT safety checks. */
558 if ( ((c.cmp->ldt_base & (PAGE_SIZE-1)) != 0) ||
559 (c.cmp->ldt_ents > 8192) ||
560 !compat_array_access_ok(c.cmp->ldt_base,
561 c.cmp->ldt_ents,
562 LDT_ENTRY_SIZE) )
563 return -EINVAL;
564 }
565 #endif
566 }
568 v->fpu_initialised = !!(flags & VGCF_I387_VALID);
570 v->arch.flags &= ~TF_kernel_mode;
571 if ( (flags & VGCF_in_kernel) || is_hvm_vcpu(v)/*???*/ )
572 v->arch.flags |= TF_kernel_mode;
574 if ( !compat )
575 memcpy(&v->arch.guest_context, c.nat, sizeof(*c.nat));
576 #ifdef CONFIG_COMPAT
577 else
578 XLAT_vcpu_guest_context(&v->arch.guest_context, c.cmp);
579 #endif
581 v->arch.guest_context.user_regs.eflags |= 2;
583 if ( is_hvm_vcpu(v) )
584 {
585 hvm_set_info_guest(v);
586 goto out;
587 }
589 /* Only CR0.TS is modifiable by guest or admin. */
590 v->arch.guest_context.ctrlreg[0] &= X86_CR0_TS;
591 v->arch.guest_context.ctrlreg[0] |= read_cr0() & ~X86_CR0_TS;
593 init_int80_direct_trap(v);
595 /* IOPL privileges are virtualised. */
596 v->arch.iopl = (v->arch.guest_context.user_regs.eflags >> 12) & 3;
597 v->arch.guest_context.user_regs.eflags &= ~EF_IOPL;
599 /* Ensure real hardware interrupts are enabled. */
600 v->arch.guest_context.user_regs.eflags |= EF_IE;
602 cr4 = v->arch.guest_context.ctrlreg[4];
603 v->arch.guest_context.ctrlreg[4] = cr4 ? pv_guest_cr4_fixup(cr4) :
604 real_cr4_to_pv_guest_cr4(mmu_cr4_features);
606 memset(v->arch.guest_context.debugreg, 0,
607 sizeof(v->arch.guest_context.debugreg));
608 for ( i = 0; i < 8; i++ )
609 (void)set_debugreg(v, i, c(debugreg[i]));
611 if ( v->is_initialised )
612 goto out;
614 if ( v->vcpu_id == 0 )
615 d->vm_assist = c(vm_assist);
617 if ( !compat )
618 rc = (int)set_gdt(v, c.nat->gdt_frames, c.nat->gdt_ents);
619 #ifdef CONFIG_COMPAT
620 else
621 {
622 unsigned long gdt_frames[ARRAY_SIZE(c.cmp->gdt_frames)];
623 unsigned int i, n = (c.cmp->gdt_ents + 511) / 512;
625 if ( n > ARRAY_SIZE(c.cmp->gdt_frames) )
626 return -EINVAL;
627 for ( i = 0; i < n; ++i )
628 gdt_frames[i] = c.cmp->gdt_frames[i];
629 rc = (int)set_gdt(v, gdt_frames, c.cmp->gdt_ents);
630 }
631 #endif
632 if ( rc != 0 )
633 return rc;
635 if ( !compat )
636 {
637 cr3_pfn = gmfn_to_mfn(d, xen_cr3_to_pfn(c.nat->ctrlreg[3]));
639 if ( !mfn_valid(cr3_pfn) ||
640 (paging_mode_refcounts(d)
641 ? !get_page(mfn_to_page(cr3_pfn), d)
642 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
643 PGT_base_page_table)) )
644 {
645 destroy_gdt(v);
646 return -EINVAL;
647 }
649 v->arch.guest_table = pagetable_from_pfn(cr3_pfn);
651 #ifdef __x86_64__
652 if ( c.nat->ctrlreg[1] )
653 {
654 cr3_pfn = gmfn_to_mfn(d, xen_cr3_to_pfn(c.nat->ctrlreg[1]));
656 if ( !mfn_valid(cr3_pfn) ||
657 (paging_mode_refcounts(d)
658 ? !get_page(mfn_to_page(cr3_pfn), d)
659 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
660 PGT_base_page_table)) )
661 {
662 cr3_pfn = pagetable_get_pfn(v->arch.guest_table);
663 v->arch.guest_table = pagetable_null();
664 if ( paging_mode_refcounts(d) )
665 put_page(mfn_to_page(cr3_pfn));
666 else
667 put_page_and_type(mfn_to_page(cr3_pfn));
668 destroy_gdt(v);
669 return -EINVAL;
670 }
672 v->arch.guest_table_user = pagetable_from_pfn(cr3_pfn);
673 }
674 #endif
675 }
676 #ifdef CONFIG_COMPAT
677 else
678 {
679 l4_pgentry_t *l4tab;
681 cr3_pfn = gmfn_to_mfn(d, compat_cr3_to_pfn(c.cmp->ctrlreg[3]));
683 if ( !mfn_valid(cr3_pfn) ||
684 (paging_mode_refcounts(d)
685 ? !get_page(mfn_to_page(cr3_pfn), d)
686 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
687 PGT_l3_page_table)) )
688 {
689 destroy_gdt(v);
690 return -EINVAL;
691 }
693 l4tab = __va(pagetable_get_paddr(v->arch.guest_table));
694 *l4tab = l4e_from_pfn(
695 cr3_pfn, _PAGE_PRESENT|_PAGE_RW|_PAGE_USER|_PAGE_ACCESSED);
696 }
697 #endif
699 if ( v->vcpu_id == 0 )
700 update_domain_wallclock_time(d);
702 /* Don't redo final setup */
703 v->is_initialised = 1;
705 if ( paging_mode_enabled(d) )
706 paging_update_paging_modes(v);
708 update_cr3(v);
710 out:
711 if ( flags & VGCF_online )
712 clear_bit(_VPF_down, &v->pause_flags);
713 else
714 set_bit(_VPF_down, &v->pause_flags);
715 return 0;
716 #undef c
717 }
719 void arch_vcpu_reset(struct vcpu *v)
720 {
721 if ( !is_hvm_vcpu(v) )
722 {
723 destroy_gdt(v);
724 vcpu_destroy_pagetables(v);
725 }
726 else
727 {
728 vcpu_end_shutdown_deferral(v);
729 }
730 }
732 /*
733 * Unmap the vcpu info page if the guest decided to place it somewhere
734 * else. This is only used from arch_domain_destroy, so there's no
735 * need to do anything clever.
736 */
737 static void
738 unmap_vcpu_info(struct vcpu *v)
739 {
740 struct domain *d = v->domain;
741 unsigned long mfn;
743 if ( v->arch.vcpu_info_mfn == INVALID_MFN )
744 return;
746 mfn = v->arch.vcpu_info_mfn;
747 unmap_domain_page_global(v->vcpu_info);
749 v->vcpu_info = (void *)&shared_info(d, vcpu_info[v->vcpu_id]);
750 v->arch.vcpu_info_mfn = INVALID_MFN;
752 put_page_and_type(mfn_to_page(mfn));
753 }
755 /*
756 * Map a guest page in and point the vcpu_info pointer at it. This
757 * makes sure that the vcpu_info is always pointing at a valid piece
758 * of memory, and it sets a pending event to make sure that a pending
759 * event doesn't get missed.
760 */
761 static int
762 map_vcpu_info(struct vcpu *v, unsigned long mfn, unsigned offset)
763 {
764 struct domain *d = v->domain;
765 void *mapping;
766 vcpu_info_t *new_info;
767 int i;
769 if ( offset > (PAGE_SIZE - sizeof(vcpu_info_t)) )
770 return -EINVAL;
772 if ( v->arch.vcpu_info_mfn != INVALID_MFN )
773 return -EINVAL;
775 /* Run this command on yourself or on other offline VCPUS. */
776 if ( (v != current) && !test_bit(_VPF_down, &v->pause_flags) )
777 return -EINVAL;
779 mfn = gmfn_to_mfn(d, mfn);
780 if ( !mfn_valid(mfn) ||
781 !get_page_and_type(mfn_to_page(mfn), d, PGT_writable_page) )
782 return -EINVAL;
784 mapping = map_domain_page_global(mfn);
785 if ( mapping == NULL )
786 {
787 put_page_and_type(mfn_to_page(mfn));
788 return -ENOMEM;
789 }
791 new_info = (vcpu_info_t *)(mapping + offset);
793 memcpy(new_info, v->vcpu_info, sizeof(*new_info));
795 v->vcpu_info = new_info;
796 v->arch.vcpu_info_mfn = mfn;
798 /* Set new vcpu_info pointer /before/ setting pending flags. */
799 wmb();
801 /*
802 * Mark everything as being pending just to make sure nothing gets
803 * lost. The domain will get a spurious event, but it can cope.
804 */
805 vcpu_info(v, evtchn_upcall_pending) = 1;
806 for ( i = 0; i < BITS_PER_GUEST_LONG(d); i++ )
807 set_bit(i, &vcpu_info(v, evtchn_pending_sel));
809 return 0;
810 }
812 long
813 arch_do_vcpu_op(
814 int cmd, struct vcpu *v, XEN_GUEST_HANDLE(void) arg)
815 {
816 long rc = 0;
818 switch ( cmd )
819 {
820 case VCPUOP_register_runstate_memory_area:
821 {
822 struct vcpu_register_runstate_memory_area area;
823 struct vcpu_runstate_info runstate;
825 rc = -EFAULT;
826 if ( copy_from_guest(&area, arg, 1) )
827 break;
829 if ( !guest_handle_okay(area.addr.h, 1) )
830 break;
832 rc = 0;
833 runstate_guest(v) = area.addr.h;
835 if ( v == current )
836 {
837 __copy_to_guest(runstate_guest(v), &v->runstate, 1);
838 }
839 else
840 {
841 vcpu_runstate_get(v, &runstate);
842 __copy_to_guest(runstate_guest(v), &runstate, 1);
843 }
845 break;
846 }
848 case VCPUOP_register_vcpu_info:
849 {
850 struct domain *d = v->domain;
851 struct vcpu_register_vcpu_info info;
853 rc = -EFAULT;
854 if ( copy_from_guest(&info, arg, 1) )
855 break;
857 domain_lock(d);
858 rc = map_vcpu_info(v, info.mfn, info.offset);
859 domain_unlock(d);
861 break;
862 }
864 case VCPUOP_get_physid:
865 {
866 struct vcpu_get_physid cpu_id;
868 rc = -EINVAL;
869 if ( !v->domain->is_pinned )
870 break;
872 cpu_id.phys_id =
873 (uint64_t)x86_cpu_to_apicid[v->vcpu_id] |
874 ((uint64_t)acpi_get_processor_id(v->vcpu_id) << 32);
876 rc = -EFAULT;
877 if ( copy_to_guest(arg, &cpu_id, 1) )
878 break;
880 rc = 0;
881 break;
882 }
884 default:
885 rc = -ENOSYS;
886 break;
887 }
889 return rc;
890 }
892 #ifdef __x86_64__
894 #define loadsegment(seg,value) ({ \
895 int __r = 1; \
896 asm volatile ( \
897 "1: movl %k1,%%" #seg "\n2:\n" \
898 ".section .fixup,\"ax\"\n" \
899 "3: xorl %k0,%k0\n" \
900 " movl %k0,%%" #seg "\n" \
901 " jmp 2b\n" \
902 ".previous\n" \
903 ".section __ex_table,\"a\"\n" \
904 " .align 8\n" \
905 " .quad 1b,3b\n" \
906 ".previous" \
907 : "=r" (__r) : "r" (value), "0" (__r) );\
908 __r; })
910 /*
911 * save_segments() writes a mask of segments which are dirty (non-zero),
912 * allowing load_segments() to avoid some expensive segment loads and
913 * MSR writes.
914 */
915 static DEFINE_PER_CPU(unsigned int, dirty_segment_mask);
916 #define DIRTY_DS 0x01
917 #define DIRTY_ES 0x02
918 #define DIRTY_FS 0x04
919 #define DIRTY_GS 0x08
920 #define DIRTY_FS_BASE 0x10
921 #define DIRTY_GS_BASE_USER 0x20
923 static void load_segments(struct vcpu *n)
924 {
925 struct vcpu_guest_context *nctxt = &n->arch.guest_context;
926 int all_segs_okay = 1;
927 unsigned int dirty_segment_mask, cpu = smp_processor_id();
929 /* Load and clear the dirty segment mask. */
930 dirty_segment_mask = per_cpu(dirty_segment_mask, cpu);
931 per_cpu(dirty_segment_mask, cpu) = 0;
933 /* Either selector != 0 ==> reload. */
934 if ( unlikely((dirty_segment_mask & DIRTY_DS) | nctxt->user_regs.ds) )
935 all_segs_okay &= loadsegment(ds, nctxt->user_regs.ds);
937 /* Either selector != 0 ==> reload. */
938 if ( unlikely((dirty_segment_mask & DIRTY_ES) | nctxt->user_regs.es) )
939 all_segs_okay &= loadsegment(es, nctxt->user_regs.es);
941 /*
942 * Either selector != 0 ==> reload.
943 * Also reload to reset FS_BASE if it was non-zero.
944 */
945 if ( unlikely((dirty_segment_mask & (DIRTY_FS | DIRTY_FS_BASE)) |
946 nctxt->user_regs.fs) )
947 all_segs_okay &= loadsegment(fs, nctxt->user_regs.fs);
949 /*
950 * Either selector != 0 ==> reload.
951 * Also reload to reset GS_BASE if it was non-zero.
952 */
953 if ( unlikely((dirty_segment_mask & (DIRTY_GS | DIRTY_GS_BASE_USER)) |
954 nctxt->user_regs.gs) )
955 {
956 /* Reset GS_BASE with user %gs? */
957 if ( (dirty_segment_mask & DIRTY_GS) || !nctxt->gs_base_user )
958 all_segs_okay &= loadsegment(gs, nctxt->user_regs.gs);
959 }
961 if ( !is_pv_32on64_domain(n->domain) )
962 {
963 /* This can only be non-zero if selector is NULL. */
964 if ( nctxt->fs_base )
965 wrmsr(MSR_FS_BASE,
966 nctxt->fs_base,
967 nctxt->fs_base>>32);
969 /* Most kernels have non-zero GS base, so don't bother testing. */
970 /* (This is also a serialising instruction, avoiding AMD erratum #88.) */
971 wrmsr(MSR_SHADOW_GS_BASE,
972 nctxt->gs_base_kernel,
973 nctxt->gs_base_kernel>>32);
975 /* This can only be non-zero if selector is NULL. */
976 if ( nctxt->gs_base_user )
977 wrmsr(MSR_GS_BASE,
978 nctxt->gs_base_user,
979 nctxt->gs_base_user>>32);
981 /* If in kernel mode then switch the GS bases around. */
982 if ( (n->arch.flags & TF_kernel_mode) )
983 asm volatile ( "swapgs" );
984 }
986 if ( unlikely(!all_segs_okay) )
987 {
988 struct cpu_user_regs *regs = guest_cpu_user_regs();
989 unsigned long *rsp =
990 (n->arch.flags & TF_kernel_mode) ?
991 (unsigned long *)regs->rsp :
992 (unsigned long *)nctxt->kernel_sp;
993 unsigned long cs_and_mask, rflags;
995 if ( is_pv_32on64_domain(n->domain) )
996 {
997 unsigned int *esp = ring_1(regs) ?
998 (unsigned int *)regs->rsp :
999 (unsigned int *)nctxt->kernel_sp;
1000 unsigned int cs_and_mask, eflags;
1001 int ret = 0;
1003 /* CS longword also contains full evtchn_upcall_mask. */
1004 cs_and_mask = (unsigned short)regs->cs |
1005 ((unsigned int)vcpu_info(n, evtchn_upcall_mask) << 16);
1006 /* Fold upcall mask into RFLAGS.IF. */
1007 eflags = regs->_eflags & ~X86_EFLAGS_IF;
1008 eflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
1010 if ( !ring_1(regs) )
1012 ret = put_user(regs->ss, esp-1);
1013 ret |= put_user(regs->_esp, esp-2);
1014 esp -= 2;
1017 if ( ret |
1018 put_user(eflags, esp-1) |
1019 put_user(cs_and_mask, esp-2) |
1020 put_user(regs->_eip, esp-3) |
1021 put_user(nctxt->user_regs.gs, esp-4) |
1022 put_user(nctxt->user_regs.fs, esp-5) |
1023 put_user(nctxt->user_regs.es, esp-6) |
1024 put_user(nctxt->user_regs.ds, esp-7) )
1026 gdprintk(XENLOG_ERR, "Error while creating compat "
1027 "failsafe callback frame.\n");
1028 domain_crash(n->domain);
1031 if ( test_bit(_VGCF_failsafe_disables_events,
1032 &n->arch.guest_context.flags) )
1033 vcpu_info(n, evtchn_upcall_mask) = 1;
1035 regs->entry_vector = TRAP_syscall;
1036 regs->_eflags &= 0xFFFCBEFFUL;
1037 regs->ss = FLAT_COMPAT_KERNEL_SS;
1038 regs->_esp = (unsigned long)(esp-7);
1039 regs->cs = FLAT_COMPAT_KERNEL_CS;
1040 regs->_eip = nctxt->failsafe_callback_eip;
1041 return;
1044 if ( !(n->arch.flags & TF_kernel_mode) )
1045 toggle_guest_mode(n);
1046 else
1047 regs->cs &= ~3;
1049 /* CS longword also contains full evtchn_upcall_mask. */
1050 cs_and_mask = (unsigned long)regs->cs |
1051 ((unsigned long)vcpu_info(n, evtchn_upcall_mask) << 32);
1053 /* Fold upcall mask into RFLAGS.IF. */
1054 rflags = regs->rflags & ~X86_EFLAGS_IF;
1055 rflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
1057 if ( put_user(regs->ss, rsp- 1) |
1058 put_user(regs->rsp, rsp- 2) |
1059 put_user(rflags, rsp- 3) |
1060 put_user(cs_and_mask, rsp- 4) |
1061 put_user(regs->rip, rsp- 5) |
1062 put_user(nctxt->user_regs.gs, rsp- 6) |
1063 put_user(nctxt->user_regs.fs, rsp- 7) |
1064 put_user(nctxt->user_regs.es, rsp- 8) |
1065 put_user(nctxt->user_regs.ds, rsp- 9) |
1066 put_user(regs->r11, rsp-10) |
1067 put_user(regs->rcx, rsp-11) )
1069 gdprintk(XENLOG_ERR, "Error while creating failsafe "
1070 "callback frame.\n");
1071 domain_crash(n->domain);
1074 if ( test_bit(_VGCF_failsafe_disables_events,
1075 &n->arch.guest_context.flags) )
1076 vcpu_info(n, evtchn_upcall_mask) = 1;
1078 regs->entry_vector = TRAP_syscall;
1079 regs->rflags &= ~(X86_EFLAGS_AC|X86_EFLAGS_VM|X86_EFLAGS_RF|
1080 X86_EFLAGS_NT|X86_EFLAGS_TF);
1081 regs->ss = FLAT_KERNEL_SS;
1082 regs->rsp = (unsigned long)(rsp-11);
1083 regs->cs = FLAT_KERNEL_CS;
1084 regs->rip = nctxt->failsafe_callback_eip;
1088 static void save_segments(struct vcpu *v)
1090 struct vcpu_guest_context *ctxt = &v->arch.guest_context;
1091 struct cpu_user_regs *regs = &ctxt->user_regs;
1092 unsigned int dirty_segment_mask = 0;
1094 regs->ds = read_segment_register(ds);
1095 regs->es = read_segment_register(es);
1096 regs->fs = read_segment_register(fs);
1097 regs->gs = read_segment_register(gs);
1099 if ( regs->ds )
1100 dirty_segment_mask |= DIRTY_DS;
1102 if ( regs->es )
1103 dirty_segment_mask |= DIRTY_ES;
1105 if ( regs->fs || is_pv_32on64_domain(v->domain) )
1107 dirty_segment_mask |= DIRTY_FS;
1108 ctxt->fs_base = 0; /* != 0 selector kills fs_base */
1110 else if ( ctxt->fs_base )
1112 dirty_segment_mask |= DIRTY_FS_BASE;
1115 if ( regs->gs || is_pv_32on64_domain(v->domain) )
1117 dirty_segment_mask |= DIRTY_GS;
1118 ctxt->gs_base_user = 0; /* != 0 selector kills gs_base_user */
1120 else if ( ctxt->gs_base_user )
1122 dirty_segment_mask |= DIRTY_GS_BASE_USER;
1125 this_cpu(dirty_segment_mask) = dirty_segment_mask;
1128 #define switch_kernel_stack(v) ((void)0)
1130 #elif defined(__i386__)
1132 #define load_segments(n) ((void)0)
1133 #define save_segments(p) ((void)0)
1135 static inline void switch_kernel_stack(struct vcpu *v)
1137 struct tss_struct *tss = &init_tss[smp_processor_id()];
1138 tss->esp1 = v->arch.guest_context.kernel_sp;
1139 tss->ss1 = v->arch.guest_context.kernel_ss;
1142 #endif /* __i386__ */
1144 static void paravirt_ctxt_switch_from(struct vcpu *v)
1146 save_segments(v);
1148 /*
1149 * Disable debug breakpoints. We do this aggressively because if we switch
1150 * to an HVM guest we may load DR0-DR3 with values that can cause #DE
1151 * inside Xen, before we get a chance to reload DR7, and this cannot always
1152 * safely be handled.
1153 */
1154 if ( unlikely(v->arch.guest_context.debugreg[7] & DR7_ACTIVE_MASK) )
1155 write_debugreg(7, 0);
1158 static void paravirt_ctxt_switch_to(struct vcpu *v)
1160 unsigned long cr4;
1162 set_int80_direct_trap(v);
1163 switch_kernel_stack(v);
1165 cr4 = pv_guest_cr4_to_real_cr4(v->arch.guest_context.ctrlreg[4]);
1166 if ( unlikely(cr4 != read_cr4()) )
1167 write_cr4(cr4);
1169 if ( unlikely(v->arch.guest_context.debugreg[7] & DR7_ACTIVE_MASK) )
1171 write_debugreg(0, v->arch.guest_context.debugreg[0]);
1172 write_debugreg(1, v->arch.guest_context.debugreg[1]);
1173 write_debugreg(2, v->arch.guest_context.debugreg[2]);
1174 write_debugreg(3, v->arch.guest_context.debugreg[3]);
1175 write_debugreg(6, v->arch.guest_context.debugreg[6]);
1176 write_debugreg(7, v->arch.guest_context.debugreg[7]);
1180 static inline int need_full_gdt(struct vcpu *v)
1182 return (!is_hvm_vcpu(v) && !is_idle_vcpu(v));
1185 static void __context_switch(void)
1187 struct cpu_user_regs *stack_regs = guest_cpu_user_regs();
1188 unsigned int cpu = smp_processor_id();
1189 struct vcpu *p = per_cpu(curr_vcpu, cpu);
1190 struct vcpu *n = current;
1191 struct desc_struct *gdt;
1192 struct desc_ptr gdt_desc;
1194 ASSERT(p != n);
1195 ASSERT(cpus_empty(n->vcpu_dirty_cpumask));
1197 if ( !is_idle_vcpu(p) )
1199 memcpy(&p->arch.guest_context.user_regs,
1200 stack_regs,
1201 CTXT_SWITCH_STACK_BYTES);
1202 unlazy_fpu(p);
1203 p->arch.ctxt_switch_from(p);
1206 if ( !is_idle_vcpu(n) )
1208 memcpy(stack_regs,
1209 &n->arch.guest_context.user_regs,
1210 CTXT_SWITCH_STACK_BYTES);
1211 n->arch.ctxt_switch_to(n);
1214 if ( p->domain != n->domain )
1215 cpu_set(cpu, n->domain->domain_dirty_cpumask);
1216 cpu_set(cpu, n->vcpu_dirty_cpumask);
1218 gdt = !is_pv_32on64_vcpu(n) ? per_cpu(gdt_table, cpu) :
1219 per_cpu(compat_gdt_table, cpu);
1220 if ( need_full_gdt(n) )
1222 struct page_info *page = virt_to_page(gdt);
1223 unsigned int i;
1224 for ( i = 0; i < NR_RESERVED_GDT_PAGES; i++ )
1225 l1e_write(n->domain->arch.mm_perdomain_pt +
1226 (n->vcpu_id << GDT_LDT_VCPU_SHIFT) +
1227 FIRST_RESERVED_GDT_PAGE + i,
1228 l1e_from_page(page + i, __PAGE_HYPERVISOR));
1231 if ( need_full_gdt(p) &&
1232 ((p->vcpu_id != n->vcpu_id) || !need_full_gdt(n)) )
1234 gdt_desc.limit = LAST_RESERVED_GDT_BYTE;
1235 gdt_desc.base = (unsigned long)(gdt - FIRST_RESERVED_GDT_ENTRY);
1236 asm volatile ( "lgdt %0" : : "m" (gdt_desc) );
1239 write_ptbase(n);
1241 if ( need_full_gdt(n) &&
1242 ((p->vcpu_id != n->vcpu_id) || !need_full_gdt(p)) )
1244 gdt_desc.limit = LAST_RESERVED_GDT_BYTE;
1245 gdt_desc.base = GDT_VIRT_START(n);
1246 asm volatile ( "lgdt %0" : : "m" (gdt_desc) );
1249 if ( p->domain != n->domain )
1250 cpu_clear(cpu, p->domain->domain_dirty_cpumask);
1251 cpu_clear(cpu, p->vcpu_dirty_cpumask);
1253 per_cpu(curr_vcpu, cpu) = n;
1257 void context_switch(struct vcpu *prev, struct vcpu *next)
1259 unsigned int cpu = smp_processor_id();
1260 cpumask_t dirty_mask = next->vcpu_dirty_cpumask;
1262 ASSERT(local_irq_is_enabled());
1264 /* Allow at most one CPU at a time to be dirty. */
1265 ASSERT(cpus_weight(dirty_mask) <= 1);
1266 if ( unlikely(!cpu_isset(cpu, dirty_mask) && !cpus_empty(dirty_mask)) )
1268 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1269 if ( !cpus_empty(next->vcpu_dirty_cpumask) )
1270 flush_tlb_mask(next->vcpu_dirty_cpumask);
1273 if ( is_hvm_vcpu(prev) && !list_empty(&prev->arch.hvm_vcpu.tm_list) )
1274 pt_save_timer(prev);
1276 local_irq_disable();
1278 set_current(next);
1280 if ( (per_cpu(curr_vcpu, cpu) == next) || is_idle_vcpu(next) )
1282 local_irq_enable();
1284 else
1286 __context_switch();
1288 #ifdef CONFIG_COMPAT
1289 if ( !is_hvm_vcpu(next) &&
1290 (is_idle_vcpu(prev) ||
1291 is_hvm_vcpu(prev) ||
1292 is_pv_32on64_vcpu(prev) != is_pv_32on64_vcpu(next)) )
1294 uint64_t efer = read_efer();
1295 if ( !(efer & EFER_SCE) )
1296 write_efer(efer | EFER_SCE);
1298 #endif
1300 /* Re-enable interrupts before restoring state which may fault. */
1301 local_irq_enable();
1303 if ( !is_hvm_vcpu(next) )
1305 load_LDT(next);
1306 load_segments(next);
1310 context_saved(prev);
1312 /* Update per-VCPU guest runstate shared memory area (if registered). */
1313 if ( !guest_handle_is_null(runstate_guest(next)) )
1315 if ( !is_pv_32on64_domain(next->domain) )
1316 __copy_to_guest(runstate_guest(next), &next->runstate, 1);
1317 #ifdef CONFIG_COMPAT
1318 else
1320 struct compat_vcpu_runstate_info info;
1322 XLAT_vcpu_runstate_info(&info, &next->runstate);
1323 __copy_to_guest(next->runstate_guest.compat, &info, 1);
1325 #endif
1328 schedule_tail(next);
1329 BUG();
1332 void continue_running(struct vcpu *same)
1334 schedule_tail(same);
1335 BUG();
1338 int __sync_lazy_execstate(void)
1340 unsigned long flags;
1341 int switch_required;
1343 local_irq_save(flags);
1345 switch_required = (this_cpu(curr_vcpu) != current);
1347 if ( switch_required )
1349 ASSERT(current == idle_vcpu[smp_processor_id()]);
1350 __context_switch();
1353 local_irq_restore(flags);
1355 return switch_required;
1358 void sync_vcpu_execstate(struct vcpu *v)
1360 if ( cpu_isset(smp_processor_id(), v->vcpu_dirty_cpumask) )
1361 (void)__sync_lazy_execstate();
1363 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1364 flush_tlb_mask(v->vcpu_dirty_cpumask);
1367 struct migrate_info {
1368 long (*func)(void *data);
1369 void *data;
1370 void (*saved_schedule_tail)(struct vcpu *);
1371 cpumask_t saved_affinity;
1372 unsigned int nest;
1373 };
1375 static void continue_hypercall_on_cpu_helper(struct vcpu *v)
1377 struct cpu_user_regs *regs = guest_cpu_user_regs();
1378 struct migrate_info *info = v->arch.continue_info;
1379 cpumask_t mask = info->saved_affinity;
1380 void (*saved_schedule_tail)(struct vcpu *) = info->saved_schedule_tail;
1382 regs->eax = info->func(info->data);
1384 if ( info->nest-- == 0 )
1386 xfree(info);
1387 v->arch.schedule_tail = saved_schedule_tail;
1388 v->arch.continue_info = NULL;
1389 vcpu_unlock_affinity(v, &mask);
1392 (*saved_schedule_tail)(v);
1395 int continue_hypercall_on_cpu(int cpu, long (*func)(void *data), void *data)
1397 struct vcpu *v = current;
1398 struct migrate_info *info;
1399 cpumask_t mask = cpumask_of_cpu(cpu);
1400 int rc;
1402 if ( cpu == smp_processor_id() )
1403 return func(data);
1405 info = v->arch.continue_info;
1406 if ( info == NULL )
1408 info = xmalloc(struct migrate_info);
1409 if ( info == NULL )
1410 return -ENOMEM;
1412 rc = vcpu_lock_affinity(v, &mask);
1413 if ( rc )
1415 xfree(info);
1416 return rc;
1419 info->saved_schedule_tail = v->arch.schedule_tail;
1420 info->saved_affinity = mask;
1421 info->nest = 0;
1423 v->arch.schedule_tail = continue_hypercall_on_cpu_helper;
1424 v->arch.continue_info = info;
1426 else
1428 BUG_ON(info->nest != 0);
1429 rc = vcpu_locked_change_affinity(v, &mask);
1430 if ( rc )
1431 return rc;
1432 info->nest++;
1435 info->func = func;
1436 info->data = data;
1438 /* Dummy return value will be overwritten by new schedule_tail. */
1439 BUG_ON(!test_bit(SCHEDULE_SOFTIRQ, &softirq_pending(smp_processor_id())));
1440 return 0;
1443 #define next_arg(fmt, args) ({ \
1444 unsigned long __arg; \
1445 switch ( *(fmt)++ ) \
1446 { \
1447 case 'i': __arg = (unsigned long)va_arg(args, unsigned int); break; \
1448 case 'l': __arg = (unsigned long)va_arg(args, unsigned long); break; \
1449 case 'h': __arg = (unsigned long)va_arg(args, void *); break; \
1450 default: __arg = 0; BUG(); \
1451 } \
1452 __arg; \
1453 })
1455 DEFINE_PER_CPU(char, hc_preempted);
1457 unsigned long hypercall_create_continuation(
1458 unsigned int op, const char *format, ...)
1460 struct mc_state *mcs = &this_cpu(mc_state);
1461 struct cpu_user_regs *regs;
1462 const char *p = format;
1463 unsigned long arg;
1464 unsigned int i;
1465 va_list args;
1467 va_start(args, format);
1469 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1471 __set_bit(_MCSF_call_preempted, &mcs->flags);
1473 for ( i = 0; *p != '\0'; i++ )
1474 mcs->call.args[i] = next_arg(p, args);
1475 if ( is_pv_32on64_domain(current->domain) )
1477 for ( ; i < 6; i++ )
1478 mcs->call.args[i] = 0;
1481 else
1483 regs = guest_cpu_user_regs();
1484 regs->eax = op;
1485 /*
1486 * For PV guest, we update EIP to re-execute 'syscall' / 'int 0x82';
1487 * HVM does not need this since 'vmcall' / 'vmmcall' is fault-like.
1488 */
1489 if ( !is_hvm_vcpu(current) )
1490 regs->eip -= 2; /* re-execute 'syscall' / 'int 0x82' */
1492 #ifdef __x86_64__
1493 if ( !is_hvm_vcpu(current) ?
1494 !is_pv_32on64_vcpu(current) :
1495 (hvm_guest_x86_mode(current) == 8) )
1497 for ( i = 0; *p != '\0'; i++ )
1499 arg = next_arg(p, args);
1500 switch ( i )
1502 case 0: regs->rdi = arg; break;
1503 case 1: regs->rsi = arg; break;
1504 case 2: regs->rdx = arg; break;
1505 case 3: regs->r10 = arg; break;
1506 case 4: regs->r8 = arg; break;
1507 case 5: regs->r9 = arg; break;
1511 else
1512 #endif
1514 if ( supervisor_mode_kernel )
1515 regs->eip &= ~31; /* re-execute entire hypercall entry stub */
1517 for ( i = 0; *p != '\0'; i++ )
1519 arg = next_arg(p, args);
1520 switch ( i )
1522 case 0: regs->ebx = arg; break;
1523 case 1: regs->ecx = arg; break;
1524 case 2: regs->edx = arg; break;
1525 case 3: regs->esi = arg; break;
1526 case 4: regs->edi = arg; break;
1527 case 5: regs->ebp = arg; break;
1532 this_cpu(hc_preempted) = 1;
1535 va_end(args);
1537 return op;
1540 #ifdef CONFIG_COMPAT
1541 int hypercall_xlat_continuation(unsigned int *id, unsigned int mask, ...)
1543 int rc = 0;
1544 struct mc_state *mcs = &this_cpu(mc_state);
1545 struct cpu_user_regs *regs;
1546 unsigned int i, cval = 0;
1547 unsigned long nval = 0;
1548 va_list args;
1550 BUG_ON(*id > 5);
1551 BUG_ON(mask & (1U << *id));
1553 va_start(args, mask);
1555 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1557 if ( !test_bit(_MCSF_call_preempted, &mcs->flags) )
1558 return 0;
1559 for ( i = 0; i < 6; ++i, mask >>= 1 )
1561 if ( mask & 1 )
1563 nval = va_arg(args, unsigned long);
1564 cval = va_arg(args, unsigned int);
1565 if ( cval == nval )
1566 mask &= ~1U;
1567 else
1568 BUG_ON(nval == (unsigned int)nval);
1570 else if ( id && *id == i )
1572 *id = mcs->call.args[i];
1573 id = NULL;
1575 if ( (mask & 1) && mcs->call.args[i] == nval )
1577 mcs->call.args[i] = cval;
1578 ++rc;
1580 else
1581 BUG_ON(mcs->call.args[i] != (unsigned int)mcs->call.args[i]);
1584 else
1586 regs = guest_cpu_user_regs();
1587 for ( i = 0; i < 6; ++i, mask >>= 1 )
1589 unsigned long *reg;
1591 switch ( i )
1593 case 0: reg = &regs->ebx; break;
1594 case 1: reg = &regs->ecx; break;
1595 case 2: reg = &regs->edx; break;
1596 case 3: reg = &regs->esi; break;
1597 case 4: reg = &regs->edi; break;
1598 case 5: reg = &regs->ebp; break;
1599 default: BUG(); reg = NULL; break;
1601 if ( (mask & 1) )
1603 nval = va_arg(args, unsigned long);
1604 cval = va_arg(args, unsigned int);
1605 if ( cval == nval )
1606 mask &= ~1U;
1607 else
1608 BUG_ON(nval == (unsigned int)nval);
1610 else if ( id && *id == i )
1612 *id = *reg;
1613 id = NULL;
1615 if ( (mask & 1) && *reg == nval )
1617 *reg = cval;
1618 ++rc;
1620 else
1621 BUG_ON(*reg != (unsigned int)*reg);
1625 va_end(args);
1627 return rc;
1629 #endif
1631 static int relinquish_memory(
1632 struct domain *d, struct list_head *list, unsigned long type)
1634 struct list_head *ent;
1635 struct page_info *page;
1636 unsigned long x, y;
1637 int ret = 0;
1639 /* Use a recursive lock, as we may enter 'free_domheap_page'. */
1640 spin_lock_recursive(&d->page_alloc_lock);
1642 ent = list->next;
1643 while ( ent != list )
1645 page = list_entry(ent, struct page_info, list);
1647 /* Grab a reference to the page so it won't disappear from under us. */
1648 if ( unlikely(!get_page(page, d)) )
1650 /* Couldn't get a reference -- someone is freeing this page. */
1651 ent = ent->next;
1652 list_move_tail(&page->list, &d->arch.relmem_list);
1653 continue;
1656 if ( test_and_clear_bit(_PGT_pinned, &page->u.inuse.type_info) )
1657 ret = put_page_and_type_preemptible(page, 1);
1658 switch ( ret )
1660 case 0:
1661 break;
1662 case -EAGAIN:
1663 case -EINTR:
1664 set_bit(_PGT_pinned, &page->u.inuse.type_info);
1665 put_page(page);
1666 goto out;
1667 default:
1668 BUG();
1671 if ( test_and_clear_bit(_PGC_allocated, &page->count_info) )
1672 put_page(page);
1674 /*
1675 * Forcibly invalidate top-most, still valid page tables at this point
1676 * to break circular 'linear page table' references as well as clean up
1677 * partially validated pages. This is okay because MMU structures are
1678 * not shared across domains and this domain is now dead. Thus top-most
1679 * valid tables are not in use so a non-zero count means circular
1680 * reference or partially validated.
1681 */
1682 y = page->u.inuse.type_info;
1683 for ( ; ; )
1685 x = y;
1686 if ( likely((x & PGT_type_mask) != type) ||
1687 likely(!(x & (PGT_validated|PGT_partial))) )
1688 break;
1690 y = cmpxchg(&page->u.inuse.type_info, x,
1691 x & ~(PGT_validated|PGT_partial));
1692 if ( likely(y == x) )
1694 /* No need for atomic update of type_info here: noone else updates it. */
1695 switch ( ret = free_page_type(page, x, 1) )
1697 case 0:
1698 break;
1699 case -EINTR:
1700 page->u.inuse.type_info |= PGT_validated;
1701 if ( x & PGT_partial )
1702 put_page(page);
1703 put_page(page);
1704 ret = -EAGAIN;
1705 goto out;
1706 case -EAGAIN:
1707 page->u.inuse.type_info |= PGT_partial;
1708 if ( x & PGT_partial )
1709 put_page(page);
1710 goto out;
1711 default:
1712 BUG();
1714 if ( x & PGT_partial )
1716 page->u.inuse.type_info--;
1717 put_page(page);
1719 break;
1723 /* Follow the list chain and /then/ potentially free the page. */
1724 ent = ent->next;
1725 list_move_tail(&page->list, &d->arch.relmem_list);
1726 put_page(page);
1728 if ( hypercall_preempt_check() )
1730 ret = -EAGAIN;
1731 goto out;
1735 list_splice_init(&d->arch.relmem_list, list);
1737 out:
1738 spin_unlock_recursive(&d->page_alloc_lock);
1739 return ret;
1742 static void vcpu_destroy_pagetables(struct vcpu *v)
1744 struct domain *d = v->domain;
1745 unsigned long pfn;
1747 #ifdef __x86_64__
1748 if ( is_pv_32on64_vcpu(v) )
1750 pfn = l4e_get_pfn(*(l4_pgentry_t *)
1751 __va(pagetable_get_paddr(v->arch.guest_table)));
1753 if ( pfn != 0 )
1755 if ( paging_mode_refcounts(d) )
1756 put_page(mfn_to_page(pfn));
1757 else
1758 put_page_and_type(mfn_to_page(pfn));
1761 l4e_write(
1762 (l4_pgentry_t *)__va(pagetable_get_paddr(v->arch.guest_table)),
1763 l4e_empty());
1765 v->arch.cr3 = 0;
1766 return;
1768 #endif
1770 pfn = pagetable_get_pfn(v->arch.guest_table);
1771 if ( pfn != 0 )
1773 if ( paging_mode_refcounts(d) )
1774 put_page(mfn_to_page(pfn));
1775 else
1776 put_page_and_type(mfn_to_page(pfn));
1777 v->arch.guest_table = pagetable_null();
1780 #ifdef __x86_64__
1781 /* Drop ref to guest_table_user (from MMUEXT_NEW_USER_BASEPTR) */
1782 pfn = pagetable_get_pfn(v->arch.guest_table_user);
1783 if ( pfn != 0 )
1785 if ( !is_pv_32bit_vcpu(v) )
1787 if ( paging_mode_refcounts(d) )
1788 put_page(mfn_to_page(pfn));
1789 else
1790 put_page_and_type(mfn_to_page(pfn));
1792 v->arch.guest_table_user = pagetable_null();
1794 #endif
1796 v->arch.cr3 = 0;
1799 int domain_relinquish_resources(struct domain *d)
1801 int ret;
1802 struct vcpu *v;
1804 BUG_ON(!cpus_empty(d->domain_dirty_cpumask));
1806 switch ( d->arch.relmem )
1808 case RELMEM_not_started:
1809 /* Tear down paging-assistance stuff. */
1810 paging_teardown(d);
1812 for_each_vcpu ( d, v )
1814 /* Drop the in-use references to page-table bases. */
1815 vcpu_destroy_pagetables(v);
1817 /*
1818 * Relinquish GDT mappings. No need for explicit unmapping of the
1819 * LDT as it automatically gets squashed with the guest mappings.
1820 */
1821 destroy_gdt(v);
1823 unmap_vcpu_info(v);
1826 if ( d->arch.pirq_eoi_map != NULL )
1828 unmap_domain_page_global(d->arch.pirq_eoi_map);
1829 put_page_and_type(mfn_to_page(d->arch.pirq_eoi_map_mfn));
1830 d->arch.pirq_eoi_map = NULL;
1833 d->arch.relmem = RELMEM_xen;
1834 /* fallthrough */
1836 /* Relinquish every page of memory. */
1837 case RELMEM_xen:
1838 ret = relinquish_memory(d, &d->xenpage_list, ~0UL);
1839 if ( ret )
1840 return ret;
1841 #if CONFIG_PAGING_LEVELS >= 4
1842 d->arch.relmem = RELMEM_l4;
1843 /* fallthrough */
1845 case RELMEM_l4:
1846 ret = relinquish_memory(d, &d->page_list, PGT_l4_page_table);
1847 if ( ret )
1848 return ret;
1849 #endif
1850 #if CONFIG_PAGING_LEVELS >= 3
1851 d->arch.relmem = RELMEM_l3;
1852 /* fallthrough */
1854 case RELMEM_l3:
1855 ret = relinquish_memory(d, &d->page_list, PGT_l3_page_table);
1856 if ( ret )
1857 return ret;
1858 #endif
1859 d->arch.relmem = RELMEM_l2;
1860 /* fallthrough */
1862 case RELMEM_l2:
1863 ret = relinquish_memory(d, &d->page_list, PGT_l2_page_table);
1864 if ( ret )
1865 return ret;
1866 d->arch.relmem = RELMEM_done;
1867 /* fallthrough */
1869 case RELMEM_done:
1870 break;
1872 default:
1873 BUG();
1876 if ( is_hvm_domain(d) )
1877 hvm_domain_relinquish_resources(d);
1879 return 0;
1882 void arch_dump_domain_info(struct domain *d)
1884 paging_dump_domain_info(d);
1887 void arch_dump_vcpu_info(struct vcpu *v)
1889 paging_dump_vcpu_info(v);
1892 void domain_cpuid(
1893 struct domain *d,
1894 unsigned int input,
1895 unsigned int sub_input,
1896 unsigned int *eax,
1897 unsigned int *ebx,
1898 unsigned int *ecx,
1899 unsigned int *edx)
1901 cpuid_input_t *cpuid;
1902 int i;
1904 for ( i = 0; i < MAX_CPUID_INPUT; i++ )
1906 cpuid = &d->arch.cpuids[i];
1908 if ( (cpuid->input[0] == input) &&
1909 ((cpuid->input[1] == XEN_CPUID_INPUT_UNUSED) ||
1910 (cpuid->input[1] == sub_input)) )
1912 *eax = cpuid->eax;
1913 *ebx = cpuid->ebx;
1914 *ecx = cpuid->ecx;
1915 *edx = cpuid->edx;
1916 return;
1920 *eax = *ebx = *ecx = *edx = 0;
1923 void vcpu_kick(struct vcpu *v)
1925 /*
1926 * NB1. 'pause_flags' and 'processor' must be checked /after/ update of
1927 * pending flag. These values may fluctuate (after all, we hold no
1928 * locks) but the key insight is that each change will cause
1929 * evtchn_upcall_pending to be polled.
1931 * NB2. We save the running flag across the unblock to avoid a needless
1932 * IPI for domains that we IPI'd to unblock.
1933 */
1934 bool_t running = v->is_running;
1935 vcpu_unblock(v);
1936 if ( running && (in_irq() || (v != current)) )
1937 cpu_raise_softirq(v->processor, VCPU_KICK_SOFTIRQ);
1940 void vcpu_mark_events_pending(struct vcpu *v)
1942 int already_pending = test_and_set_bit(
1943 0, (unsigned long *)&vcpu_info(v, evtchn_upcall_pending));
1945 if ( already_pending )
1946 return;
1948 if ( is_hvm_vcpu(v) )
1949 hvm_assert_evtchn_irq(v);
1950 else
1951 vcpu_kick(v);
1954 static void vcpu_kick_softirq(void)
1956 /*
1957 * Nothing to do here: we merely prevent notifiers from racing with checks
1958 * executed on return to guest context with interrupts enabled. See, for
1959 * example, xxx_intr_assist() executed on return to HVM guest context.
1960 */
1963 static int __init init_vcpu_kick_softirq(void)
1965 open_softirq(VCPU_KICK_SOFTIRQ, vcpu_kick_softirq);
1966 return 0;
1968 __initcall(init_vcpu_kick_softirq);
1971 /*
1972 * Local variables:
1973 * mode: C
1974 * c-set-style: "BSD"
1975 * c-basic-offset: 4
1976 * tab-width: 4
1977 * indent-tabs-mode: nil
1978 * End:
1979 */