ia64/xen-unstable

view xen/arch/ia64/vmx/pal_emul.c @ 9507:67b24fc635ae

[IA64] warning fix

Fixed some compilation warnings

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
author awilliam@xenbuild.aw
date Tue Apr 11 13:54:58 2006 -0600 (2006-04-11)
parents 8a551ec13d93
children e8383c2fcd50
line source
1 /*
2 * PAL/SAL call delegation
3 *
4 * Copyright (c) 2004 Li Susie <susie.li@intel.com>
5 * Copyright (c) 2005 Yu Ke <ke.yu@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
18 * Place - Suite 330, Boston, MA 02111-1307 USA.
19 */
21 #include <asm/vmx_vcpu.h>
22 #include <asm/pal.h>
23 #include <asm/sal.h>
25 static void
26 get_pal_parameters (VCPU *vcpu, UINT64 *gr29,
27 UINT64 *gr30, UINT64 *gr31) {
29 vcpu_get_gr_nat(vcpu,29,gr29);
30 vcpu_get_gr_nat(vcpu,30,gr30);
31 vcpu_get_gr_nat(vcpu,31,gr31);
32 }
34 static void
35 set_pal_result (VCPU *vcpu,struct ia64_pal_retval result) {
37 vcpu_set_gr(vcpu,8, result.status,0);
38 vcpu_set_gr(vcpu,9, result.v0,0);
39 vcpu_set_gr(vcpu,10, result.v1,0);
40 vcpu_set_gr(vcpu,11, result.v2,0);
41 }
44 static struct ia64_pal_retval
45 pal_cache_flush (VCPU *vcpu) {
46 UINT64 gr28,gr29, gr30, gr31;
47 struct ia64_pal_retval result;
49 get_pal_parameters (vcpu, &gr29, &gr30, &gr31);
50 vcpu_get_gr_nat(vcpu,28,&gr28);
52 /* Always call Host Pal in int=1 */
53 gr30 = gr30 &(~(0x2UL));
55 /* call Host PAL cache flush */
56 result=ia64_pal_call_static(gr28 ,gr29, gr30,gr31,1); // Clear psr.ic when call PAL_CACHE_FLUSH
58 /* If host PAL call is interrupted, then loop to complete it */
59 // while (result.status == 1) {
60 // ia64_pal_call_static(gr28 ,gr29, gr30,
61 // result.v1,1LL);
62 // }
63 while (result.status != 0) {
64 panic("PAL_CACHE_FLUSH ERROR, status %ld", result.status);
65 }
67 return result;
68 }
70 static struct ia64_pal_retval
71 pal_vm_tr_read (VCPU *vcpu ) {
72 struct ia64_pal_retval result;
74 result.status= -1; //unimplemented
76 return result;
77 }
80 static struct ia64_pal_retval
81 pal_prefetch_visibility (VCPU *vcpu) {
82 /* Due to current MM virtualization algorithm,
83 * We do not allow guest to change mapping attribute.
84 * Thus we will not support PAL_PREFETCH_VISIBILITY
85 */
86 struct ia64_pal_retval result;
88 result.status= -1; //unimplemented
90 return result;
91 }
93 static struct ia64_pal_retval
94 pal_platform_addr(VCPU *vcpu) {
95 struct ia64_pal_retval result;
97 result.status= 0; //success
99 return result;
100 }
102 static struct ia64_pal_retval
103 pal_halt (VCPU *vcpu) {
104 //bugbug: to be implement.
105 struct ia64_pal_retval result;
107 result.status= -1; //unimplemented
109 return result;
110 }
113 static struct ia64_pal_retval
114 pal_halt_light (VCPU *vcpu) {
115 struct ia64_pal_retval result;
117 result.status= -1; //unimplemented
119 return result;
120 }
122 static struct ia64_pal_retval
123 pal_cache_read (VCPU *vcpu) {
124 struct ia64_pal_retval result;
126 result.status= -1; //unimplemented
128 return result;
129 }
131 static struct ia64_pal_retval
132 pal_cache_write (VCPU *vcpu) {
133 struct ia64_pal_retval result;
135 result.status= -1; //unimplemented
137 return result;
138 }
140 static struct ia64_pal_retval
141 pal_bus_get_features(VCPU *vcpu){
142 struct ia64_pal_retval result;
144 result.status= -1; //unimplemented
145 return result;
146 }
148 static struct ia64_pal_retval
149 pal_cache_summary(VCPU *vcpu){
150 struct ia64_pal_retval result;
152 result.status= -1; //unimplemented
153 return result;
154 }
156 static struct ia64_pal_retval
157 pal_cache_init(VCPU *vcpu){
158 struct ia64_pal_retval result;
159 result.status=0;
160 return result;
161 }
163 static struct ia64_pal_retval
164 pal_cache_info(VCPU *vcpu){
165 struct ia64_pal_retval result;
167 result.status= -1; //unimplemented
168 return result;
169 }
171 static struct ia64_pal_retval
172 pal_cache_prot_info(VCPU *vcpu){
173 struct ia64_pal_retval result;
175 result.status= -1; //unimplemented
176 return result;
177 }
179 static struct ia64_pal_retval
180 pal_mem_attrib(VCPU *vcpu){
181 struct ia64_pal_retval result;
183 result.status= -1; //unimplemented
184 return result;
185 }
187 static struct ia64_pal_retval
188 pal_debug_info(VCPU *vcpu){
189 struct ia64_pal_retval result;
191 result.status= -1; //unimplemented
192 return result;
193 }
195 static struct ia64_pal_retval
196 pal_fixed_addr(VCPU *vcpu){
197 }
199 static struct ia64_pal_retval
200 pal_freq_base(VCPU *vcpu){
201 struct ia64_pal_retval result;
202 struct ia64_sal_retval isrv;
204 PAL_CALL(result,PAL_FREQ_BASE, 0, 0, 0);
205 if(result.v0 == 0){ //PAL_FREQ_BASE may not be implemented in some platforms, call SAL instead.
206 SAL_CALL(isrv, SAL_FREQ_BASE,
207 SAL_FREQ_BASE_PLATFORM, 0, 0, 0, 0, 0, 0);
208 result.status = isrv.status;
209 result.v0 = isrv.v0;
210 result.v1 = result.v2 =0;
211 }
212 return result;
213 }
215 static struct ia64_pal_retval
216 pal_freq_ratios(VCPU *vcpu){
217 struct ia64_pal_retval result;
219 PAL_CALL(result,PAL_FREQ_RATIOS, 0, 0, 0);
220 return result;
221 }
223 static struct ia64_pal_retval
224 pal_halt_info(VCPU *vcpu){
225 struct ia64_pal_retval result;
227 result.status= -1; //unimplemented
228 return result;
229 }
231 static struct ia64_pal_retval
232 pal_logical_to_physica(VCPU *vcpu){
233 struct ia64_pal_retval result;
235 result.status= -1; //unimplemented
236 return result;
237 }
239 static struct ia64_pal_retval
240 pal_perf_mon_info(VCPU *vcpu){
241 struct ia64_pal_retval result;
243 result.status= -1; //unimplemented
244 return result;
245 }
247 static struct ia64_pal_retval
248 pal_proc_get_features(VCPU *vcpu){
249 struct ia64_pal_retval result;
251 result.status= -1; //unimplemented
252 return result;
253 }
255 static struct ia64_pal_retval
256 pal_ptce_info(VCPU *vcpu){
257 struct ia64_pal_retval result;
259 result.status= -1; //unimplemented
260 return result;
261 }
263 static struct ia64_pal_retval
264 pal_register_info(VCPU *vcpu){
265 struct ia64_pal_retval result;
267 result.status= -1; //unimplemented
268 return result;
269 }
271 static struct ia64_pal_retval
272 pal_rse_info(VCPU *vcpu){
273 struct ia64_pal_retval result;
275 result.status= -1; //unimplemented
276 return result;
277 }
278 static struct ia64_pal_retval
279 pal_test_info(VCPU *vcpu){
280 struct ia64_pal_retval result;
282 result.status= -1; //unimplemented
283 return result;
284 }
286 static struct ia64_pal_retval
287 pal_vm_summary(VCPU *vcpu){
288 struct ia64_pal_retval result;
290 result.status= -1; //unimplemented
291 return result;
292 }
294 static struct ia64_pal_retval
295 pal_vm_info(VCPU *vcpu){
296 struct ia64_pal_retval result;
298 result.status= -1; //unimplemented
299 return result;
300 }
302 static struct ia64_pal_retval
303 pal_vm_page_size(VCPU *vcpu){
304 struct ia64_pal_retval result;
306 result.status= -1; //unimplemented
307 return result;
308 }
309 void
310 pal_emul( VCPU *vcpu) {
311 UINT64 gr28;
312 struct ia64_pal_retval result;
315 vcpu_get_gr_nat(vcpu,28,&gr28); //bank1
317 switch (gr28) {
318 case PAL_CACHE_FLUSH:
319 result = pal_cache_flush (vcpu);
320 break;
322 case PAL_PREFETCH_VISIBILITY:
323 result = pal_prefetch_visibility (vcpu);
324 break;
326 case PAL_VM_TR_READ:
327 result = pal_vm_tr_read (vcpu);
328 break;
330 case PAL_HALT:
331 result = pal_halt (vcpu);
332 break;
334 case PAL_HALT_LIGHT:
335 result = pal_halt_light (vcpu);
336 break;
338 case PAL_CACHE_READ:
339 result = pal_cache_read (vcpu);
340 break;
342 case PAL_CACHE_WRITE:
343 result = pal_cache_write (vcpu);
344 break;
346 case PAL_PLATFORM_ADDR:
347 result = pal_platform_addr (vcpu);
348 break;
350 case PAL_FREQ_RATIOS:
351 result = pal_freq_ratios (vcpu);
352 break;
354 case PAL_FREQ_BASE:
355 result = pal_freq_base (vcpu);
356 break;
358 case PAL_BUS_GET_FEATURES :
359 result = pal_bus_get_features (vcpu);
360 break;
362 case PAL_CACHE_SUMMARY :
363 result = pal_cache_summary (vcpu);
364 break;
366 case PAL_CACHE_INIT :
367 result = pal_cache_init(vcpu);
368 break;
370 case PAL_CACHE_INFO :
371 result = pal_cache_info(vcpu);
372 break;
374 case PAL_CACHE_PROT_INFO :
375 result = pal_cache_prot_info(vcpu);
376 break;
378 case PAL_MEM_ATTRIB :
379 result = pal_mem_attrib(vcpu);
380 break;
382 case PAL_DEBUG_INFO :
383 result = pal_debug_info(vcpu);
384 break;
386 case PAL_FIXED_ADDR :
387 result = pal_fixed_addr(vcpu);
388 break;
390 case PAL_HALT_INFO :
391 result = pal_halt_info(vcpu);
392 break;
394 case PAL_LOGICAL_TO_PHYSICAL :
395 result = pal_logical_to_physica(vcpu);
396 break;
398 case PAL_PERF_MON_INFO :
399 result = pal_perf_mon_info(vcpu);
400 break;
402 case PAL_PROC_GET_FEATURES:
403 result = pal_proc_get_features(vcpu);
404 break;
406 case PAL_PTCE_INFO :
407 result = pal_ptce_info(vcpu);
408 break;
410 case PAL_REGISTER_INFO :
411 result = pal_register_info(vcpu);
412 break;
414 case PAL_RSE_INFO :
415 result = pal_rse_info(vcpu);
416 break;
418 case PAL_TEST_PROC :
419 result = pal_test_info(vcpu);
420 break;
422 case PAL_VM_SUMMARY :
423 result = pal_vm_summary(vcpu);
424 break;
426 case PAL_VM_INFO :
427 result = pal_vm_info(vcpu);
428 break;
430 case PAL_VM_PAGE_SIZE :
431 result = pal_vm_page_size(vcpu);
432 break;
434 default:
435 panic("pal_emul(): guest call unsupported pal" );
436 }
437 set_pal_result (vcpu, result);
438 }