ia64/xen-unstable

view xen/include/asm-x86/io_apic.h @ 18467:65dc37be0443

x86: Remove MSI boot parameter -- now always on.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Sep 10 10:47:46 2008 +0100 (2008-09-10)
parents 62b904dcf88c
children 5274aa966231
line source
1 #ifndef __ASM_IO_APIC_H
2 #define __ASM_IO_APIC_H
4 #include <xen/config.h>
5 #include <asm/types.h>
6 #include <asm/mpspec.h>
7 #include <asm/apicdef.h>
8 #include <asm/fixmap.h>
9 #include <xen/iommu.h>
11 /*
12 * Intel IO-APIC support for SMP and UP systems.
13 *
14 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
15 */
17 #ifdef CONFIG_X86_IO_APIC
19 #define IO_APIC_BASE(idx) \
20 ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \
21 + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))
23 /*
24 * The structure of the IO-APIC:
25 */
26 union IO_APIC_reg_00 {
27 u32 raw;
28 struct {
29 u32 __reserved_2 : 14,
30 LTS : 1,
31 delivery_type : 1,
32 __reserved_1 : 8,
33 ID : 8;
34 } __attribute__ ((packed)) bits;
35 };
37 union IO_APIC_reg_01 {
38 u32 raw;
39 struct {
40 u32 version : 8,
41 __reserved_2 : 7,
42 PRQ : 1,
43 entries : 8,
44 __reserved_1 : 8;
45 } __attribute__ ((packed)) bits;
46 };
48 union IO_APIC_reg_02 {
49 u32 raw;
50 struct {
51 u32 __reserved_2 : 24,
52 arbitration : 4,
53 __reserved_1 : 4;
54 } __attribute__ ((packed)) bits;
55 };
57 union IO_APIC_reg_03 {
58 u32 raw;
59 struct {
60 u32 boot_DT : 1,
61 __reserved_1 : 31;
62 } __attribute__ ((packed)) bits;
63 };
65 /*
66 * # of IO-APICs and # of IRQ routing registers
67 */
68 extern int nr_ioapics;
69 extern int nr_ioapic_registers[MAX_IO_APICS];
71 enum ioapic_irq_destination_types {
72 dest_Fixed = 0,
73 dest_LowestPrio = 1,
74 dest_SMI = 2,
75 dest__reserved_1 = 3,
76 dest_NMI = 4,
77 dest_INIT = 5,
78 dest__reserved_2 = 6,
79 dest_ExtINT = 7
80 };
82 struct IO_APIC_route_entry {
83 __u32 vector : 8,
84 delivery_mode : 3, /* 000: FIXED
85 * 001: lowest prio
86 * 111: ExtINT
87 */
88 dest_mode : 1, /* 0: physical, 1: logical */
89 delivery_status : 1,
90 polarity : 1,
91 irr : 1,
92 trigger : 1, /* 0: edge, 1: level */
93 mask : 1, /* 0: enabled, 1: disabled */
94 __reserved_2 : 15;
96 union { struct { __u32
97 __reserved_1 : 24,
98 physical_dest : 4,
99 __reserved_2 : 4;
100 } physical;
102 struct { __u32
103 __reserved_1 : 24,
104 logical_dest : 8;
105 } logical;
106 } dest;
108 } __attribute__ ((packed));
110 /*
111 * MP-BIOS irq configuration table structures:
112 */
114 /* I/O APIC entries */
115 extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
117 /* # of MP IRQ source entries */
118 extern int mp_irq_entries;
120 /* MP IRQ source entries */
121 extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
123 /* non-0 if default (table-less) MP configuration */
124 extern int mpc_default_type;
126 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
127 {
128 if (iommu_enabled)
129 return io_apic_read_remap_rte(apic, reg);
130 *IO_APIC_BASE(apic) = reg;
131 return *(IO_APIC_BASE(apic)+4);
132 }
134 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
135 {
136 if (iommu_enabled)
137 return iommu_update_ire_from_apic(apic, reg, value);
138 *IO_APIC_BASE(apic) = reg;
139 *(IO_APIC_BASE(apic)+4) = value;
140 }
142 /*
143 * Re-write a value: to be used for read-modify-write
144 * cycles where the read already set up the index register.
145 *
146 * Older SiS APIC requires we rewrite the index regiser
147 */
148 #ifdef __i386__
149 extern int sis_apic_bug;
150 #else
151 #define sis_apic_bug 0
152 #endif
153 static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
154 {
155 if (iommu_enabled)
156 return iommu_update_ire_from_apic(apic, reg, value);
157 if (sis_apic_bug)
158 *IO_APIC_BASE(apic) = reg;
159 *(IO_APIC_BASE(apic)+4) = value;
160 }
162 /* 1 if "noapic" boot option passed */
163 extern int skip_ioapic_setup;
165 /*
166 * If we use the IO-APIC for IRQ routing, disable automatic
167 * assignment of PCI IRQ's.
168 */
169 #define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
171 #ifdef CONFIG_ACPI_BOOT
172 extern int io_apic_get_unique_id (int ioapic, int apic_id);
173 extern int io_apic_get_version (int ioapic);
174 extern int io_apic_get_redir_entries (int ioapic);
175 extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low);
176 extern int timer_uses_ioapic_pin_0;
177 #endif /*CONFIG_ACPI_BOOT*/
179 extern int (*ioapic_renumber_irq)(int ioapic, int irq);
180 extern int ioapic_suspend(void);
181 extern int ioapic_resume(void);
183 #else /* !CONFIG_X86_IO_APIC */
184 #define io_apic_assign_pci_irqs 0
185 static inline int ioapic_suspend(void) {return 0};
186 static inline int ioapic_resume(void) {return 0};
187 #endif
189 extern int assign_irq_vector(int irq);
191 #endif