ia64/xen-unstable

view xen/arch/ia64/xen/xen.lds.S @ 9768:63af1c14fa18

[IA64] missed chunk of Kevin's hypercall cleanup patch

Missed this chunk of Kevin's patch when merging with dom0vp changes

Signed-off-by Kevin Tian <kevin.tian@intel.com>
author awilliam@xenbuild.aw
date Tue Apr 25 22:30:07 2006 -0600 (2006-04-25)
parents 3ca4ca7a9cc2
children 9da2cd61822e
line source
1 #include <linux/config.h>
3 #include <asm/cache.h>
4 #include <asm/ptrace.h>
5 #include <asm/system.h>
6 #include <asm/pgtable.h>
8 #define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
9 #include <asm-generic/vmlinux.lds.h>
11 OUTPUT_FORMAT("elf64-ia64-little")
12 OUTPUT_ARCH(ia64)
13 ENTRY(phys_start)
14 jiffies = jiffies_64;
15 PHDRS {
16 code PT_LOAD;
17 percpu PT_LOAD;
18 data PT_LOAD;
19 }
20 SECTIONS
21 {
22 /* Sections to be discarded */
23 /DISCARD/ : {
24 *(.exit.text)
25 *(.exit.data)
26 *(.exitcall.exit)
27 *(.IA_64.unwind.exit.text)
28 *(.IA_64.unwind_info.exit.text)
29 }
31 v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
32 phys_start = _start - LOAD_OFFSET;
34 code : { } :code
35 . = KERNEL_START;
37 _text = .;
38 _stext = .;
40 .text : AT(ADDR(.text) - LOAD_OFFSET)
41 {
42 *(.text.ivt)
43 *(.text)
44 SCHED_TEXT
45 LOCK_TEXT
46 *(.gnu.linkonce.t*)
47 }
48 .text2 : AT(ADDR(.text2) - LOAD_OFFSET)
49 { *(.text2) }
50 #ifdef CONFIG_SMP
51 .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
52 { *(.text.lock) }
53 #endif
54 _etext = .;
56 /* Read-only data */
58 /* Exception table */
59 . = ALIGN(16);
60 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
61 {
62 __start___ex_table = .;
63 *(__ex_table)
64 __stop___ex_table = .;
65 }
67 .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
68 {
69 __start___vtop_patchlist = .;
70 *(.data.patch.vtop)
71 __end___vtop_patchlist = .;
72 }
74 .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
75 {
76 __start___mckinley_e9_bundles = .;
77 *(.data.patch.mckinley_e9)
78 __end___mckinley_e9_bundles = .;
79 }
81 /* Global data */
82 _data = .;
84 #if defined(CONFIG_IA64_GENERIC)
85 /* Machine Vector */
86 . = ALIGN(16);
87 .machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
88 {
89 machvec_start = .;
90 *(.machvec)
91 machvec_end = .;
92 }
93 #endif
95 /* Unwind info & table: */
96 . = ALIGN(8);
97 .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
98 { *(.IA_64.unwind_info*) }
99 .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
100 {
101 __start_unwind = .;
102 *(.IA_64.unwind*)
103 __end_unwind = .;
104 }
106 RODATA
108 .opd : AT(ADDR(.opd) - LOAD_OFFSET)
109 { *(.opd) }
111 /* Initialization code and data: */
113 . = ALIGN(PAGE_SIZE);
114 __init_begin = .;
115 .init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
116 {
117 _sinittext = .;
118 *(.init.text)
119 _einittext = .;
120 }
122 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
123 { *(.init.data) }
125 .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
126 {
127 __initramfs_start = .;
128 *(.init.ramfs)
129 __initramfs_end = .;
130 }
132 . = ALIGN(16);
133 .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
134 {
135 __setup_start = .;
136 *(.init.setup)
137 __setup_end = .;
138 }
139 .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
140 {
141 __initcall_start = .;
142 *(.initcall1.init)
143 *(.initcall2.init)
144 *(.initcall3.init)
145 *(.initcall4.init)
146 *(.initcall5.init)
147 *(.initcall6.init)
148 *(.initcall7.init)
149 __initcall_end = .;
150 }
151 __con_initcall_start = .;
152 .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
153 { *(.con_initcall.init) }
154 __con_initcall_end = .;
155 __security_initcall_start = .;
156 .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
157 { *(.security_initcall.init) }
158 __security_initcall_end = .;
159 . = ALIGN(PAGE_SIZE);
160 __init_end = .;
162 /* The initial task and kernel stack */
163 .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
164 { *(.data.init_task) }
166 .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
167 { *(__special_page_section)
168 __start_gate_section = .;
169 *(.data.gate)
170 __stop_gate_section = .;
171 }
172 . = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose kernel data */
174 .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
175 { *(.data.cacheline_aligned) }
177 /* Per-cpu data: */
178 percpu : { } :percpu
179 . = ALIGN(PERCPU_PAGE_SIZE);
180 __phys_per_cpu_start = .;
181 .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
182 {
183 __per_cpu_start = .;
184 *(.data.percpu)
185 __per_cpu_end = .;
186 }
187 . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits into percpu page size */
189 data : { } :data
190 .data : AT(ADDR(.data) - LOAD_OFFSET)
191 { *(.data) *(.data1) *(.gnu.linkonce.d*) CONSTRUCTORS }
193 . = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
194 .got : AT(ADDR(.got) - LOAD_OFFSET)
195 { *(.got.plt) *(.got) }
196 __gp = ADDR(.got) + 0x200000;
197 /* We want the small data sections together, so single-instruction offsets
198 can access them all, and initialized data all before uninitialized, so
199 we can shorten the on-disk segment size. */
200 .sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
201 { *(.sdata) *(.sdata1) *(.srdata) }
202 _edata = .;
203 _bss = .;
204 .sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
205 { *(.sbss) *(.scommon) }
206 .bss : AT(ADDR(.bss) - LOAD_OFFSET)
207 { *(.bss) *(COMMON) }
209 _end = .;
211 code : { } :code
212 /* Stabs debugging sections. */
213 .stab 0 : { *(.stab) }
214 .stabstr 0 : { *(.stabstr) }
215 .stab.excl 0 : { *(.stab.excl) }
216 .stab.exclstr 0 : { *(.stab.exclstr) }
217 .stab.index 0 : { *(.stab.index) }
218 .stab.indexstr 0 : { *(.stab.indexstr) }
219 /* DWARF debug sections.
220 Symbols in the DWARF debugging sections are relative to the beginning
221 of the section so we begin them at 0. */
222 /* DWARF 1 */
223 .debug 0 : { *(.debug) }
224 .line 0 : { *(.line) }
225 /* GNU DWARF 1 extensions */
226 .debug_srcinfo 0 : { *(.debug_srcinfo) }
227 .debug_sfnames 0 : { *(.debug_sfnames) }
228 /* DWARF 1.1 and DWARF 2 */
229 .debug_aranges 0 : { *(.debug_aranges) }
230 .debug_pubnames 0 : { *(.debug_pubnames) }
231 /* DWARF 2 */
232 .debug_info 0 : { *(.debug_info) }
233 .debug_abbrev 0 : { *(.debug_abbrev) }
234 .debug_line 0 : { *(.debug_line) }
235 .debug_frame 0 : { *(.debug_frame) }
236 .debug_str 0 : { *(.debug_str) }
237 .debug_loc 0 : { *(.debug_loc) }
238 .debug_macinfo 0 : { *(.debug_macinfo) }
239 /* SGI/MIPS DWARF 2 extensions */
240 .debug_weaknames 0 : { *(.debug_weaknames) }
241 .debug_funcnames 0 : { *(.debug_funcnames) }
242 .debug_typenames 0 : { *(.debug_typenames) }
243 .debug_varnames 0 : { *(.debug_varnames) }
244 /* These must appear regardless of . */
245 /* Discard them for now since Intel SoftSDV cannot handle them.
246 .comment 0 : { *(.comment) }
247 .note 0 : { *(.note) }
248 */
249 /DISCARD/ : { *(.comment) }
250 /DISCARD/ : { *(.note) }
251 }