ia64/xen-unstable

view xen/arch/x86/hvm/platform.c @ 10211:5be9e927533d

[HVM] Fix a bug in the emulation of the xchg instruction.

This bug has prevented us from booting fully virtualized SMP guests
that write to the APIC using the xchg instruction (when
CONFIG_X86_GOOD_APIC is not set). On 32 bit platforms, sles 10 kernels
are built without CONFIG_x86_GOOD_APIC not set and hence we have had
problems booting fully virtualized SMP sles 10 guests.

Signed-off-by: K. Y. Srinivasan <ksrinivasan@novell.com>
author kaf24@firebug.cl.cam.ac.uk
date Tue May 30 12:30:47 2006 +0100 (2006-05-30)
parents 7fdc4a8b782b
children 7d37df6c3247
line source
1 /*
2 * platform.c: handling x86 platform related MMIO instructions
3 *
4 * Copyright (c) 2004, Intel Corporation.
5 * Copyright (c) 2005, International Business Machines Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
18 * Place - Suite 330, Boston, MA 02111-1307 USA.
19 */
21 #include <xen/config.h>
22 #include <xen/types.h>
23 #include <xen/mm.h>
24 #include <asm/shadow.h>
25 #include <xen/domain_page.h>
26 #include <asm/page.h>
27 #include <xen/event.h>
28 #include <xen/trace.h>
29 #include <xen/sched.h>
30 #include <asm/regs.h>
31 #include <asm/hvm/hvm.h>
32 #include <asm/hvm/support.h>
33 #include <public/hvm/ioreq.h>
35 #include <xen/lib.h>
36 #include <xen/sched.h>
37 #include <asm/current.h>
38 #if CONFIG_PAGING_LEVELS >= 3
39 #include <asm/shadow_64.h>
40 #endif
42 #define DECODE_success 1
43 #define DECODE_failure 0
45 #if defined (__x86_64__)
46 static inline long __get_reg_value(unsigned long reg, int size)
47 {
48 switch(size) {
49 case BYTE_64:
50 return (char)(reg & 0xFF);
51 case WORD:
52 return (short)(reg & 0xFFFF);
53 case LONG:
54 return (int)(reg & 0xFFFFFFFF);
55 case QUAD:
56 return (long)(reg);
57 default:
58 printf("Error: (__get_reg_value) Invalid reg size\n");
59 domain_crash_synchronous();
60 }
61 }
63 long get_reg_value(int size, int index, int seg, struct cpu_user_regs *regs)
64 {
65 if (size == BYTE) {
66 switch (index) {
67 case 0: /* %al */
68 return (char)(regs->rax & 0xFF);
69 case 1: /* %cl */
70 return (char)(regs->rcx & 0xFF);
71 case 2: /* %dl */
72 return (char)(regs->rdx & 0xFF);
73 case 3: /* %bl */
74 return (char)(regs->rbx & 0xFF);
75 case 4: /* %ah */
76 return (char)((regs->rax & 0xFF00) >> 8);
77 case 5: /* %ch */
78 return (char)((regs->rcx & 0xFF00) >> 8);
79 case 6: /* %dh */
80 return (char)((regs->rdx & 0xFF00) >> 8);
81 case 7: /* %bh */
82 return (char)((regs->rbx & 0xFF00) >> 8);
83 default:
84 printf("Error: (get_reg_value) Invalid index value\n");
85 domain_crash_synchronous();
86 }
87 /* NOTREACHED */
88 }
90 switch (index) {
91 case 0: return __get_reg_value(regs->rax, size);
92 case 1: return __get_reg_value(regs->rcx, size);
93 case 2: return __get_reg_value(regs->rdx, size);
94 case 3: return __get_reg_value(regs->rbx, size);
95 case 4: return __get_reg_value(regs->rsp, size);
96 case 5: return __get_reg_value(regs->rbp, size);
97 case 6: return __get_reg_value(regs->rsi, size);
98 case 7: return __get_reg_value(regs->rdi, size);
99 case 8: return __get_reg_value(regs->r8, size);
100 case 9: return __get_reg_value(regs->r9, size);
101 case 10: return __get_reg_value(regs->r10, size);
102 case 11: return __get_reg_value(regs->r11, size);
103 case 12: return __get_reg_value(regs->r12, size);
104 case 13: return __get_reg_value(regs->r13, size);
105 case 14: return __get_reg_value(regs->r14, size);
106 case 15: return __get_reg_value(regs->r15, size);
107 default:
108 printf("Error: (get_reg_value) Invalid index value\n");
109 domain_crash_synchronous();
110 }
111 }
112 #elif defined (__i386__)
113 static inline long __get_reg_value(unsigned long reg, int size)
114 {
115 switch(size) {
116 case WORD:
117 return (short)(reg & 0xFFFF);
118 case LONG:
119 return (int)(reg & 0xFFFFFFFF);
120 default:
121 printf("Error: (__get_reg_value) Invalid reg size\n");
122 domain_crash_synchronous();
123 }
124 }
126 long get_reg_value(int size, int index, int seg, struct cpu_user_regs *regs)
127 {
128 if (size == BYTE) {
129 switch (index) {
130 case 0: /* %al */
131 return (char)(regs->eax & 0xFF);
132 case 1: /* %cl */
133 return (char)(regs->ecx & 0xFF);
134 case 2: /* %dl */
135 return (char)(regs->edx & 0xFF);
136 case 3: /* %bl */
137 return (char)(regs->ebx & 0xFF);
138 case 4: /* %ah */
139 return (char)((regs->eax & 0xFF00) >> 8);
140 case 5: /* %ch */
141 return (char)((regs->ecx & 0xFF00) >> 8);
142 case 6: /* %dh */
143 return (char)((regs->edx & 0xFF00) >> 8);
144 case 7: /* %bh */
145 return (char)((regs->ebx & 0xFF00) >> 8);
146 default:
147 printf("Error: (get_reg_value) Invalid index value\n");
148 domain_crash_synchronous();
149 }
150 }
152 switch (index) {
153 case 0: return __get_reg_value(regs->eax, size);
154 case 1: return __get_reg_value(regs->ecx, size);
155 case 2: return __get_reg_value(regs->edx, size);
156 case 3: return __get_reg_value(regs->ebx, size);
157 case 4: return __get_reg_value(regs->esp, size);
158 case 5: return __get_reg_value(regs->ebp, size);
159 case 6: return __get_reg_value(regs->esi, size);
160 case 7: return __get_reg_value(regs->edi, size);
161 default:
162 printf("Error: (get_reg_value) Invalid index value\n");
163 domain_crash_synchronous();
164 }
165 }
166 #endif
168 static inline unsigned char *check_prefix(unsigned char *inst,
169 struct instruction *thread_inst, unsigned char *rex_p)
170 {
171 while (1) {
172 switch (*inst) {
173 /* rex prefix for em64t instructions */
174 case 0x40 ... 0x4e:
175 *rex_p = *inst;
176 break;
177 case 0xf3: /* REPZ */
178 thread_inst->flags = REPZ;
179 break;
180 case 0xf2: /* REPNZ */
181 thread_inst->flags = REPNZ;
182 break;
183 case 0xf0: /* LOCK */
184 break;
185 case 0x2e: /* CS */
186 case 0x36: /* SS */
187 case 0x3e: /* DS */
188 case 0x26: /* ES */
189 case 0x64: /* FS */
190 case 0x65: /* GS */
191 thread_inst->seg_sel = *inst;
192 break;
193 case 0x66: /* 32bit->16bit */
194 thread_inst->op_size = WORD;
195 break;
196 case 0x67:
197 break;
198 default:
199 return inst;
200 }
201 inst++;
202 }
203 }
205 static inline unsigned long get_immediate(int op16,const unsigned char *inst, int op_size)
206 {
207 int mod, reg, rm;
208 unsigned long val = 0;
209 int i;
211 mod = (*inst >> 6) & 3;
212 reg = (*inst >> 3) & 7;
213 rm = *inst & 7;
215 inst++; //skip ModR/M byte
216 if (mod != 3 && rm == 4) {
217 inst++; //skip SIB byte
218 }
220 switch(mod) {
221 case 0:
222 if (rm == 5 || rm == 4) {
223 if (op16)
224 inst = inst + 2; //disp16, skip 2 bytes
225 else
226 inst = inst + 4; //disp32, skip 4 bytes
227 }
228 break;
229 case 1:
230 inst++; //disp8, skip 1 byte
231 break;
232 case 2:
233 if (op16)
234 inst = inst + 2; //disp16, skip 2 bytes
235 else
236 inst = inst + 4; //disp32, skip 4 bytes
237 break;
238 }
240 if (op_size == QUAD)
241 op_size = LONG;
243 for (i = 0; i < op_size; i++) {
244 val |= (*inst++ & 0xff) << (8 * i);
245 }
247 return val;
248 }
250 static inline int get_index(const unsigned char *inst, unsigned char rex)
251 {
252 int mod, reg, rm;
253 int rex_r, rex_b;
255 mod = (*inst >> 6) & 3;
256 reg = (*inst >> 3) & 7;
257 rm = *inst & 7;
259 rex_r = (rex >> 2) & 1;
260 rex_b = rex & 1;
262 //Only one operand in the instruction is register
263 if (mod == 3) {
264 return (rm + (rex_b << 3));
265 } else {
266 return (reg + (rex_r << 3));
267 }
268 return 0;
269 }
271 static void init_instruction(struct instruction *mmio_inst)
272 {
273 mmio_inst->instr = 0;
274 mmio_inst->op_size = 0;
275 mmio_inst->immediate = 0;
276 mmio_inst->seg_sel = 0;
278 mmio_inst->operand[0] = 0;
279 mmio_inst->operand[1] = 0;
281 mmio_inst->flags = 0;
282 }
284 #define GET_OP_SIZE_FOR_BYTE(op_size) \
285 do { \
286 if (rex) \
287 op_size = BYTE_64; \
288 else \
289 op_size = BYTE; \
290 } while(0)
292 #define GET_OP_SIZE_FOR_NONEBYTE(op_size) \
293 do { \
294 if (rex & 0x8) \
295 op_size = QUAD; \
296 else if (op_size != WORD) \
297 op_size = LONG; \
298 } while(0)
301 /*
302 * Decode mem,accumulator operands (as in <opcode> m8/m16/m32, al,ax,eax)
303 */
304 static int mem_acc(unsigned char size, struct instruction *instr)
305 {
306 instr->operand[0] = mk_operand(size, 0, 0, MEMORY);
307 instr->operand[1] = mk_operand(size, 0, 0, REGISTER);
308 return DECODE_success;
309 }
311 /*
312 * Decode accumulator,mem operands (as in <opcode> al,ax,eax, m8/m16/m32)
313 */
314 static int acc_mem(unsigned char size, struct instruction *instr)
315 {
316 instr->operand[0] = mk_operand(size, 0, 0, REGISTER);
317 instr->operand[1] = mk_operand(size, 0, 0, MEMORY);
318 return DECODE_success;
319 }
321 /*
322 * Decode mem,reg operands (as in <opcode> r32/16, m32/16)
323 */
324 static int mem_reg(unsigned char size, unsigned char *opcode,
325 struct instruction *instr, unsigned char rex)
326 {
327 int index = get_index(opcode + 1, rex);
329 instr->operand[0] = mk_operand(size, 0, 0, MEMORY);
330 instr->operand[1] = mk_operand(size, index, 0, REGISTER);
331 return DECODE_success;
332 }
334 /*
335 * Decode reg,mem operands (as in <opcode> m32/16, r32/16)
336 */
337 static int reg_mem(unsigned char size, unsigned char *opcode,
338 struct instruction *instr, unsigned char rex)
339 {
340 int index = get_index(opcode + 1, rex);
342 instr->operand[0] = mk_operand(size, index, 0, REGISTER);
343 instr->operand[1] = mk_operand(size, 0, 0, MEMORY);
344 return DECODE_success;
345 }
347 static int hvm_decode(int realmode, unsigned char *opcode, struct instruction *instr)
348 {
349 unsigned char size_reg = 0;
350 unsigned char rex = 0;
351 int index;
353 init_instruction(instr);
355 opcode = check_prefix(opcode, instr, &rex);
357 if (realmode) { /* meaning is reversed */
358 if (instr->op_size == WORD)
359 instr->op_size = LONG;
360 else if (instr->op_size == LONG)
361 instr->op_size = WORD;
362 else if (instr->op_size == 0)
363 instr->op_size = WORD;
364 }
366 switch (*opcode) {
367 case 0x0B: /* or m32/16, r32/16 */
368 instr->instr = INSTR_OR;
369 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
370 return mem_reg(instr->op_size, opcode, instr, rex);
372 case 0x20: /* and r8, m8 */
373 instr->instr = INSTR_AND;
374 instr->op_size = BYTE;
375 GET_OP_SIZE_FOR_BYTE(size_reg);
376 return reg_mem(size_reg, opcode, instr, rex);
378 case 0x21: /* and r32/16, m32/16 */
379 instr->instr = INSTR_AND;
380 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
381 return reg_mem(instr->op_size, opcode, instr, rex);
383 case 0x23: /* and m32/16, r32/16 */
384 instr->instr = INSTR_AND;
385 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
386 return mem_reg(instr->op_size, opcode, instr, rex);
388 case 0x30: /* xor r8, m8 */
389 instr->instr = INSTR_XOR;
390 instr->op_size = BYTE;
391 GET_OP_SIZE_FOR_BYTE(size_reg);
392 return reg_mem(size_reg, opcode, instr, rex);
394 case 0x31: /* xor r32/16, m32/16 */
395 instr->instr = INSTR_XOR;
396 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
397 return reg_mem(instr->op_size, opcode, instr, rex);
399 case 0x39: /* cmp r32/16, m32/16 */
400 instr->instr = INSTR_CMP;
401 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
402 return reg_mem(instr->op_size, opcode, instr, rex);
404 case 0x3B: /* cmp m32/16, r32/16 */
405 instr->instr = INSTR_CMP;
406 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
407 return mem_reg(instr->op_size, opcode, instr, rex);
409 case 0x80:
410 case 0x81:
411 {
412 unsigned char ins_subtype = (opcode[1] >> 3) & 7;
414 if (opcode[0] == 0x80) {
415 GET_OP_SIZE_FOR_BYTE(size_reg);
416 instr->op_size = BYTE;
417 } else {
418 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
419 size_reg = instr->op_size;
420 }
422 instr->operand[0] = mk_operand(size_reg, 0, 0, IMMEDIATE);
423 instr->immediate = get_immediate(realmode, opcode+1, instr->op_size);
424 instr->operand[1] = mk_operand(size_reg, 0, 0, MEMORY);
426 switch (ins_subtype) {
427 case 7: /* cmp $imm, m32/16 */
428 instr->instr = INSTR_CMP;
429 return DECODE_success;
431 case 1: /* or $imm, m32/16 */
432 instr->instr = INSTR_OR;
433 return DECODE_success;
435 default:
436 printf("%x, This opcode isn't handled yet!\n", *opcode);
437 return DECODE_failure;
438 }
439 }
441 case 0x84: /* test m8, r8 */
442 instr->instr = INSTR_TEST;
443 instr->op_size = BYTE;
444 GET_OP_SIZE_FOR_BYTE(size_reg);
445 return mem_reg(size_reg, opcode, instr, rex);
447 case 0x87: /* xchg {r/m16|r/m32}, {m/r16|m/r32} */
448 instr->instr = INSTR_XCHG;
449 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
450 if (((*(opcode+1)) & 0xc7) == 5)
451 return reg_mem(instr->op_size, opcode, instr, rex);
452 else
453 return mem_reg(instr->op_size, opcode, instr, rex);
455 case 0x88: /* mov r8, m8 */
456 instr->instr = INSTR_MOV;
457 instr->op_size = BYTE;
458 GET_OP_SIZE_FOR_BYTE(size_reg);
459 return reg_mem(size_reg, opcode, instr, rex);
461 case 0x89: /* mov r32/16, m32/16 */
462 instr->instr = INSTR_MOV;
463 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
464 return reg_mem(instr->op_size, opcode, instr, rex);
466 case 0x8A: /* mov m8, r8 */
467 instr->instr = INSTR_MOV;
468 instr->op_size = BYTE;
469 GET_OP_SIZE_FOR_BYTE(size_reg);
470 return mem_reg(size_reg, opcode, instr, rex);
472 case 0x8B: /* mov m32/16, r32/16 */
473 instr->instr = INSTR_MOV;
474 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
475 return mem_reg(instr->op_size, opcode, instr, rex);
477 case 0xA0: /* mov <addr>, al */
478 instr->instr = INSTR_MOV;
479 instr->op_size = BYTE;
480 GET_OP_SIZE_FOR_BYTE(size_reg);
481 return mem_acc(size_reg, instr);
483 case 0xA1: /* mov <addr>, ax/eax */
484 instr->instr = INSTR_MOV;
485 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
486 return mem_acc(instr->op_size, instr);
488 case 0xA2: /* mov al, <addr> */
489 instr->instr = INSTR_MOV;
490 instr->op_size = BYTE;
491 GET_OP_SIZE_FOR_BYTE(size_reg);
492 return acc_mem(size_reg, instr);
494 case 0xA3: /* mov ax/eax, <addr> */
495 instr->instr = INSTR_MOV;
496 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
497 return acc_mem(instr->op_size, instr);
499 case 0xA4: /* movsb */
500 instr->instr = INSTR_MOVS;
501 instr->op_size = BYTE;
502 return DECODE_success;
504 case 0xA5: /* movsw/movsl */
505 instr->instr = INSTR_MOVS;
506 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
507 return DECODE_success;
509 case 0xAA: /* stosb */
510 instr->instr = INSTR_STOS;
511 instr->op_size = BYTE;
512 return DECODE_success;
514 case 0xAB: /* stosw/stosl */
515 instr->instr = INSTR_STOS;
516 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
517 return DECODE_success;
519 case 0xC6:
520 if (((opcode[1] >> 3) & 7) == 0) { /* mov $imm8, m8 */
521 instr->instr = INSTR_MOV;
522 instr->op_size = BYTE;
524 instr->operand[0] = mk_operand(instr->op_size, 0, 0, IMMEDIATE);
525 instr->immediate = get_immediate(realmode, opcode+1, instr->op_size);
526 instr->operand[1] = mk_operand(instr->op_size, 0, 0, MEMORY);
528 return DECODE_success;
529 } else
530 return DECODE_failure;
532 case 0xC7:
533 if (((opcode[1] >> 3) & 7) == 0) { /* mov $imm16/32, m16/32 */
534 instr->instr = INSTR_MOV;
535 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
537 instr->operand[0] = mk_operand(instr->op_size, 0, 0, IMMEDIATE);
538 instr->immediate = get_immediate(realmode, opcode+1, instr->op_size);
539 instr->operand[1] = mk_operand(instr->op_size, 0, 0, MEMORY);
541 return DECODE_success;
542 } else
543 return DECODE_failure;
545 case 0xF6:
546 case 0xF7:
547 if (((opcode[1] >> 3) & 7) == 0) { /* test $imm8/16/32, m8/16/32 */
548 instr->instr = INSTR_TEST;
550 if (opcode[0] == 0xF6) {
551 GET_OP_SIZE_FOR_BYTE(size_reg);
552 instr->op_size = BYTE;
553 } else {
554 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
555 size_reg = instr->op_size;
556 }
558 instr->operand[0] = mk_operand(size_reg, 0, 0, IMMEDIATE);
559 instr->immediate = get_immediate(realmode, opcode+1, instr->op_size);
560 instr->operand[1] = mk_operand(size_reg, 0, 0, MEMORY);
562 return DECODE_success;
563 } else
564 return DECODE_failure;
566 case 0x0F:
567 break;
569 default:
570 printf("%x, This opcode isn't handled yet!\n", *opcode);
571 return DECODE_failure;
572 }
574 switch (*++opcode) {
575 case 0xB6: /* movzx m8, r16/r32/r64 */
576 instr->instr = INSTR_MOVZX;
577 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
578 index = get_index(opcode + 1, rex);
579 instr->operand[0] = mk_operand(BYTE, 0, 0, MEMORY);
580 instr->operand[1] = mk_operand(instr->op_size, index, 0, REGISTER);
581 return DECODE_success;
583 case 0xB7: /* movzx m16/m32, r32/r64 */
584 instr->instr = INSTR_MOVZX;
585 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
586 index = get_index(opcode + 1, rex);
587 if (rex & 0x8)
588 instr->operand[0] = mk_operand(LONG, 0, 0, MEMORY);
589 else
590 instr->operand[0] = mk_operand(WORD, 0, 0, MEMORY);
591 instr->operand[1] = mk_operand(instr->op_size, index, 0, REGISTER);
592 return DECODE_success;
594 case 0xBE: /* movsx m8, r16/r32/r64 */
595 instr->instr = INSTR_MOVSX;
596 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
597 index = get_index(opcode + 1, rex);
598 instr->operand[0] = mk_operand(BYTE, 0, 0, MEMORY);
599 instr->operand[1] = mk_operand(instr->op_size, index, 0, REGISTER);
600 return DECODE_success;
602 case 0xBF: /* movsx m16, r32/r64 */
603 instr->instr = INSTR_MOVSX;
604 GET_OP_SIZE_FOR_NONEBYTE(instr->op_size);
605 index = get_index(opcode + 1, rex);
606 instr->operand[0] = mk_operand(WORD, 0, 0, MEMORY);
607 instr->operand[1] = mk_operand(instr->op_size, index, 0, REGISTER);
608 return DECODE_success;
610 case 0xA3: /* bt r32, m32 */
611 instr->instr = INSTR_BT;
612 index = get_index(opcode + 1, rex);
613 instr->op_size = LONG;
614 instr->operand[0] = mk_operand(instr->op_size, index, 0, REGISTER);
615 instr->operand[1] = mk_operand(instr->op_size, 0, 0, MEMORY);
616 return DECODE_success;
618 default:
619 printf("0f %x, This opcode isn't handled yet\n", *opcode);
620 return DECODE_failure;
621 }
622 }
624 int inst_copy_from_guest(unsigned char *buf, unsigned long guest_eip, int inst_len)
625 {
626 if (inst_len > MAX_INST_LEN || inst_len <= 0)
627 return 0;
628 if (!hvm_copy(buf, guest_eip, inst_len, HVM_COPY_IN))
629 return 0;
630 return inst_len;
631 }
633 void send_pio_req(struct cpu_user_regs *regs, unsigned long port,
634 unsigned long count, int size, long value, int dir, int pvalid)
635 {
636 struct vcpu *v = current;
637 vcpu_iodata_t *vio;
638 ioreq_t *p;
640 vio = get_vio(v->domain, v->vcpu_id);
641 if (vio == NULL) {
642 printk("bad shared page: %lx\n", (unsigned long) vio);
643 domain_crash_synchronous();
644 }
646 if (test_bit(ARCH_HVM_IO_WAIT, &v->arch.hvm_vcpu.ioflags)) {
647 printf("HVM I/O has not yet completed\n");
648 domain_crash_synchronous();
649 }
650 set_bit(ARCH_HVM_IO_WAIT, &v->arch.hvm_vcpu.ioflags);
652 p = &vio->vp_ioreq;
653 p->dir = dir;
654 p->pdata_valid = pvalid;
656 p->type = IOREQ_TYPE_PIO;
657 p->size = size;
658 p->addr = port;
659 p->count = count;
660 p->df = regs->eflags & EF_DF ? 1 : 0;
662 p->io_count++;
664 if (pvalid) {
665 if (hvm_paging_enabled(current))
666 p->u.pdata = (void *) gva_to_gpa(value);
667 else
668 p->u.pdata = (void *) value; /* guest VA == guest PA */
669 } else
670 p->u.data = value;
672 if (hvm_portio_intercept(p)) {
673 p->state = STATE_IORESP_READY;
674 hvm_io_assist(v);
675 return;
676 }
678 p->state = STATE_IOREQ_READY;
680 evtchn_send(iopacket_port(v));
681 hvm_wait_io();
682 }
684 void send_mmio_req(
685 unsigned char type, unsigned long gpa,
686 unsigned long count, int size, long value, int dir, int pvalid)
687 {
688 struct vcpu *v = current;
689 vcpu_iodata_t *vio;
690 ioreq_t *p;
691 struct cpu_user_regs *regs;
693 regs = current->arch.hvm_vcpu.mmio_op.inst_decoder_regs;
695 vio = get_vio(v->domain, v->vcpu_id);
696 if (vio == NULL) {
697 printf("bad shared page\n");
698 domain_crash_synchronous();
699 }
701 p = &vio->vp_ioreq;
703 if (test_bit(ARCH_HVM_IO_WAIT, &v->arch.hvm_vcpu.ioflags)) {
704 printf("HVM I/O has not yet completed\n");
705 domain_crash_synchronous();
706 }
708 set_bit(ARCH_HVM_IO_WAIT, &v->arch.hvm_vcpu.ioflags);
709 p->dir = dir;
710 p->pdata_valid = pvalid;
712 p->type = type;
713 p->size = size;
714 p->addr = gpa;
715 p->count = count;
716 p->df = regs->eflags & EF_DF ? 1 : 0;
718 p->io_count++;
720 if (pvalid) {
721 if (hvm_paging_enabled(v))
722 p->u.pdata = (void *) gva_to_gpa(value);
723 else
724 p->u.pdata = (void *) value; /* guest VA == guest PA */
725 } else
726 p->u.data = value;
728 if (hvm_mmio_intercept(p)){
729 p->state = STATE_IORESP_READY;
730 hvm_io_assist(v);
731 return;
732 }
734 p->state = STATE_IOREQ_READY;
736 evtchn_send(iopacket_port(v));
737 hvm_wait_io();
738 }
740 static void mmio_operands(int type, unsigned long gpa, struct instruction *inst,
741 struct mmio_op *mmio_opp, struct cpu_user_regs *regs)
742 {
743 unsigned long value = 0;
744 int index, size_reg;
746 size_reg = operand_size(inst->operand[0]);
748 mmio_opp->flags = inst->flags;
749 mmio_opp->instr = inst->instr;
750 mmio_opp->operand[0] = inst->operand[0]; /* source */
751 mmio_opp->operand[1] = inst->operand[1]; /* destination */
752 mmio_opp->immediate = inst->immediate;
754 if (inst->operand[0] & REGISTER) { /* dest is memory */
755 index = operand_index(inst->operand[0]);
756 value = get_reg_value(size_reg, index, 0, regs);
757 send_mmio_req(type, gpa, 1, inst->op_size, value, IOREQ_WRITE, 0);
758 } else if (inst->operand[0] & IMMEDIATE) { /* dest is memory */
759 value = inst->immediate;
760 send_mmio_req(type, gpa, 1, inst->op_size, value, IOREQ_WRITE, 0);
761 } else if (inst->operand[0] & MEMORY) { /* dest is register */
762 /* send the request and wait for the value */
763 if ( (inst->instr == INSTR_MOVZX) || (inst->instr == INSTR_MOVSX) )
764 send_mmio_req(type, gpa, 1, size_reg, 0, IOREQ_READ, 0);
765 else
766 send_mmio_req(type, gpa, 1, inst->op_size, 0, IOREQ_READ, 0);
767 } else {
768 printf("mmio_operands: invalid operand\n");
769 domain_crash_synchronous();
770 }
771 }
773 #define GET_REPEAT_COUNT() \
774 (mmio_inst.flags & REPZ ? (realmode ? regs->ecx & 0xFFFF : regs->ecx) : 1)
776 void handle_mmio(unsigned long va, unsigned long gpa)
777 {
778 unsigned long inst_addr;
779 struct mmio_op *mmio_opp;
780 struct cpu_user_regs *regs;
781 struct instruction mmio_inst;
782 unsigned char inst[MAX_INST_LEN];
783 int i, realmode, ret, inst_len;
784 struct vcpu *v = current;
786 mmio_opp = &v->arch.hvm_vcpu.mmio_op;
788 regs = mmio_opp->inst_decoder_regs;
789 hvm_store_cpu_guest_regs(v, regs, NULL);
791 if ((inst_len = hvm_instruction_length(v)) <= 0) {
792 printf("handle_mmio: failed to get instruction length\n");
793 domain_crash_synchronous();
794 }
796 realmode = hvm_realmode(v);
797 if (realmode)
798 inst_addr = (regs->cs << 4) + regs->eip;
799 else
800 inst_addr = regs->eip;
802 memset(inst, 0, MAX_INST_LEN);
803 ret = inst_copy_from_guest(inst, inst_addr, inst_len);
804 if (ret != inst_len) {
805 printf("handle_mmio: failed to copy instruction\n");
806 domain_crash_synchronous();
807 }
809 init_instruction(&mmio_inst);
811 if (hvm_decode(realmode, inst, &mmio_inst) == DECODE_failure) {
812 printf("handle_mmio: failed to decode instruction\n");
813 printf("mmio opcode: va 0x%lx, gpa 0x%lx, len %d:",
814 va, gpa, inst_len);
815 for (i = 0; i < inst_len; i++)
816 printf(" %02x", inst[i] & 0xFF);
817 printf("\n");
818 domain_crash_synchronous();
819 }
821 regs->eip += inst_len; /* advance %eip */
823 switch (mmio_inst.instr) {
824 case INSTR_MOV:
825 mmio_operands(IOREQ_TYPE_COPY, gpa, &mmio_inst, mmio_opp, regs);
826 break;
828 case INSTR_MOVS:
829 {
830 unsigned long count = GET_REPEAT_COUNT();
831 unsigned long size = mmio_inst.op_size;
832 int sign = regs->eflags & EF_DF ? -1 : 1;
833 unsigned long addr = 0;
834 int dir;
836 /* determine non-MMIO address */
837 if (realmode) {
838 if (((regs->es << 4) + (regs->edi & 0xFFFF)) == va) {
839 dir = IOREQ_WRITE;
840 addr = (regs->ds << 4) + (regs->esi & 0xFFFF);
841 } else {
842 dir = IOREQ_READ;
843 addr = (regs->es << 4) + (regs->edi & 0xFFFF);
844 }
845 } else {
846 if (va == regs->edi) {
847 dir = IOREQ_WRITE;
848 addr = regs->esi;
849 } else {
850 dir = IOREQ_READ;
851 addr = regs->edi;
852 }
853 }
855 mmio_opp->flags = mmio_inst.flags;
856 mmio_opp->instr = mmio_inst.instr;
858 /*
859 * In case of a movs spanning multiple pages, we break the accesses
860 * up into multiple pages (the device model works with non-continguous
861 * physical guest pages). To copy just one page, we adjust %ecx and
862 * do not advance %eip so that the next "rep movs" copies the next page.
863 * Unaligned accesses, for example movsl starting at PGSZ-2, are
864 * turned into a single copy where we handle the overlapping memory
865 * copy ourself. After this copy succeeds, "rep movs" is executed
866 * again.
867 */
868 if ((addr & PAGE_MASK) != ((addr + sign * (size - 1)) & PAGE_MASK)) {
869 unsigned long value = 0;
871 mmio_opp->flags |= OVERLAP;
873 regs->eip -= inst_len; /* do not advance %eip */
875 if (dir == IOREQ_WRITE)
876 hvm_copy(&value, addr, size, HVM_COPY_IN);
877 send_mmio_req(IOREQ_TYPE_COPY, gpa, 1, size, value, dir, 0);
878 } else {
879 if ((addr & PAGE_MASK) != ((addr + sign * (count * size - 1)) & PAGE_MASK)) {
880 regs->eip -= inst_len; /* do not advance %eip */
882 if (sign > 0)
883 count = (PAGE_SIZE - (addr & ~PAGE_MASK)) / size;
884 else
885 count = (addr & ~PAGE_MASK) / size;
886 }
888 send_mmio_req(IOREQ_TYPE_COPY, gpa, count, size, addr, dir, 1);
889 }
890 break;
891 }
893 case INSTR_MOVZX:
894 case INSTR_MOVSX:
895 mmio_operands(IOREQ_TYPE_COPY, gpa, &mmio_inst, mmio_opp, regs);
896 break;
898 case INSTR_STOS:
899 /*
900 * Since the destination is always in (contiguous) mmio space we don't
901 * need to break it up into pages.
902 */
903 mmio_opp->flags = mmio_inst.flags;
904 mmio_opp->instr = mmio_inst.instr;
905 send_mmio_req(IOREQ_TYPE_COPY, gpa,
906 GET_REPEAT_COUNT(), mmio_inst.op_size, regs->eax, IOREQ_WRITE, 0);
907 break;
909 case INSTR_OR:
910 mmio_operands(IOREQ_TYPE_OR, gpa, &mmio_inst, mmio_opp, regs);
911 break;
913 case INSTR_AND:
914 mmio_operands(IOREQ_TYPE_AND, gpa, &mmio_inst, mmio_opp, regs);
915 break;
917 case INSTR_XOR:
918 mmio_operands(IOREQ_TYPE_XOR, gpa, &mmio_inst, mmio_opp, regs);
919 break;
921 case INSTR_CMP: /* Pass through */
922 case INSTR_TEST:
923 mmio_opp->flags = mmio_inst.flags;
924 mmio_opp->instr = mmio_inst.instr;
925 mmio_opp->operand[0] = mmio_inst.operand[0]; /* source */
926 mmio_opp->operand[1] = mmio_inst.operand[1]; /* destination */
927 mmio_opp->immediate = mmio_inst.immediate;
929 /* send the request and wait for the value */
930 send_mmio_req(IOREQ_TYPE_COPY, gpa, 1,
931 mmio_inst.op_size, 0, IOREQ_READ, 0);
932 break;
934 case INSTR_BT:
935 {
936 unsigned long value = 0;
937 int index, size;
939 mmio_opp->instr = mmio_inst.instr;
940 mmio_opp->operand[0] = mmio_inst.operand[0]; /* bit offset */
941 mmio_opp->operand[1] = mmio_inst.operand[1]; /* bit base */
943 index = operand_index(mmio_inst.operand[0]);
944 size = operand_size(mmio_inst.operand[0]);
945 value = get_reg_value(size, index, 0, regs);
947 send_mmio_req(IOREQ_TYPE_COPY, gpa + (value >> 5), 1,
948 mmio_inst.op_size, 0, IOREQ_READ, 0);
949 break;
950 }
952 case INSTR_XCHG:
953 mmio_opp->flags = mmio_inst.flags;
954 mmio_opp->instr = mmio_inst.instr;
955 mmio_opp->operand[0] = mmio_inst.operand[0]; /* source */
956 mmio_opp->operand[1] = mmio_inst.operand[1]; /* destination */
957 if (mmio_inst.operand[0] & REGISTER) {
958 long value;
959 unsigned long operand = mmio_inst.operand[0];
960 value = get_reg_value(operand_size(operand),
961 operand_index(operand), 0,
962 mmio_opp->inst_decoder_regs);
963 /* send the request and wait for the value */
964 send_mmio_req(IOREQ_TYPE_XCHG, gpa, 1,
965 mmio_inst.op_size, value, IOREQ_WRITE, 0);
966 } else {
967 /* the destination is a register */
968 long value;
969 unsigned long operand = mmio_inst.operand[1];
970 value = get_reg_value(operand_size(operand),
971 operand_index(operand), 0,
972 mmio_opp->inst_decoder_regs);
973 /* send the request and wait for the value */
974 send_mmio_req(IOREQ_TYPE_XCHG, gpa, 1,
975 mmio_inst.op_size, value, IOREQ_WRITE, 0);
976 }
977 break;
979 default:
980 printf("Unhandled MMIO instruction\n");
981 domain_crash_synchronous();
982 }
983 }
985 /*
986 * Local variables:
987 * mode: C
988 * c-set-style: "BSD"
989 * c-basic-offset: 4
990 * tab-width: 4
991 * indent-tabs-mode: nil
992 * End:
993 */