ia64/xen-unstable

view xen/include/asm-x86/hvm/vcpu.h @ 19848:5839491bbf20

[IA64] replace MAX_VCPUS with d->max_vcpus where necessary.

don't use MAX_VCPUS, and use vcpu::max_vcpus.
The changeset of 2f9e1348aa98 introduced max_vcpus to allow more vcpus
per guest. This patch is ia64 counter part.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Mon Jun 29 11:26:05 2009 +0900 (2009-06-29)
parents 2656ab6fa828
children
line source
1 /*
2 * vcpu.h: HVM per vcpu definitions
3 *
4 * Copyright (c) 2005, International Business Machines Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
17 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 */
20 #ifndef __ASM_X86_HVM_VCPU_H__
21 #define __ASM_X86_HVM_VCPU_H__
23 #include <asm/hvm/io.h>
24 #include <asm/hvm/vlapic.h>
25 #include <asm/hvm/vmx/vmcs.h>
26 #include <asm/hvm/svm/vmcb.h>
27 #include <asm/mtrr.h>
29 enum hvm_io_state {
30 HVMIO_none = 0,
31 HVMIO_dispatched,
32 HVMIO_awaiting_completion,
33 HVMIO_handle_mmio_awaiting_completion,
34 HVMIO_completed
35 };
37 struct hvm_vcpu {
38 /* Guest control-register and EFER values, just as the guest sees them. */
39 unsigned long guest_cr[5];
40 unsigned long guest_efer;
42 /*
43 * Processor-visible control-register values, while guest executes.
44 * CR0, CR4: Used as a cache of VMCS contents by VMX only.
45 * CR1, CR2: Never used (guest_cr[2] is always processor-visible CR2).
46 * CR3: Always used and kept up to date by paging subsystem.
47 */
48 unsigned long hw_cr[5];
50 struct vlapic vlapic;
51 s64 cache_tsc_offset;
52 u64 guest_time;
54 /* Lock and list for virtual platform timers. */
55 spinlock_t tm_lock;
56 struct list_head tm_list;
58 int xen_port;
60 bool_t flag_dr_dirty;
61 bool_t debug_state_latch;
62 bool_t single_step;
64 union {
65 struct arch_vmx_struct vmx;
66 struct arch_svm_struct svm;
67 } u;
69 struct tasklet assert_evtchn_irq_tasklet;
71 struct mtrr_state mtrr;
72 u64 pat_cr;
74 /* In mode delay_for_missed_ticks, VCPUs have differing guest times. */
75 int64_t stime_offset;
77 /* Which cache mode is this VCPU in (CR0:CD/NW)? */
78 u8 cache_mode;
80 /* I/O request in flight to device model. */
81 enum hvm_io_state io_state;
82 unsigned long io_data;
84 /*
85 * HVM emulation:
86 * Virtual address @mmio_gva maps to MMIO physical frame @mmio_gpfn.
87 * The latter is known to be an MMIO frame (not RAM).
88 * This translation is only valid if @mmio_gva is non-zero.
89 */
90 unsigned long mmio_gva;
91 unsigned long mmio_gpfn;
92 /* Callback into x86_emulate when emulating FPU/MMX/XMM instructions. */
93 void (*fpu_exception_callback)(void *, struct cpu_user_regs *);
94 void *fpu_exception_callback_arg;
95 /* We may read up to m128 as a number of device-model transactions. */
96 paddr_t mmio_large_read_pa;
97 uint8_t mmio_large_read[16];
98 unsigned int mmio_large_read_bytes;
99 /* We may write up to m128 as a number of device-model transactions. */
100 paddr_t mmio_large_write_pa;
101 unsigned int mmio_large_write_bytes;
102 };
104 #endif /* __ASM_X86_HVM_VCPU_H__ */