ia64/xen-unstable

view xen/include/asm-x86/hvm/irq.h @ 19848:5839491bbf20

[IA64] replace MAX_VCPUS with d->max_vcpus where necessary.

don't use MAX_VCPUS, and use vcpu::max_vcpus.
The changeset of 2f9e1348aa98 introduced max_vcpus to allow more vcpus
per guest. This patch is ia64 counter part.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Mon Jun 29 11:26:05 2009 +0900 (2009-06-29)
parents 2188ed106885
children
line source
1 /******************************************************************************
2 * irq.h
3 *
4 * Interrupt distribution and delivery logic.
5 *
6 * Copyright (c) 2006, K A Fraser, XenSource Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
19 * Place - Suite 330, Boston, MA 02111-1307 USA.
20 */
22 #ifndef __ASM_X86_HVM_IRQ_H__
23 #define __ASM_X86_HVM_IRQ_H__
25 #include <xen/hvm/irq.h>
26 #include <asm/hvm/hvm.h>
27 #include <asm/hvm/vpic.h>
28 #include <asm/hvm/vioapic.h>
30 struct hvm_irq {
31 /*
32 * Virtual interrupt wires for a single PCI bus.
33 * Indexed by: device*4 + INTx#.
34 */
35 struct hvm_hw_pci_irqs pci_intx;
37 /*
38 * Virtual interrupt wires for ISA devices.
39 * Indexed by ISA IRQ (assumes no ISA-device IRQ sharing).
40 */
41 struct hvm_hw_isa_irqs isa_irq;
43 /*
44 * PCI-ISA interrupt router.
45 * Each PCI <device:INTx#> is 'wire-ORed' into one of four links using
46 * the traditional 'barber's pole' mapping ((device + INTx#) & 3).
47 * The router provides a programmable mapping from each link to a GSI.
48 */
49 struct hvm_hw_pci_link pci_link;
51 /* Virtual interrupt and via-link for paravirtual platform driver. */
52 uint32_t callback_via_asserted;
53 union {
54 enum {
55 HVMIRQ_callback_none,
56 HVMIRQ_callback_gsi,
57 HVMIRQ_callback_pci_intx
58 } callback_via_type;
59 };
60 union {
61 uint32_t gsi;
62 struct { uint8_t dev, intx; } pci;
63 } callback_via;
65 /* Number of INTx wires asserting each PCI-ISA link. */
66 u8 pci_link_assert_count[4];
68 /*
69 * Number of wires asserting each GSI.
70 *
71 * GSIs 0-15 are the ISA IRQs. ISA devices map directly into this space
72 * except ISA IRQ 0, which is connected to GSI 2.
73 * PCI links map into this space via the PCI-ISA bridge.
74 *
75 * GSIs 16+ are used only be PCI devices. The mapping from PCI device to
76 * GSI is as follows: ((device*4 + device/8 + INTx#) & 31) + 16
77 */
78 u8 gsi_assert_count[VIOAPIC_NUM_PINS];
80 /*
81 * GSIs map onto PIC/IO-APIC in the usual way:
82 * 0-7: Master 8259 PIC, IO-APIC pins 0-7
83 * 8-15: Slave 8259 PIC, IO-APIC pins 8-15
84 * 16+ : IO-APIC pins 16+
85 */
87 /* Last VCPU that was delivered a LowestPrio interrupt. */
88 u8 round_robin_prev_vcpu;
90 struct hvm_irq_dpci *dpci;
91 };
93 #define hvm_pci_intx_gsi(dev, intx) \
94 (((((dev)<<2) + ((dev)>>3) + (intx)) & 31) + 16)
95 #define hvm_pci_intx_link(dev, intx) \
96 (((dev) + (intx)) & 3)
98 #define hvm_isa_irq_to_gsi(isa_irq) ((isa_irq) ? : 2)
100 /* Check/Acknowledge next pending interrupt. */
101 struct hvm_intack hvm_vcpu_has_pending_irq(struct vcpu *v);
102 struct hvm_intack hvm_vcpu_ack_pending_irq(struct vcpu *v,
103 struct hvm_intack intack);
105 /*
106 * Currently IA64 Xen doesn't support MSI. So for x86, we define this macro
107 * to control the conditional compilation of some MSI-related functions.
108 * This macro will be removed once IA64 has MSI support.
109 */
110 #define SUPPORT_MSI_REMAPPING 1
112 #endif /* __ASM_X86_HVM_IRQ_H__ */