ia64/xen-unstable

view xen/include/asm-x86/apic.h @ 19848:5839491bbf20

[IA64] replace MAX_VCPUS with d->max_vcpus where necessary.

don't use MAX_VCPUS, and use vcpu::max_vcpus.
The changeset of 2f9e1348aa98 introduced max_vcpus to allow more vcpus
per guest. This patch is ia64 counter part.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Mon Jun 29 11:26:05 2009 +0900 (2009-06-29)
parents 9fd00ff95068
children
line source
1 #ifndef __ASM_APIC_H
2 #define __ASM_APIC_H
4 #include <xen/config.h>
5 #include <asm/apicdef.h>
6 #include <asm/fixmap.h>
7 #include <asm/system.h>
9 #define Dprintk(x...)
11 /*
12 * Debugging macros
13 */
14 #define APIC_QUIET 0
15 #define APIC_VERBOSE 1
16 #define APIC_DEBUG 2
18 extern int apic_verbosity;
19 extern int x2apic_enabled;
21 extern void enable_x2apic(void);
23 static __inline int x2apic_is_available(void)
24 {
25 unsigned int op = 1, eax, ecx;
27 asm ( "cpuid"
28 : "=a" (eax), "=c" (ecx)
29 : "0" (op)
30 : "bx", "dx" );
32 return (ecx & (1U << 21));
33 }
35 /*
36 * Define the default level of output to be very little
37 * This can be turned up by using apic=verbose for more
38 * information and apic=debug for _lots_ of information.
39 * apic_verbosity is defined in apic.c
40 */
41 #define apic_printk(v, s, a...) do { \
42 if ((v) <= apic_verbosity) \
43 printk(s, ##a); \
44 } while (0)
47 #ifdef CONFIG_X86_LOCAL_APIC
49 /*
50 * Basic functions accessing APICs.
51 */
53 static __inline void apic_mem_write(unsigned long reg, u32 v)
54 {
55 *((volatile u32 *)(APIC_BASE+reg)) = v;
56 }
58 static __inline void apic_mem_write_atomic(unsigned long reg, u32 v)
59 {
60 (void)xchg((volatile u32 *)(APIC_BASE+reg), v);
61 }
63 static __inline u32 apic_mem_read(unsigned long reg)
64 {
65 return *((volatile u32 *)(APIC_BASE+reg));
66 }
68 /* NOTE: in x2APIC mode, we should use apic_icr_write()/apic_icr_read() to
69 * access the 64-bit ICR register.
70 */
72 static __inline void apic_wrmsr(unsigned long reg, u32 low, u32 high)
73 {
74 __asm__ __volatile__("wrmsr"
75 : /* no outputs */
76 : "c" (APIC_MSR_BASE + (reg >> 4)), "a" (low), "d" (high));
77 }
79 static __inline void apic_rdmsr(unsigned long reg, u32 *low, u32 *high)
80 {
81 __asm__ __volatile__("rdmsr"
82 : "=a" (*low), "=d" (*high)
83 : "c" (APIC_MSR_BASE + (reg >> 4)));
84 }
86 static __inline void apic_write(unsigned long reg, u32 v)
87 {
89 if ( x2apic_enabled )
90 apic_wrmsr(reg, v, 0);
91 else
92 apic_mem_write(reg, v);
93 }
95 static __inline void apic_write_atomic(unsigned long reg, u32 v)
96 {
97 if ( x2apic_enabled )
98 apic_wrmsr(reg, v, 0);
99 else
100 apic_mem_write_atomic(reg, v);
101 }
103 static __inline u32 apic_read(unsigned long reg)
104 {
105 u32 lo, hi;
107 if ( x2apic_enabled )
108 apic_rdmsr(reg, &lo, &hi);
109 else
110 lo = apic_mem_read(reg);
111 return lo;
112 }
114 static __inline u64 apic_icr_read(void)
115 {
116 u32 lo, hi;
118 if ( x2apic_enabled )
119 apic_rdmsr(APIC_ICR, &lo, &hi);
120 else
121 {
122 lo = apic_mem_read(APIC_ICR);
123 hi = apic_mem_read(APIC_ICR2);
124 }
126 return ((u64)lo) | (((u64)hi) << 32);
127 }
129 static __inline void apic_icr_write(u32 low, u32 dest)
130 {
131 if ( x2apic_enabled )
132 apic_wrmsr(APIC_ICR, low, dest);
133 else
134 {
135 apic_mem_write(APIC_ICR2, dest << 24);
136 apic_mem_write(APIC_ICR, low);
137 }
138 }
140 static __inline u32 get_apic_id(void) /* Get the physical APIC id */
141 {
142 u32 id = apic_read(APIC_ID);
143 return x2apic_enabled ? id : GET_xAPIC_ID(id);
144 }
146 static __inline u32 get_logical_apic_id(void)
147 {
148 u32 logical_id = apic_read(APIC_LDR);
149 return x2apic_enabled ? logical_id : GET_xAPIC_LOGICAL_ID(logical_id);
150 }
152 void apic_wait_icr_idle(void);
154 int get_physical_broadcast(void);
156 #ifdef CONFIG_X86_GOOD_APIC
157 # define FORCE_READ_AROUND_WRITE 0
158 # define apic_read_around(x)
159 # define apic_write_around(x,y) apic_write((x),(y))
160 #else
161 # define FORCE_READ_AROUND_WRITE 1
162 # define apic_read_around(x) apic_read(x)
163 # define apic_write_around(x,y) apic_write_atomic((x),(y))
164 #endif
166 static inline void ack_APIC_irq(void)
167 {
168 /*
169 * ack_APIC_irq() actually gets compiled as a single instruction:
170 * - a single rmw on Pentium/82489DX
171 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
172 * ... yummie.
173 */
175 /* Docs say use 0 for future compatibility */
176 apic_write_around(APIC_EOI, 0);
177 }
179 extern void (*wait_timer_tick)(void);
181 extern int get_maxlvt(void);
182 extern void clear_local_APIC(void);
183 extern void connect_bsp_APIC (void);
184 extern void disconnect_bsp_APIC (int virt_wire_setup);
185 extern void disable_local_APIC (void);
186 extern void lapic_shutdown (void);
187 extern int verify_local_APIC (void);
188 extern void cache_APIC_registers (void);
189 extern void sync_Arb_IDs (void);
190 extern void init_bsp_APIC (void);
191 extern void setup_local_APIC (void);
192 extern void init_apic_mappings (void);
193 extern void smp_local_timer_interrupt (struct cpu_user_regs *regs);
194 extern void setup_boot_APIC_clock (void);
195 extern void setup_secondary_APIC_clock (void);
196 extern void setup_apic_nmi_watchdog (void);
197 extern int reserve_lapic_nmi(void);
198 extern void release_lapic_nmi(void);
199 extern void disable_timer_nmi_watchdog(void);
200 extern void enable_timer_nmi_watchdog(void);
201 extern void nmi_watchdog_tick (struct cpu_user_regs *regs);
202 extern int APIC_init_uniprocessor (void);
203 extern void disable_APIC_timer(void);
204 extern void enable_APIC_timer(void);
205 extern int lapic_suspend(void);
206 extern int lapic_resume(void);
208 extern int check_nmi_watchdog (void);
209 extern void enable_NMI_through_LVT0 (void * dummy);
211 extern void watchdog_disable(void);
212 extern void watchdog_enable(void);
214 extern unsigned int nmi_watchdog;
215 #define NMI_NONE 0
216 #define NMI_IO_APIC 1
217 #define NMI_LOCAL_APIC 2
218 #define NMI_INVALID 3
220 #else /* !CONFIG_X86_LOCAL_APIC */
221 static inline void lapic_shutdown(void) { }
222 static inline int lapic_suspend(void) {return 0;}
223 static inline int lapic_resume(void) {return 0;}
225 #endif /* !CONFIG_X86_LOCAL_APIC */
227 #endif /* __ASM_APIC_H */