ia64/xen-unstable

view xen/include/asm-ia64/xenkregs.h @ 15661:522a1932111f

[IA64] Declarations for PKR

Added new declarations for protection keys and define
XEN_IA64_NPKRS representing number of PKRs for PV domains.

Signed-off-by: Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
author Alex Williamson <alex.williamson@hp.com>
date Mon Jul 30 16:07:11 2007 -0600 (2007-07-30)
parents f71dcdd9cddb
children 57f519c41534
line source
1 #ifndef _ASM_IA64_XENKREGS_H
2 #define _ASM_IA64_XENKREGS_H
4 /*
5 * Translation registers:
6 */
7 #define IA64_TR_SHARED_INFO 3 /* dtr3: page shared with domain */
8 #define IA64_TR_VHPT 4 /* dtr4: vhpt */
9 #define IA64_TR_MAPPED_REGS 5 /* dtr5: vcpu mapped regs */
10 #define IA64_DTR_GUEST_KERNEL 6
11 #define IA64_ITR_GUEST_KERNEL 2
12 /* Processor status register bits: */
13 #define IA64_PSR_VM_BIT 46
14 #define IA64_PSR_VM (__IA64_UL(1) << IA64_PSR_VM_BIT)
16 #define IA64_DEFAULT_DCR_BITS (IA64_DCR_PP | IA64_DCR_LC | IA64_DCR_DM | \
17 IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | \
18 IA64_DCR_DR | IA64_DCR_DA | IA64_DCR_DD)
20 /* Interruption Function State */
21 #define IA64_IFS_V_BIT 63
22 #define IA64_IFS_V (__IA64_UL(1) << IA64_IFS_V_BIT)
24 /* Interruption Status Register. */
25 #define IA64_ISR_NI_BIT 39 /* Nested interrupt. */
27 /* Page Table Address */
28 #define IA64_PTA_VE_BIT 0
29 #define IA64_PTA_SIZE_BIT 2
30 #define IA64_PTA_VF_BIT 8
31 #define IA64_PTA_BASE_BIT 15
33 #define IA64_PTA_VE (__IA64_UL(1) << IA64_PTA_VE_BIT)
34 #define IA64_PTA_SIZE (__IA64_UL(0x3f) << IA64_PTA_SIZE_BIT)
35 #define IA64_PTA_VF (__IA64_UL(1) << IA64_PTA_VF_BIT)
36 #define IA64_PTA_BASE (__IA64_UL(0) - ((__IA64_UL(1) << IA64_PTA_BASE_BIT)))
38 /* Some cr.itir declarations. */
39 #define IA64_ITIR_PS 2
40 #define IA64_ITIR_PS_LEN 6
41 #define IA64_ITIR_PS_MASK (((__IA64_UL(1) << IA64_ITIR_PS_LEN) - 1) \
42 << IA64_ITIR_PS)
43 #define IA64_ITIR_KEY 8
44 #define IA64_ITIR_KEY_LEN 24
45 #define IA64_ITIR_KEY_MASK (((__IA64_UL(1) << IA64_ITIR_KEY_LEN) - 1) \
46 << IA64_ITIR_KEY)
47 #define IA64_ITIR_PS_KEY(_ps, _key) (((_ps) << IA64_ITIR_PS) | \
48 (((_key) << IA64_ITIR_KEY)))
50 /* Define Protection Key Register (PKR) */
51 #define IA64_PKR_V 0
52 #define IA64_PKR_WD 1
53 #define IA64_PKR_RD 2
54 #define IA64_PKR_XD 3
55 #define IA64_PKR_MBZ0 4
56 #define IA64_PKR_KEY 8
57 #define IA64_PKR_KEY_LEN 24
58 #define IA64_PKR_MBZ1 32
60 #define IA64_PKR_VALID (1 << IA64_PKR_V)
61 #define IA64_PKR_KEY_MASK (((__IA64_UL(1) << IA64_PKR_KEY_LEN) - 1) \
62 << IA64_PKR_KEY)
64 #define XEN_IA64_NPKRS 15 /* Number of pkr's in PV */
66 #endif /* _ASM_IA64_XENKREGS_H */