ia64/xen-unstable

view xen/include/asm-x86/hvm/irq.h @ 16603:4553bc1087d9

hvm: Reduce vpt.c dependencies on external timer details.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Dec 12 15:41:20 2007 +0000 (2007-12-12)
parents 81e63d66a64d
children 9865d5e82802
line source
1 /******************************************************************************
2 * irq.h
3 *
4 * Interrupt distribution and delivery logic.
5 *
6 * Copyright (c) 2006, K A Fraser, XenSource Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
19 * Place - Suite 330, Boston, MA 02111-1307 USA.
20 */
22 #ifndef __ASM_X86_HVM_IRQ_H__
23 #define __ASM_X86_HVM_IRQ_H__
25 #include <xen/types.h>
26 #include <xen/spinlock.h>
27 #include <asm/irq.h>
28 #include <asm/hvm/hvm.h>
29 #include <asm/hvm/vpic.h>
30 #include <asm/hvm/vioapic.h>
31 #include <public/hvm/save.h>
33 struct dev_intx_gsi_link {
34 struct list_head list;
35 uint8_t device;
36 uint8_t intx;
37 uint8_t gsi;
38 uint8_t link;
39 };
41 struct hvm_mirq_dpci_mapping {
42 uint8_t valid;
43 int pending;
44 struct list_head digl_list;
45 struct domain *dom;
46 };
48 struct hvm_girq_dpci_mapping {
49 uint8_t valid;
50 uint8_t device;
51 uint8_t intx;
52 uint8_t machine_gsi;
53 };
55 #define NR_ISAIRQS 16
56 #define NR_LINK 4
57 struct hvm_irq_dpci {
58 spinlock_t dirq_lock;
59 /* Machine IRQ to guest device/intx mapping. */
60 struct hvm_mirq_dpci_mapping mirq[NR_IRQS];
61 /* Guest IRQ to guest device/intx mapping. */
62 struct hvm_girq_dpci_mapping girq[NR_IRQS];
63 DECLARE_BITMAP(dirq_mask, NR_IRQS);
64 /* Record of mapped ISA IRQs */
65 DECLARE_BITMAP(isairq_map, NR_ISAIRQS);
66 /* Record of mapped Links */
67 DECLARE_BITMAP(link_map, NR_LINK);
68 struct timer hvm_timer[NR_IRQS];
69 };
71 struct hvm_irq {
72 /*
73 * Virtual interrupt wires for a single PCI bus.
74 * Indexed by: device*4 + INTx#.
75 */
76 struct hvm_hw_pci_irqs pci_intx;
78 /*
79 * Virtual interrupt wires for ISA devices.
80 * Indexed by ISA IRQ (assumes no ISA-device IRQ sharing).
81 */
82 struct hvm_hw_isa_irqs isa_irq;
84 /*
85 * PCI-ISA interrupt router.
86 * Each PCI <device:INTx#> is 'wire-ORed' into one of four links using
87 * the traditional 'barber's pole' mapping ((device + INTx#) & 3).
88 * The router provides a programmable mapping from each link to a GSI.
89 */
90 struct hvm_hw_pci_link pci_link;
92 /* Virtual interrupt and via-link for paravirtual platform driver. */
93 uint32_t callback_via_asserted;
94 union {
95 enum {
96 HVMIRQ_callback_none,
97 HVMIRQ_callback_gsi,
98 HVMIRQ_callback_pci_intx
99 } callback_via_type;
100 };
101 union {
102 uint32_t gsi;
103 struct { uint8_t dev, intx; } pci;
104 } callback_via;
106 /* Number of INTx wires asserting each PCI-ISA link. */
107 u8 pci_link_assert_count[4];
109 /*
110 * Number of wires asserting each GSI.
111 *
112 * GSIs 0-15 are the ISA IRQs. ISA devices map directly into this space
113 * except ISA IRQ 0, which is connected to GSI 2.
114 * PCI links map into this space via the PCI-ISA bridge.
115 *
116 * GSIs 16+ are used only be PCI devices. The mapping from PCI device to
117 * GSI is as follows: ((device*4 + device/8 + INTx#) & 31) + 16
118 */
119 u8 gsi_assert_count[VIOAPIC_NUM_PINS];
121 /*
122 * GSIs map onto PIC/IO-APIC in the usual way:
123 * 0-7: Master 8259 PIC, IO-APIC pins 0-7
124 * 8-15: Slave 8259 PIC, IO-APIC pins 8-15
125 * 16+ : IO-APIC pins 16+
126 */
128 /* Last VCPU that was delivered a LowestPrio interrupt. */
129 u8 round_robin_prev_vcpu;
131 struct hvm_irq_dpci *dpci;
132 };
134 #define hvm_pci_intx_gsi(dev, intx) \
135 (((((dev)<<2) + ((dev)>>3) + (intx)) & 31) + 16)
136 #define hvm_pci_intx_link(dev, intx) \
137 (((dev) + (intx)) & 3)
139 #define hvm_isa_irq_to_gsi(isa_irq) ((isa_irq) ? : 2)
141 /* Modify state of a PCI INTx wire. */
142 void hvm_pci_intx_assert(
143 struct domain *d, unsigned int device, unsigned int intx);
144 void hvm_pci_intx_deassert(
145 struct domain *d, unsigned int device, unsigned int intx);
147 /* Modify state of an ISA device's IRQ wire. */
148 void hvm_isa_irq_assert(
149 struct domain *d, unsigned int isa_irq);
150 void hvm_isa_irq_deassert(
151 struct domain *d, unsigned int isa_irq);
153 void hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq);
155 void hvm_set_callback_irq_level(void);
156 void hvm_set_callback_via(struct domain *d, uint64_t via);
158 /* Check/Acknowledge next pending interrupt. */
159 struct hvm_intack hvm_vcpu_has_pending_irq(struct vcpu *v);
160 struct hvm_intack hvm_vcpu_ack_pending_irq(struct vcpu *v,
161 struct hvm_intack intack);
163 #endif /* __ASM_X86_HVM_IRQ_H__ */