ia64/xen-unstable

view xen/arch/x86/x86_64/pci.c @ 19697:42fe00c6f8b4

Enable pci mmcfg and ATS for x86_64

This patch enables PCI MMCONFIG in xen and turns on hooks for ATS.

Signed-off-by: Allen Kay <allen.m.kay@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Tue Jun 02 11:49:34 2009 +0100 (2009-06-02)
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1 /******************************************************************************
2 * pci.c
3 *
4 * Architecture-dependent PCI access functions.
5 */
7 #include <xen/spinlock.h>
8 #include <xen/pci.h>
9 #include <asm/io.h>
11 #define PCI_CONF_ADDRESS(bus, dev, func, reg) \
12 (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3))
14 int pci_mmcfg_read(unsigned int seg, unsigned int bus,
15 unsigned int devfn, int reg, int len, u32 *value);
16 int pci_mmcfg_write(unsigned int seg, unsigned int bus,
17 unsigned int devfn, int reg, int len, u32 value);
18 uint32_t pci_conf_read(uint32_t cf8, uint8_t offset, uint8_t bytes);
19 void pci_conf_write(uint32_t cf8, uint8_t offset, uint8_t bytes, uint32_t data);
21 uint8_t pci_conf_read8(
22 unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg)
23 {
24 u32 value;
26 if ( reg > 255 )
27 {
28 pci_mmcfg_read(0, bus, PCI_DEVFN(dev, func), reg, 1, &value);
29 return value;
30 }
31 else
32 {
33 BUG_ON((bus > 255) || (dev > 31) || (func > 7));
34 return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 3, 1);
35 }
36 }
38 uint16_t pci_conf_read16(
39 unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg)
40 {
41 u32 value;
43 if ( reg > 255 )
44 {
45 pci_mmcfg_read(0, bus, PCI_DEVFN(dev, func), reg, 2, &value);
46 return value;
47 }
48 else
49 {
50 BUG_ON((bus > 255) || (dev > 31) || (func > 7));
51 return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 2, 2);
52 }
53 }
55 uint32_t pci_conf_read32(
56 unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg)
57 {
58 u32 value;
60 if ( reg > 255 )
61 {
62 pci_mmcfg_read(0, bus, PCI_DEVFN(dev, func), reg, 4, &value);
63 return value;
64 }
65 else
66 {
67 BUG_ON((bus > 255) || (dev > 31) || (func > 7));
68 return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), 0, 4);
69 }
70 }
72 void pci_conf_write8(
73 unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg,
74 uint8_t data)
75 {
76 if ( reg > 255 )
77 pci_mmcfg_write(0, bus, PCI_DEVFN(dev, func), reg, 1, data);
78 else
79 {
80 BUG_ON((bus > 255) || (dev > 31) || (func > 7));
81 pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 3, 1, data);
82 }
83 }
85 void pci_conf_write16(
86 unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg,
87 uint16_t data)
88 {
89 if ( reg > 255 )
90 pci_mmcfg_write(0, bus, PCI_DEVFN(dev, func), reg, 2, data);
91 else
92 {
93 BUG_ON((bus > 255) || (dev > 31) || (func > 7));
94 pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 2, 2, data);
95 }
96 }
98 void pci_conf_write32(
99 unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg,
100 uint32_t data)
101 {
102 if ( reg > 255 )
103 pci_mmcfg_write(0, bus, PCI_DEVFN(dev, func), reg, 4, data);
104 else
105 {
106 BUG_ON((bus > 255) || (dev > 31) || (func > 7));
107 pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), 0, 4, data);
108 }
109 }