ia64/xen-unstable

view xen/arch/x86/x86_64/mmconfig.h @ 19697:42fe00c6f8b4

Enable pci mmcfg and ATS for x86_64

This patch enables PCI MMCONFIG in xen and turns on hooks for ATS.

Signed-off-by: Allen Kay <allen.m.kay@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Tue Jun 02 11:49:34 2009 +0100 (2009-06-02)
parents
children
line source
1 /*
2 * Copyright (c) 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Author: Allen Kay <allen.m.kay@intel.com> - adapted from linux
18 */
20 #define PCI_VENDOR_ID_INTEL 0x8086
21 #define PCI_DEVICE_ID_INTEL_E7520_MCH 0x3590
22 #define PCI_DEVICE_ID_INTEL_82945G_HB 0x2770
24 /* ioport ends */
25 #define PCI_PROBE_BIOS 0x0001
26 #define PCI_PROBE_CONF1 0x0002
27 #define PCI_PROBE_CONF2 0x0004
28 #define PCI_PROBE_MMCONF 0x0008
29 #define PCI_PROBE_MASK 0x000f
30 #define PCI_PROBE_NOEARLY 0x0010
32 #define PCI_VENDOR_ID_AMD 0x1022
33 #define PCI_CHECK_ENABLE_AMD_MMCONF 0x20000
35 /*
36 * AMD Fam10h CPUs are buggy, and cannot access MMIO config space
37 * on their northbrige except through the * %eax register. As such, you MUST
38 * NOT use normal IOMEM accesses, you need to only use the magic mmio-config
39 * accessor functions.
40 * In fact just use pci_config_*, nothing else please.
41 */
42 static inline unsigned char mmio_config_readb(void __iomem *pos)
43 {
44 u8 val;
45 asm volatile("movb (%1),%%al" : "=a" (val) : "r" (pos));
46 return val;
47 }
49 static inline unsigned short mmio_config_readw(void __iomem *pos)
50 {
51 u16 val;
52 asm volatile("movw (%1),%%ax" : "=a" (val) : "r" (pos));
53 return val;
54 }
56 static inline unsigned int mmio_config_readl(void __iomem *pos)
57 {
58 u32 val;
59 asm volatile("movl (%1),%%eax" : "=a" (val) : "r" (pos));
60 return val;
61 }
63 static inline void mmio_config_writeb(void __iomem *pos, u8 val)
64 {
65 asm volatile("movb %%al,(%1)" :: "a" (val), "r" (pos) : "memory");
66 }
68 static inline void mmio_config_writew(void __iomem *pos, u16 val)
69 {
70 asm volatile("movw %%ax,(%1)" :: "a" (val), "r" (pos) : "memory");
71 }
73 static inline void mmio_config_writel(void __iomem *pos, u32 val)
74 {
75 asm volatile("movl %%eax,(%1)" :: "a" (val), "r" (pos) : "memory");
76 }
78 /* external variable defines */
79 extern int pci_mmcfg_config_num;
80 extern struct acpi_mcfg_allocation *pci_mmcfg_config;
82 /* fucntion prototypes */
83 int __init acpi_parse_mcfg(struct acpi_table_header *header);
84 int __init pci_mmcfg_arch_init(void);
85 void __init pci_mmcfg_arch_free(void);