ia64/xen-unstable

view xen/include/asm-x86/smp.h @ 16267:4034317507de

x86: allow pv guests to disable TSC for applications

Linux, under CONFIG_SECCOMP, has been capable of hiding the TSC from
processes for quite a while. This patch enables this to actually work
for pv kernels, by allowing them to control CR4.TSD (and, as a simple
thing to do at the same time, CR4.DE).

Applies cleanly only on top of the previously submitted debug register
handling patch.

Signed-off-by: Jan Beulich <jbeulich@novell.com>

Also clean up CR4 and EFER handling, and hack-n-slash header file
inclusion madness to get the tree building again.

Signed-off-by: Keir Fraser <keir@xensource.com>
author Keir Fraser <keir@xensource.com>
date Mon Oct 29 16:49:02 2007 +0000 (2007-10-29)
parents 858b9bc8d0e6
children 2a3111016f88
line source
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
4 /*
5 * We need the APIC definitions automatically as part of 'smp.h'
6 */
7 #ifndef __ASSEMBLY__
8 #include <xen/config.h>
9 #include <xen/kernel.h>
10 #include <xen/cpumask.h>
11 #include <asm/current.h>
12 #endif
14 #ifdef CONFIG_X86_LOCAL_APIC
15 #ifndef __ASSEMBLY__
16 #include <asm/bitops.h>
17 #include <asm/mpspec.h>
18 #ifdef CONFIG_X86_IO_APIC
19 #include <asm/io_apic.h>
20 #endif
21 #include <asm/apic.h>
22 #endif
23 #endif
25 #define BAD_APICID 0xFFu
26 #ifdef CONFIG_SMP
27 #ifndef __ASSEMBLY__
29 /*
30 * Private routines/data
31 */
33 extern void smp_alloc_memory(void);
34 extern int pic_mode;
35 extern int smp_num_siblings;
36 extern cpumask_t cpu_sibling_map[];
37 extern cpumask_t cpu_core_map[];
39 extern void (*mtrr_hook) (void);
41 #ifdef CONFIG_X86_64
42 extern void zap_low_mappings(void);
43 #else
44 extern void zap_low_mappings(l2_pgentry_t *base);
45 #endif
47 #define MAX_APICID 256
48 extern u8 x86_cpu_to_apicid[];
50 #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
52 /* State of each CPU. */
53 #define CPU_ONLINE 0x0002 /* CPU is up */
54 #define CPU_DYING 0x0003 /* CPU is requested to die */
55 #define CPU_DEAD 0x0004 /* CPU is dead */
56 DECLARE_PER_CPU(int, cpu_state);
58 #ifdef CONFIG_HOTPLUG_CPU
59 #define cpu_is_offline(cpu) unlikely(per_cpu(cpu_state,cpu) == CPU_DYING)
60 extern int cpu_down(unsigned int cpu);
61 extern int cpu_up(unsigned int cpu);
62 extern void cpu_exit_clear(void);
63 extern void cpu_uninit(void);
64 extern void disable_nonboot_cpus(void);
65 extern void enable_nonboot_cpus(void);
66 #else
67 static inline int cpu_is_offline(int cpu) {return 0;}
68 static inline void disable_nonboot_cpus(void) {}
69 static inline void enable_nonboot_cpus(void) {}
70 #endif
72 /*
73 * This function is needed by all SMP systems. It must _always_ be valid
74 * from the initial startup. We map APIC_BASE very early in page_setup(),
75 * so this is correct in the x86 case.
76 */
77 #define raw_smp_processor_id() (get_processor_id())
79 extern cpumask_t cpu_callout_map;
80 extern cpumask_t cpu_callin_map;
81 extern cpumask_t cpu_possible_map;
83 /* We don't mark CPUs online until __cpu_up(), so we need another measure */
84 static inline int num_booting_cpus(void)
85 {
86 return cpus_weight(cpu_callout_map);
87 }
89 #ifdef CONFIG_X86_LOCAL_APIC
91 static inline int hard_smp_processor_id(void)
92 {
93 /* we don't want to mark this access volatile - bad code generation */
94 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
95 }
97 static __inline int logical_smp_processor_id(void)
98 {
99 /* we don't want to mark this access volatile - bad code generation */
100 return GET_APIC_LOGICAL_ID(*(unsigned int *)(APIC_BASE+APIC_LDR));
101 }
103 #endif
105 extern int __cpu_disable(void);
106 extern void __cpu_die(unsigned int cpu);
107 #endif /* !__ASSEMBLY__ */
109 #else /* CONFIG_SMP */
111 #define cpu_physical_id(cpu) boot_cpu_physical_apicid
113 #define NO_PROC_ID 0xFF /* No processor magic marker */
115 #endif
116 #endif