ia64/xen-unstable

view xen/include/asm-ia64/domain.h @ 16329:3fd755b95f6f

[IA64] Cleanup: remove unused fields from struct arch_domain

Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
author Alex Williamson <alex.williamson@hp.com>
date Tue Nov 06 14:05:50 2007 -0700 (2007-11-06)
parents 8cea24cf57c7
children b444678b94ea
line source
1 #ifndef __ASM_DOMAIN_H__
2 #define __ASM_DOMAIN_H__
4 #include <linux/thread_info.h>
5 #include <asm/tlb.h>
6 #include <asm/vmx_vpd.h>
7 #include <asm/vmmu.h>
8 #include <asm/regionreg.h>
9 #include <public/xen.h>
10 #include <asm/vmx_platform.h>
11 #include <xen/list.h>
12 #include <xen/cpumask.h>
13 #include <asm/fpswa.h>
14 #include <xen/rangeset.h>
16 struct p2m_entry;
17 #ifdef CONFIG_XEN_IA64_TLB_TRACK
18 struct tlb_track;
19 #endif
21 struct vcpu;
22 extern void relinquish_vcpu_resources(struct vcpu *v);
23 extern int vcpu_late_initialise(struct vcpu *v);
25 /* given a current domain metaphysical address, return the physical address */
26 extern unsigned long translate_domain_mpaddr(unsigned long mpaddr,
27 struct p2m_entry* entry);
29 /* Set shared_info virtual address. */
30 extern unsigned long domain_set_shared_info_va (unsigned long va);
32 /* Flush cache of domain d.
33 If sync_only is true, only synchronize I&D caches,
34 if false, flush and invalidate caches. */
35 extern void domain_cache_flush (struct domain *d, int sync_only);
37 /* Control the shadow mode. */
38 extern int shadow_mode_control(struct domain *d, xen_domctl_shadow_op_t *sc);
40 /* Cleanly crash the current domain with a message. */
41 extern void panic_domain(struct pt_regs *, const char *, ...)
42 __attribute__ ((noreturn, format (printf, 2, 3)));
44 struct mm_struct {
45 volatile pgd_t * pgd;
46 // atomic_t mm_users; /* How many users with user space? */
47 };
49 struct foreign_p2m {
50 spinlock_t lock;
51 /*
52 * sorted list with entry->gpfn.
53 * It is expected that only small number of foreign domain p2m
54 * mapping happens at the same time.
55 */
56 struct list_head head;
57 };
59 struct last_vcpu {
60 #define INVALID_VCPU_ID INT_MAX
61 int vcpu_id;
62 #ifdef CONFIG_XEN_IA64_TLBFLUSH_CLOCK
63 u32 tlbflush_timestamp;
64 #endif
65 } ____cacheline_aligned_in_smp;
67 /* These are data in domain memory for SAL emulator. */
68 struct xen_sal_data {
69 /* OS boot rendez vous. */
70 unsigned long boot_rdv_ip;
71 unsigned long boot_rdv_r1;
73 /* There are these for EFI_SET_VIRTUAL_ADDRESS_MAP emulation. */
74 int efi_virt_mode; /* phys : 0 , virt : 1 */
75 };
77 /*
78 * Optimization features
79 * are used by the hypervisor to do some optimizations for guests.
80 * By default the optimizations are switched off and the guest has to activate
81 * the feature. On PV the guest must do this via the hypercall
82 * __HYPERVISOR_opt_feature, on HVM it's done within xen in set_os_type().
83 */
85 /*
86 * Helper struct for the different identity mapping optimizations.
87 * The hypervisor does the insertion of address translations in the tlb
88 * for identity mapped areas without reflecting the page fault
89 * to the guest.
90 */
91 struct identity_mapping {
92 unsigned long pgprot; /* The page protection bit mask of the pte.*/
93 unsigned long key; /* A protection key. */
94 };
96 /* Central structure for optimzation features used by the hypervisor. */
97 struct opt_feature {
98 unsigned long mask; /* For every feature one bit. */
99 struct identity_mapping im_reg4; /* Region 4 identity mapping */
100 struct identity_mapping im_reg5; /* Region 5 identity mapping */
101 struct identity_mapping im_reg7; /* Region 7 identity mapping */
102 };
104 /*
105 * The base XEN_IA64_OPTF_IDENT_MAP_REG7 is defined in public/arch-ia64.h.
106 * Identity mapping of region 4 addresses in HVM.
107 */
108 #define XEN_IA64_OPTF_IDENT_MAP_REG4 (XEN_IA64_OPTF_IDENT_MAP_REG7 + 1)
109 /* Identity mapping of region 5 addresses in HVM. */
110 #define XEN_IA64_OPTF_IDENT_MAP_REG5 (XEN_IA64_OPTF_IDENT_MAP_REG4 + 1)
112 /* Set an optimization feature in the struct arch_domain. */
113 extern int domain_opt_feature(struct xen_ia64_opt_feature*);
115 struct arch_domain {
116 struct mm_struct mm;
118 /* Flags. */
119 union {
120 unsigned long flags;
121 struct {
122 unsigned int is_vti : 1;
123 #ifdef CONFIG_XEN_IA64_PERVCPU_VHPT
124 unsigned int has_pervcpu_vhpt : 1;
125 unsigned int vhpt_size_log2 : 6;
126 #endif
127 };
128 };
130 /* maximum metaphysical address of conventional memory */
131 u64 convmem_end;
133 /* Allowed accesses to io ports. */
134 struct rangeset *ioport_caps;
136 /* There are two ranges of RID for a domain:
137 one big range, used to virtualize domain RID,
138 one small range for internal Xen use (metaphysical). */
139 /* Big range. */
140 unsigned int starting_rid; /* first RID assigned to domain */
141 unsigned int ending_rid; /* one beyond highest RID assigned to domain */
142 /* Metaphysical range. */
143 unsigned int starting_mp_rid;
144 unsigned int ending_mp_rid;
145 /* RID for metaphysical mode. */
146 unsigned int metaphysical_rid_dt; /* dt=it=0 */
147 unsigned int metaphysical_rid_d; /* dt=0, it=1 */
149 unsigned char rid_bits; /* number of virtual rid bits (default: 18) */
150 int breakimm; /* The imm value for hypercalls. */
152 struct virtual_platform_def vmx_platform;
153 #define hvm_domain vmx_platform /* platform defs are not vmx specific */
155 u64 shared_info_va;
157 /* Address of SAL emulator data */
158 struct xen_sal_data *sal_data;
160 /* Address of efi_runtime_services_t (placed in domain memory) */
161 void *efi_runtime;
162 /* Address of fpswa_interface_t (placed in domain memory) */
163 void *fpswa_inf;
165 /* Bitmap of shadow dirty bits.
166 Set iff shadow mode is enabled. */
167 u64 *shadow_bitmap;
168 /* Length (in bits!) of shadow bitmap. */
169 unsigned long shadow_bitmap_size;
170 /* Number of bits set in bitmap. */
171 atomic64_t shadow_dirty_count;
172 /* Number of faults. */
173 atomic64_t shadow_fault_count;
175 /* for foreign domain p2m table mapping */
176 struct foreign_p2m foreign_p2m;
178 struct last_vcpu last_vcpu[NR_CPUS];
180 struct opt_feature opt_feature;
182 /* Debugging flags. See arch-ia64.h for bits definition. */
183 unsigned int debug_flags;
185 /* Reason of debugging break. */
186 unsigned int debug_event;
188 #ifdef CONFIG_XEN_IA64_TLB_TRACK
189 struct tlb_track* tlb_track;
190 #endif
192 /* for domctl_destroy_domain continuation */
193 enum {
194 RELRES_not_started,
195 RELRES_mm_teardown,
196 RELRES_xen,
197 RELRES_dom,
198 RELRES_done,
199 } relres;
200 /* Continuable mm_teardown() */
201 unsigned long mm_teardown_offset;
202 /* Continuable domain_relinquish_resources() */
203 struct list_head relmem_list;
204 };
205 #define INT_ENABLE_OFFSET(v) \
206 (sizeof(vcpu_info_t) * (v)->vcpu_id + \
207 offsetof(vcpu_info_t, evtchn_upcall_mask))
209 #ifdef CONFIG_XEN_IA64_PERVCPU_VHPT
210 #define HAS_PERVCPU_VHPT(d) ((d)->arch.has_pervcpu_vhpt)
211 #else
212 #define HAS_PERVCPU_VHPT(d) (0)
213 #endif
216 struct arch_vcpu {
217 /* Save the state of vcpu.
218 This is the first entry to speed up accesses. */
219 mapped_regs_t *privregs;
221 /* TR and TC. */
222 TR_ENTRY itrs[NITRS];
223 TR_ENTRY dtrs[NDTRS];
224 TR_ENTRY itlb;
225 TR_ENTRY dtlb;
227 /* Bit is set if there is a tr/tc for the region. */
228 unsigned char itr_regions;
229 unsigned char dtr_regions;
230 unsigned char tc_regions;
232 unsigned long irr[4]; /* Interrupt request register. */
233 unsigned long insvc[4]; /* Interrupt in service. */
234 unsigned long iva;
235 unsigned long domain_itm;
236 unsigned long domain_itm_last;
238 unsigned long event_callback_ip; // event callback handler
239 unsigned long failsafe_callback_ip; // Do we need it?
241 /* These fields are copied from arch_domain to make access easier/faster
242 in assembly code. */
243 unsigned long metaphysical_rid_dt; // from arch_domain (so is pinned)
244 unsigned long metaphysical_rid_d; // from arch_domain (so is pinned)
245 unsigned long metaphysical_saved_rr0; // from arch_domain (so is pinned)
246 unsigned long metaphysical_saved_rr4; // from arch_domain (so is pinned)
247 unsigned long fp_psr; // used for lazy float register
248 int breakimm; // from arch_domain (so is pinned)
249 int starting_rid; /* first RID assigned to domain */
250 int ending_rid; /* one beyond highest RID assigned to domain */
252 /* Bitset for debug register use. */
253 unsigned int dbg_used;
254 u64 dbr[IA64_NUM_DBG_REGS];
255 u64 ibr[IA64_NUM_DBG_REGS];
257 struct thread_struct _thread; // this must be last
259 thash_cb_t vtlb;
260 thash_cb_t vhpt;
261 char irq_new_pending;
262 char irq_new_condition; // vpsr.i/vtpr change, check for pending VHPI
263 char hypercall_continuation;
265 fpswa_ret_t fpswa_ret; /* save return values of FPSWA emulation */
266 struct timer hlt_timer;
267 struct arch_vmx_struct arch_vmx; /* Virtual Machine Extensions */
269 /* This vector hosts the protection keys for pkr emulation of PV domains.
270 * Currently only 15 registers are usable by domU's. pkr[15] is
271 * reserved for the hypervisor. */
272 unsigned long pkrs[XEN_IA64_NPKRS+1]; /* protection key registers */
273 #define XEN_IA64_PKR_IN_USE 0x1 /* If psr.pk = 1 was set. */
274 unsigned char pkr_flags;
276 unsigned char vhpt_pg_shift; /* PAGE_SHIFT or less */
277 #ifdef CONFIG_XEN_IA64_PERVCPU_VHPT
278 PTA pta;
279 unsigned long vhpt_maddr;
280 struct page_info* vhpt_page;
281 unsigned long vhpt_entries;
282 #endif
283 #define INVALID_PROCESSOR INT_MAX
284 int last_processor;
285 cpumask_t cache_coherent_map;
286 };
288 #include <asm/uaccess.h> /* for KERNEL_DS */
289 #include <asm/pgtable.h>
291 int
292 do_perfmon_op(unsigned long cmd,
293 XEN_GUEST_HANDLE(void) arg1, unsigned long arg2);
295 #endif /* __ASM_DOMAIN_H__ */
297 /*
298 * Local variables:
299 * mode: C
300 * c-set-style: "BSD"
301 * c-basic-offset: 4
302 * tab-width: 4
303 * indent-tabs-mode: nil
304 * End:
305 */