ia64/xen-unstable

view patches/linux-2.6.16.13/net-gso-3-fix-errorcheck.patch @ 11472:3e31c5e160cf

[HVM] Fix an error when read from APIC registers like IRR, ISR and TMR.
From SDM3 spec, for APIC registers, all 32-bit registers should
be accessed using 128-bit aligned 32bit loads or stores.
And wider registers (64-bit or 256-bit) must be accessed using
multiple 32-bit loads or stores.

In old APIC virtualization code, we use IRR, ISR and TMR which are
256-bit registers as contiguous bit maps other than multiple 32-bit.

So guest always fetch error values.

Original patch was:
* Signed-off-by: Xiaohui Xin <xiaohui.xin@intel.com>
* Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
* Signed-off-by: Eddie Dong <eddie.dong@intel.com>

Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Wed Sep 13 15:59:14 2006 +0100 (2006-09-13)
parents 7dfc65c38035
children
line source
1 diff -urp a/include/linux/netdevice.h b/include/linux/netdevice.h
2 --- a/include/linux/netdevice.h 2006-07-25 15:16:39.314333975 +0100
3 +++ b/include/linux/netdevice.h 2006-07-25 15:19:37.298320799 +0100
4 @@ -930,10 +930,10 @@ static inline void netif_tx_lock_bh(stru
6 static inline int netif_tx_trylock(struct net_device *dev)
7 {
8 - int err = spin_trylock(&dev->_xmit_lock);
9 - if (!err)
10 + int ok = spin_trylock(&dev->_xmit_lock);
11 + if (likely(ok))
12 dev->xmit_lock_owner = smp_processor_id();
13 - return err;
14 + return ok;
15 }
17 static inline void netif_tx_unlock(struct net_device *dev)