ia64/xen-unstable

view xen/include/public/arch-ia64.h @ 15415:38d061886873

[IA64] Fix incorrect NVRAM saving if domain is destroyed by config error

Nvram saving is always executed even if a domain is destroyed by a
configuration parameter error. In this case, Nvram saving function
will get a bad address for the NVRAM data and save garbage into the
NVRAM file. Configuring a wrong vif parameter can expose this issue.

This patch fixes the issue by adding an address check function in
NVRAM saving path.

Signed-off-by: Zhang Xin <xing.z.zhang@intel.com>
author Alex Williamson <alex.williamson@hp.com>
date Mon Jul 02 09:05:24 2007 -0600 (2007-07-02)
parents eb21b7274ab8
children c7e16caf4e63
line source
1 /******************************************************************************
2 * arch-ia64/hypervisor-if.h
3 *
4 * Guest OS interface to IA64 Xen.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 */
26 #ifndef __HYPERVISOR_IF_IA64_H__
27 #define __HYPERVISOR_IF_IA64_H__
29 /* Structural guest handles introduced in 0x00030201. */
30 #if __XEN_INTERFACE_VERSION__ >= 0x00030201
31 #define __DEFINE_XEN_GUEST_HANDLE(name, type) \
32 typedef struct { type *p; } __guest_handle_ ## name
33 #else
34 #define __DEFINE_XEN_GUEST_HANDLE(name, type) \
35 typedef type * __guest_handle_ ## name
36 #endif
38 #define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name)
39 #define XEN_GUEST_HANDLE(name) __guest_handle_ ## name
40 #define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name)
41 #define uint64_aligned_t uint64_t
42 #define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0)
43 #ifdef __XEN_TOOLS__
44 #define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0)
45 #endif
47 #ifndef __ASSEMBLY__
48 /* Guest handles for primitive C types. */
49 __DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char);
50 __DEFINE_XEN_GUEST_HANDLE(uint, unsigned int);
51 __DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long);
52 __DEFINE_XEN_GUEST_HANDLE(u64, unsigned long);
53 DEFINE_XEN_GUEST_HANDLE(char);
54 DEFINE_XEN_GUEST_HANDLE(int);
55 DEFINE_XEN_GUEST_HANDLE(long);
56 DEFINE_XEN_GUEST_HANDLE(void);
58 typedef unsigned long xen_pfn_t;
59 DEFINE_XEN_GUEST_HANDLE(xen_pfn_t);
60 #define PRI_xen_pfn "lx"
61 #endif
63 /* Arch specific VIRQs definition */
64 #define VIRQ_ITC VIRQ_ARCH_0 /* V. Virtual itc timer */
65 #define VIRQ_MCA_CMC VIRQ_ARCH_1 /* MCA cmc interrupt */
66 #define VIRQ_MCA_CPE VIRQ_ARCH_2 /* MCA cpe interrupt */
68 /* Maximum number of virtual CPUs in multi-processor guests. */
69 /* WARNING: before changing this, check that shared_info fits on a page */
70 #define MAX_VIRT_CPUS 64
72 #ifndef __ASSEMBLY__
74 typedef unsigned long xen_ulong_t;
76 #define INVALID_MFN (~0UL)
78 #define MEM_G (1UL << 30)
79 #define MEM_M (1UL << 20)
80 #define MEM_K (1UL << 10)
82 /* Guest physical address of IO ports space. */
83 #define IO_PORTS_PADDR 0x00000ffffc000000UL
84 #define IO_PORTS_SIZE 0x0000000004000000UL
86 #define MMIO_START (3 * MEM_G)
87 #define MMIO_SIZE (512 * MEM_M)
89 #define VGA_IO_START 0xA0000UL
90 #define VGA_IO_SIZE 0x20000
92 #define LEGACY_IO_START (MMIO_START + MMIO_SIZE)
93 #define LEGACY_IO_SIZE (64*MEM_M)
95 #define IO_PAGE_START (LEGACY_IO_START + LEGACY_IO_SIZE)
96 #define IO_PAGE_SIZE PAGE_SIZE
98 #define STORE_PAGE_START (IO_PAGE_START + IO_PAGE_SIZE)
99 #define STORE_PAGE_SIZE PAGE_SIZE
101 #define BUFFER_IO_PAGE_START (STORE_PAGE_START+STORE_PAGE_SIZE)
102 #define BUFFER_IO_PAGE_SIZE PAGE_SIZE
104 #define BUFFER_PIO_PAGE_START (BUFFER_IO_PAGE_START+BUFFER_IO_PAGE_SIZE)
105 #define BUFFER_PIO_PAGE_SIZE PAGE_SIZE
107 #define IO_SAPIC_START 0xfec00000UL
108 #define IO_SAPIC_SIZE 0x100000
110 #define PIB_START 0xfee00000UL
111 #define PIB_SIZE 0x200000
113 #define GFW_START (4*MEM_G -16*MEM_M)
114 #define GFW_SIZE (16*MEM_M)
116 /* Nvram belongs to GFW memory space */
117 #define NVRAM_SIZE (MEM_K * 64)
118 #define NVRAM_START (GFW_START + 10 * MEM_M)
120 #define NVRAM_VALID_SIG 0x4650494e45584948 // "HIXENIPF"
121 struct nvram_save_addr {
122 unsigned long addr;
123 unsigned long signature;
124 };
126 struct pt_fpreg {
127 union {
128 unsigned long bits[2];
129 long double __dummy; /* force 16-byte alignment */
130 } u;
131 };
133 struct cpu_user_regs {
134 /* The following registers are saved by SAVE_MIN: */
135 unsigned long b6; /* scratch */
136 unsigned long b7; /* scratch */
138 unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
139 unsigned long ar_ssd; /* reserved for future use (scratch) */
141 unsigned long r8; /* scratch (return value register 0) */
142 unsigned long r9; /* scratch (return value register 1) */
143 unsigned long r10; /* scratch (return value register 2) */
144 unsigned long r11; /* scratch (return value register 3) */
146 unsigned long cr_ipsr; /* interrupted task's psr */
147 unsigned long cr_iip; /* interrupted task's instruction pointer */
148 unsigned long cr_ifs; /* interrupted task's function state */
150 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
151 unsigned long ar_pfs; /* prev function state */
152 unsigned long ar_rsc; /* RSE configuration */
153 /* The following two are valid only if cr_ipsr.cpl > 0: */
154 unsigned long ar_rnat; /* RSE NaT */
155 unsigned long ar_bspstore; /* RSE bspstore */
157 unsigned long pr; /* 64 predicate registers (1 bit each) */
158 unsigned long b0; /* return pointer (bp) */
159 unsigned long loadrs; /* size of dirty partition << 16 */
161 unsigned long r1; /* the gp pointer */
162 unsigned long r12; /* interrupted task's memory stack pointer */
163 unsigned long r13; /* thread pointer */
165 unsigned long ar_fpsr; /* floating point status (preserved) */
166 unsigned long r15; /* scratch */
168 /* The remaining registers are NOT saved for system calls. */
170 unsigned long r14; /* scratch */
171 unsigned long r2; /* scratch */
172 unsigned long r3; /* scratch */
173 unsigned long r16; /* scratch */
174 unsigned long r17; /* scratch */
175 unsigned long r18; /* scratch */
176 unsigned long r19; /* scratch */
177 unsigned long r20; /* scratch */
178 unsigned long r21; /* scratch */
179 unsigned long r22; /* scratch */
180 unsigned long r23; /* scratch */
181 unsigned long r24; /* scratch */
182 unsigned long r25; /* scratch */
183 unsigned long r26; /* scratch */
184 unsigned long r27; /* scratch */
185 unsigned long r28; /* scratch */
186 unsigned long r29; /* scratch */
187 unsigned long r30; /* scratch */
188 unsigned long r31; /* scratch */
189 unsigned long ar_ccv; /* compare/exchange value (scratch) */
191 /*
192 * Floating point registers that the kernel considers scratch:
193 */
194 struct pt_fpreg f6; /* scratch */
195 struct pt_fpreg f7; /* scratch */
196 struct pt_fpreg f8; /* scratch */
197 struct pt_fpreg f9; /* scratch */
198 struct pt_fpreg f10; /* scratch */
199 struct pt_fpreg f11; /* scratch */
200 unsigned long r4; /* preserved */
201 unsigned long r5; /* preserved */
202 unsigned long r6; /* preserved */
203 unsigned long r7; /* preserved */
204 unsigned long eml_unat; /* used for emulating instruction */
205 unsigned long pad0; /* alignment pad */
207 };
208 typedef struct cpu_user_regs cpu_user_regs_t;
210 union vac {
211 unsigned long value;
212 struct {
213 int a_int:1;
214 int a_from_int_cr:1;
215 int a_to_int_cr:1;
216 int a_from_psr:1;
217 int a_from_cpuid:1;
218 int a_cover:1;
219 int a_bsw:1;
220 long reserved:57;
221 };
222 };
223 typedef union vac vac_t;
225 union vdc {
226 unsigned long value;
227 struct {
228 int d_vmsw:1;
229 int d_extint:1;
230 int d_ibr_dbr:1;
231 int d_pmc:1;
232 int d_to_pmd:1;
233 int d_itm:1;
234 long reserved:58;
235 };
236 };
237 typedef union vdc vdc_t;
239 struct mapped_regs {
240 union vac vac;
241 union vdc vdc;
242 unsigned long virt_env_vaddr;
243 unsigned long reserved1[29];
244 unsigned long vhpi;
245 unsigned long reserved2[95];
246 union {
247 unsigned long vgr[16];
248 unsigned long bank1_regs[16]; // bank1 regs (r16-r31) when bank0 active
249 };
250 union {
251 unsigned long vbgr[16];
252 unsigned long bank0_regs[16]; // bank0 regs (r16-r31) when bank1 active
253 };
254 unsigned long vnat;
255 unsigned long vbnat;
256 unsigned long vcpuid[5];
257 unsigned long reserved3[11];
258 unsigned long vpsr;
259 unsigned long vpr;
260 unsigned long reserved4[76];
261 union {
262 unsigned long vcr[128];
263 struct {
264 unsigned long dcr; // CR0
265 unsigned long itm;
266 unsigned long iva;
267 unsigned long rsv1[5];
268 unsigned long pta; // CR8
269 unsigned long rsv2[7];
270 unsigned long ipsr; // CR16
271 unsigned long isr;
272 unsigned long rsv3;
273 unsigned long iip;
274 unsigned long ifa;
275 unsigned long itir;
276 unsigned long iipa;
277 unsigned long ifs;
278 unsigned long iim; // CR24
279 unsigned long iha;
280 unsigned long rsv4[38];
281 unsigned long lid; // CR64
282 unsigned long ivr;
283 unsigned long tpr;
284 unsigned long eoi;
285 unsigned long irr[4];
286 unsigned long itv; // CR72
287 unsigned long pmv;
288 unsigned long cmcv;
289 unsigned long rsv5[5];
290 unsigned long lrr0; // CR80
291 unsigned long lrr1;
292 unsigned long rsv6[46];
293 };
294 };
295 union {
296 unsigned long reserved5[128];
297 struct {
298 unsigned long precover_ifs;
299 unsigned long unat; // not sure if this is needed until NaT arch is done
300 int interrupt_collection_enabled; // virtual psr.ic
301 /* virtual interrupt deliverable flag is evtchn_upcall_mask in
302 * shared info area now. interrupt_mask_addr is the address
303 * of evtchn_upcall_mask for current vcpu
304 */
305 unsigned char *interrupt_mask_addr;
306 int pending_interruption;
307 unsigned char vpsr_pp;
308 unsigned char vpsr_dfh;
309 unsigned char hpsr_dfh;
310 unsigned char hpsr_mfh;
311 unsigned long reserved5_1[4];
312 int metaphysical_mode; // 1 = use metaphys mapping, 0 = use virtual
313 int banknum; // 0 or 1, which virtual register bank is active
314 unsigned long rrs[8]; // region registers
315 unsigned long krs[8]; // kernel registers
316 unsigned long pkrs[8]; // protection key registers
317 unsigned long tmp[8]; // temp registers (e.g. for hyperprivops)
318 };
319 };
320 };
321 typedef struct mapped_regs mapped_regs_t;
323 struct vpd {
324 struct mapped_regs vpd_low;
325 unsigned long reserved6[3456];
326 unsigned long vmm_avail[128];
327 unsigned long reserved7[4096];
328 };
329 typedef struct vpd vpd_t;
331 struct arch_vcpu_info {
332 };
333 typedef struct arch_vcpu_info arch_vcpu_info_t;
335 /*
336 * This structure is used for magic page in domain pseudo physical address
337 * space and the result of XENMEM_machine_memory_map.
338 * As the XENMEM_machine_memory_map result,
339 * xen_memory_map::nr_entries indicates the size in bytes
340 * including struct xen_ia64_memmap_info. Not the number of entries.
341 */
342 struct xen_ia64_memmap_info {
343 uint64_t efi_memmap_size; /* size of EFI memory map */
344 uint64_t efi_memdesc_size; /* size of an EFI memory map descriptor */
345 uint32_t efi_memdesc_version; /* memory descriptor version */
346 void *memdesc[0]; /* array of efi_memory_desc_t */
347 };
348 typedef struct xen_ia64_memmap_info xen_ia64_memmap_info_t;
350 struct arch_shared_info {
351 /* PFN of the start_info page. */
352 unsigned long start_info_pfn;
354 /* Interrupt vector for event channel. */
355 int evtchn_vector;
357 /* PFN of memmap_info page */
358 unsigned int memmap_info_num_pages;/* currently only = 1 case is
359 supported. */
360 unsigned long memmap_info_pfn;
362 uint64_t pad[31];
363 };
364 typedef struct arch_shared_info arch_shared_info_t;
366 typedef unsigned long xen_callback_t;
368 struct ia64_tr_entry {
369 unsigned long pte;
370 unsigned long itir;
371 unsigned long vadr;
372 unsigned long rid;
373 };
375 struct vcpu_tr_regs {
376 struct ia64_tr_entry itrs[8];
377 struct ia64_tr_entry dtrs[8];
378 };
380 union vcpu_ar_regs {
381 unsigned long ar[128];
382 struct {
383 unsigned long kr[8];
384 unsigned long rsv1[8];
385 unsigned long rsc;
386 unsigned long bsp;
387 unsigned long bspstore;
388 unsigned long rnat;
389 unsigned long rsv2;
390 unsigned long fcr;
391 unsigned long rsv3[2];
392 unsigned long eflag;
393 unsigned long csd;
394 unsigned long ssd;
395 unsigned long cflg;
396 unsigned long fsr;
397 unsigned long fir;
398 unsigned long fdr;
399 unsigned long rsv4;
400 unsigned long ccv; /* 32 */
401 unsigned long rsv5[3];
402 unsigned long unat;
403 unsigned long rsv6[3];
404 unsigned long fpsr;
405 unsigned long rsv7[3];
406 unsigned long itc;
407 unsigned long rsv8[3];
408 unsigned long ign1[16];
409 unsigned long pfs; /* 64 */
410 unsigned long lc;
411 unsigned long ec;
412 unsigned long rsv9[45];
413 unsigned long ign2[16];
414 };
415 };
417 union vcpu_cr_regs {
418 unsigned long cr[128];
419 struct {
420 unsigned long dcr; // CR0
421 unsigned long itm;
422 unsigned long iva;
423 unsigned long rsv1[5];
424 unsigned long pta; // CR8
425 unsigned long rsv2[7];
426 unsigned long ipsr; // CR16
427 unsigned long isr;
428 unsigned long rsv3;
429 unsigned long iip;
430 unsigned long ifa;
431 unsigned long itir;
432 unsigned long iipa;
433 unsigned long ifs;
434 unsigned long iim; // CR24
435 unsigned long iha;
436 unsigned long rsv4[38];
437 unsigned long lid; // CR64
438 unsigned long ivr;
439 unsigned long tpr;
440 unsigned long eoi;
441 unsigned long irr[4];
442 unsigned long itv; // CR72
443 unsigned long pmv;
444 unsigned long cmcv;
445 unsigned long rsv5[5];
446 unsigned long lrr0; // CR80
447 unsigned long lrr1;
448 unsigned long rsv6[46];
449 };
450 };
452 struct vcpu_guest_context_regs {
453 unsigned long r[32];
454 unsigned long b[8];
455 unsigned long bank[16];
456 unsigned long ip;
457 unsigned long psr;
458 unsigned long cfm;
459 unsigned long pr;
460 unsigned int nats; /* NaT bits for r1-r31. */
461 unsigned int bnats; /* Nat bits for banked registers. */
462 union vcpu_ar_regs ar;
463 union vcpu_cr_regs cr;
464 struct pt_fpreg f[128];
465 unsigned long dbr[8];
466 unsigned long ibr[8];
467 unsigned long rr[8];
468 unsigned long pkr[16];
470 /* FIXME: cpuid,pmd,pmc */
472 unsigned long xip;
473 unsigned long xpsr;
474 unsigned long xfs;
475 unsigned long xr[4];
477 struct vcpu_tr_regs tr;
479 /* Physical registers in case of debug event. */
480 unsigned long excp_iipa;
481 unsigned long excp_isr;
482 unsigned int excp_vector;
484 /*
485 * The rbs is intended to be the image of the stacked registers still
486 * in the cpu (not yet stored in memory). It is laid out as if it
487 * were written in memory at a 512 (64*8) aligned address + offset.
488 * rbs_voff is (offset / 8). rbs_nat contains NaT bits for the
489 * remaining rbs registers. rbs_rnat contains NaT bits for in memory
490 * rbs registers.
491 * Note: loadrs is 2**14 bytes == 2**11 slots.
492 */
493 unsigned int rbs_voff;
494 unsigned long rbs[2048];
495 unsigned long rbs_nat;
496 unsigned long rbs_rnat;
497 };
499 struct vcpu_guest_context {
500 #define VGCF_EXTRA_REGS (1<<1) /* Get/Set extra regs. */
501 unsigned long flags; /* VGCF_* flags */
503 struct vcpu_guest_context_regs regs;
505 unsigned long event_callback_ip;
506 unsigned long privregs_pfn;
507 };
508 typedef struct vcpu_guest_context vcpu_guest_context_t;
509 DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
511 /* dom0 vp op */
512 #define __HYPERVISOR_ia64_dom0vp_op __HYPERVISOR_arch_0
513 /* Map io space in machine address to dom0 physical address space.
514 Currently physical assigned address equals to machine address. */
515 #define IA64_DOM0VP_ioremap 0
517 /* Convert a pseudo physical page frame number to the corresponding
518 machine page frame number. If no page is assigned, INVALID_MFN or
519 GPFN_INV_MASK is returned depending on domain's non-vti/vti mode. */
520 #define IA64_DOM0VP_phystomach 1
522 /* Convert a machine page frame number to the corresponding pseudo physical
523 page frame number of the caller domain. */
524 #define IA64_DOM0VP_machtophys 3
526 /* Reserved for future use. */
527 #define IA64_DOM0VP_iounmap 4
529 /* Unmap and free pages contained in the specified pseudo physical region. */
530 #define IA64_DOM0VP_zap_physmap 5
532 /* Assign machine page frame to dom0's pseudo physical address space. */
533 #define IA64_DOM0VP_add_physmap 6
535 /* expose the p2m table into domain */
536 #define IA64_DOM0VP_expose_p2m 7
538 /* xen perfmon */
539 #define IA64_DOM0VP_perfmon 8
541 /* gmfn version of IA64_DOM0VP_add_physmap */
542 #define IA64_DOM0VP_add_physmap_with_gmfn 9
544 /* get fpswa revision */
545 #define IA64_DOM0VP_fpswa_revision 10
547 /* Add an I/O port space range */
548 #define IA64_DOM0VP_add_io_space 11
550 // flags for page assignement to pseudo physical address space
551 #define _ASSIGN_readonly 0
552 #define ASSIGN_readonly (1UL << _ASSIGN_readonly)
553 #define ASSIGN_writable (0UL << _ASSIGN_readonly) // dummy flag
554 /* Internal only: memory attribute must be WC/UC/UCE. */
555 #define _ASSIGN_nocache 1
556 #define ASSIGN_nocache (1UL << _ASSIGN_nocache)
557 // tlb tracking
558 #define _ASSIGN_tlb_track 2
559 #define ASSIGN_tlb_track (1UL << _ASSIGN_tlb_track)
560 /* Internal only: associated with PGC_allocated bit */
561 #define _ASSIGN_pgc_allocated 3
562 #define ASSIGN_pgc_allocated (1UL << _ASSIGN_pgc_allocated)
564 /* This structure has the same layout of struct ia64_boot_param, defined in
565 <asm/system.h>. It is redefined here to ease use. */
566 struct xen_ia64_boot_param {
567 unsigned long command_line; /* physical address of cmd line args */
568 unsigned long efi_systab; /* physical address of EFI system table */
569 unsigned long efi_memmap; /* physical address of EFI memory map */
570 unsigned long efi_memmap_size; /* size of EFI memory map */
571 unsigned long efi_memdesc_size; /* size of an EFI memory map descriptor */
572 unsigned int efi_memdesc_version; /* memory descriptor version */
573 struct {
574 unsigned short num_cols; /* number of columns on console. */
575 unsigned short num_rows; /* number of rows on console. */
576 unsigned short orig_x; /* cursor's x position */
577 unsigned short orig_y; /* cursor's y position */
578 } console_info;
579 unsigned long fpswa; /* physical address of the fpswa interface */
580 unsigned long initrd_start;
581 unsigned long initrd_size;
582 unsigned long domain_start; /* va where the boot time domain begins */
583 unsigned long domain_size; /* how big is the boot domain */
584 };
586 #endif /* !__ASSEMBLY__ */
588 /* Size of the shared_info area (this is not related to page size). */
589 #define XSI_SHIFT 14
590 #define XSI_SIZE (1 << XSI_SHIFT)
591 /* Log size of mapped_regs area (64 KB - only 4KB is used). */
592 #define XMAPPEDREGS_SHIFT 12
593 #define XMAPPEDREGS_SIZE (1 << XMAPPEDREGS_SHIFT)
594 /* Offset of XASI (Xen arch shared info) wrt XSI_BASE. */
595 #define XMAPPEDREGS_OFS XSI_SIZE
597 /* Hyperprivops. */
598 #define HYPERPRIVOP_START 0x1
599 #define HYPERPRIVOP_RFI (HYPERPRIVOP_START + 0x0)
600 #define HYPERPRIVOP_RSM_DT (HYPERPRIVOP_START + 0x1)
601 #define HYPERPRIVOP_SSM_DT (HYPERPRIVOP_START + 0x2)
602 #define HYPERPRIVOP_COVER (HYPERPRIVOP_START + 0x3)
603 #define HYPERPRIVOP_ITC_D (HYPERPRIVOP_START + 0x4)
604 #define HYPERPRIVOP_ITC_I (HYPERPRIVOP_START + 0x5)
605 #define HYPERPRIVOP_SSM_I (HYPERPRIVOP_START + 0x6)
606 #define HYPERPRIVOP_GET_IVR (HYPERPRIVOP_START + 0x7)
607 #define HYPERPRIVOP_GET_TPR (HYPERPRIVOP_START + 0x8)
608 #define HYPERPRIVOP_SET_TPR (HYPERPRIVOP_START + 0x9)
609 #define HYPERPRIVOP_EOI (HYPERPRIVOP_START + 0xa)
610 #define HYPERPRIVOP_SET_ITM (HYPERPRIVOP_START + 0xb)
611 #define HYPERPRIVOP_THASH (HYPERPRIVOP_START + 0xc)
612 #define HYPERPRIVOP_PTC_GA (HYPERPRIVOP_START + 0xd)
613 #define HYPERPRIVOP_ITR_D (HYPERPRIVOP_START + 0xe)
614 #define HYPERPRIVOP_GET_RR (HYPERPRIVOP_START + 0xf)
615 #define HYPERPRIVOP_SET_RR (HYPERPRIVOP_START + 0x10)
616 #define HYPERPRIVOP_SET_KR (HYPERPRIVOP_START + 0x11)
617 #define HYPERPRIVOP_FC (HYPERPRIVOP_START + 0x12)
618 #define HYPERPRIVOP_GET_CPUID (HYPERPRIVOP_START + 0x13)
619 #define HYPERPRIVOP_GET_PMD (HYPERPRIVOP_START + 0x14)
620 #define HYPERPRIVOP_GET_EFLAG (HYPERPRIVOP_START + 0x15)
621 #define HYPERPRIVOP_SET_EFLAG (HYPERPRIVOP_START + 0x16)
622 #define HYPERPRIVOP_RSM_BE (HYPERPRIVOP_START + 0x17)
623 #define HYPERPRIVOP_GET_PSR (HYPERPRIVOP_START + 0x18)
624 #define HYPERPRIVOP_MAX (0x19)
626 /* Fast and light hypercalls. */
627 #define __HYPERVISOR_ia64_fast_eoi __HYPERVISOR_arch_1
629 /* Xencomm macros. */
630 #define XENCOMM_INLINE_MASK 0xf800000000000000UL
631 #define XENCOMM_INLINE_FLAG 0x8000000000000000UL
633 #define XENCOMM_IS_INLINE(addr) \
634 (((unsigned long)(addr) & XENCOMM_INLINE_MASK) == XENCOMM_INLINE_FLAG)
635 #define XENCOMM_INLINE_ADDR(addr) \
636 ((unsigned long)(addr) & ~XENCOMM_INLINE_MASK)
638 /* xen perfmon */
639 #ifdef XEN
640 #ifndef __ASSEMBLY__
641 #ifndef _ASM_IA64_PERFMON_H
643 #include <xen/list.h> // asm/perfmon.h requires struct list_head
644 #include <asm/perfmon.h>
645 // for PFM_xxx and pfarg_features_t, pfarg_context_t, pfarg_reg_t, pfarg_load_t
647 #endif /* _ASM_IA64_PERFMON_H */
649 DEFINE_XEN_GUEST_HANDLE(pfarg_features_t);
650 DEFINE_XEN_GUEST_HANDLE(pfarg_context_t);
651 DEFINE_XEN_GUEST_HANDLE(pfarg_reg_t);
652 DEFINE_XEN_GUEST_HANDLE(pfarg_load_t);
653 #endif /* __ASSEMBLY__ */
654 #endif /* XEN */
656 #endif /* __HYPERVISOR_IF_IA64_H__ */
658 /*
659 * Local variables:
660 * mode: C
661 * c-set-style: "BSD"
662 * c-basic-offset: 4
663 * tab-width: 4
664 * indent-tabs-mode: nil
665 * End:
666 */