ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-i386/mach-xen/asm/io.h @ 13341:3040ba0f2d3d

When booting via xm, only run the bootloader if it's in non-interactive mode:
otherwise we lose the user's named kernel and try to bootload the temporary
file pygrub returned.

Signed-off-by: John Levon <john.levon@sun.com>
author Tim Deegan <Tim.Deegan@xensource.com>
date Tue Jan 09 13:24:45 2007 +0000 (2007-01-09)
parents 395aa5609e6d
children 4fad820a2233
line source
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
4 #include <linux/config.h>
5 #include <linux/string.h>
6 #include <linux/compiler.h>
8 /*
9 * This file contains the definitions for the x86 IO instructions
10 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
11 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
12 * versions of the single-IO instructions (inb_p/inw_p/..).
13 *
14 * This file is not meant to be obfuscating: it's just complicated
15 * to (a) handle it all in a way that makes gcc able to optimize it
16 * as well as possible and (b) trying to avoid writing the same thing
17 * over and over again with slight variations and possibly making a
18 * mistake somewhere.
19 */
21 /*
22 * Thanks to James van Artsdalen for a better timing-fix than
23 * the two short jumps: using outb's to a nonexistent port seems
24 * to guarantee better timings even on fast machines.
25 *
26 * On the other hand, I'd like to be sure of a non-existent port:
27 * I feel a bit unsafe about using 0x80 (should be safe, though)
28 *
29 * Linus
30 */
32 /*
33 * Bit simplified and optimized by Jan Hubicka
34 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
35 *
36 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
37 * isa_read[wl] and isa_write[wl] fixed
38 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
39 */
41 #define IO_SPACE_LIMIT 0xffff
43 #define XQUAD_PORTIO_BASE 0xfe400000
44 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
46 #ifdef __KERNEL__
48 #include <asm-generic/iomap.h>
50 #include <linux/vmalloc.h>
51 #include <asm/fixmap.h>
53 /*
54 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
55 * access
56 */
57 #define xlate_dev_mem_ptr(p, sz) ioremap(p, sz)
58 #define xlate_dev_mem_ptr_unmap(p) iounmap(p)
60 /*
61 * Convert a virtual cached pointer to an uncached pointer
62 */
63 #define xlate_dev_kmem_ptr(p) p
65 /**
66 * virt_to_phys - map virtual addresses to physical
67 * @address: address to remap
68 *
69 * The returned physical address is the physical (CPU) mapping for
70 * the memory address given. It is only valid to use this function on
71 * addresses directly mapped or allocated via kmalloc.
72 *
73 * This function does not give bus mappings for DMA transfers. In
74 * almost all conceivable cases a device driver should not be using
75 * this function
76 */
78 static inline unsigned long virt_to_phys(volatile void * address)
79 {
80 return __pa(address);
81 }
83 /**
84 * phys_to_virt - map physical address to virtual
85 * @address: address to remap
86 *
87 * The returned virtual address is a current CPU mapping for
88 * the memory address given. It is only valid to use this function on
89 * addresses that have a kernel mapping
90 *
91 * This function does not handle bus mappings for DMA transfers. In
92 * almost all conceivable cases a device driver should not be using
93 * this function
94 */
96 static inline void * phys_to_virt(unsigned long address)
97 {
98 return __va(address);
99 }
101 /*
102 * Change "struct page" to physical address.
103 */
104 #define page_to_pseudophys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
105 #define page_to_phys(page) (phys_to_machine(page_to_pseudophys(page)))
106 #define page_to_bus(page) (phys_to_machine(page_to_pseudophys(page)))
108 #define bio_to_pseudophys(bio) (page_to_pseudophys(bio_page((bio))) + \
109 (unsigned long) bio_offset((bio)))
110 #define bvec_to_pseudophys(bv) (page_to_pseudophys((bv)->bv_page) + \
111 (unsigned long) (bv)->bv_offset)
113 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
114 (((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2))) && \
115 ((bvec_to_pseudophys((vec1)) + (vec1)->bv_len) == \
116 bvec_to_pseudophys((vec2))))
118 extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
120 /**
121 * ioremap - map bus memory into CPU space
122 * @offset: bus address of the memory
123 * @size: size of the resource to map
124 *
125 * ioremap performs a platform specific sequence of operations to
126 * make bus memory CPU accessible via the readb/readw/readl/writeb/
127 * writew/writel functions and the other mmio helpers. The returned
128 * address is not guaranteed to be usable directly as a virtual
129 * address.
130 */
132 static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
133 {
134 return __ioremap(offset, size, 0);
135 }
137 extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
138 extern void iounmap(volatile void __iomem *addr);
140 /*
141 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
142 * mappings, before the real ioremap() is functional.
143 * A boot-time mapping is currently limited to at most 16 pages.
144 */
145 extern void *bt_ioremap(unsigned long offset, unsigned long size);
146 extern void bt_iounmap(void *addr, unsigned long size);
148 /* Use early IO mappings for DMI because it's initialized early */
149 #define dmi_ioremap bt_ioremap
150 #define dmi_iounmap bt_iounmap
151 #define dmi_alloc alloc_bootmem
153 /*
154 * ISA I/O bus memory addresses are 1:1 with the physical address.
155 */
156 #define isa_virt_to_bus(_x) isa_virt_to_bus_is_UNSUPPORTED->x
157 #define isa_page_to_bus(_x) isa_page_to_bus_is_UNSUPPORTED->x
158 #define isa_bus_to_virt(_x) (void *)(__fix_to_virt(FIX_ISAMAP_BEGIN) + (_x))
160 /*
161 * However PCI ones are not necessarily 1:1 and therefore these interfaces
162 * are forbidden in portable PCI drivers.
163 *
164 * Allow them on x86 for legacy drivers, though.
165 */
166 #define virt_to_bus(_x) phys_to_machine(__pa(_x))
167 #define bus_to_virt(_x) __va(machine_to_phys(_x))
169 /*
170 * readX/writeX() are used to access memory mapped devices. On some
171 * architectures the memory mapped IO stuff needs to be accessed
172 * differently. On the x86 architecture, we just read/write the
173 * memory location directly.
174 */
176 static inline unsigned char readb(const volatile void __iomem *addr)
177 {
178 return *(volatile unsigned char __force *) addr;
179 }
180 static inline unsigned short readw(const volatile void __iomem *addr)
181 {
182 return *(volatile unsigned short __force *) addr;
183 }
184 static inline unsigned int readl(const volatile void __iomem *addr)
185 {
186 return *(volatile unsigned int __force *) addr;
187 }
188 #define readb_relaxed(addr) readb(addr)
189 #define readw_relaxed(addr) readw(addr)
190 #define readl_relaxed(addr) readl(addr)
191 #define __raw_readb readb
192 #define __raw_readw readw
193 #define __raw_readl readl
195 static inline void writeb(unsigned char b, volatile void __iomem *addr)
196 {
197 *(volatile unsigned char __force *) addr = b;
198 }
199 static inline void writew(unsigned short b, volatile void __iomem *addr)
200 {
201 *(volatile unsigned short __force *) addr = b;
202 }
203 static inline void writel(unsigned int b, volatile void __iomem *addr)
204 {
205 *(volatile unsigned int __force *) addr = b;
206 }
207 #define __raw_writeb writeb
208 #define __raw_writew writew
209 #define __raw_writel writel
211 #define mmiowb()
213 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
214 {
215 memset((void __force *) addr, val, count);
216 }
217 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
218 {
219 __memcpy(dst, (void __force *) src, count);
220 }
221 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
222 {
223 __memcpy((void __force *) dst, src, count);
224 }
226 /*
227 * ISA space is 'always mapped' on a typical x86 system, no need to
228 * explicitly ioremap() it. The fact that the ISA IO space is mapped
229 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
230 * are physical addresses. The following constant pointer can be
231 * used as the IO-area pointer (it can be iounmapped as well, so the
232 * analogy with PCI is quite large):
233 */
234 #define __ISA_IO_base ((char __iomem *)(fix_to_virt(FIX_ISAMAP_BEGIN)))
236 #define isa_readb(a) readb(__ISA_IO_base + (a))
237 #define isa_readw(a) readw(__ISA_IO_base + (a))
238 #define isa_readl(a) readl(__ISA_IO_base + (a))
239 #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
240 #define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
241 #define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
242 #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
243 #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
244 #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
247 /*
248 * Again, i386 does not require mem IO specific function.
249 */
251 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
252 #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(__ISA_IO_base + (b)),(c),(d))
254 /**
255 * check_signature - find BIOS signatures
256 * @io_addr: mmio address to check
257 * @signature: signature block
258 * @length: length of signature
259 *
260 * Perform a signature comparison with the mmio address io_addr. This
261 * address should have been obtained by ioremap.
262 * Returns 1 on a match.
263 */
265 static inline int check_signature(volatile void __iomem * io_addr,
266 const unsigned char *signature, int length)
267 {
268 int retval = 0;
269 do {
270 if (readb(io_addr) != *signature)
271 goto out;
272 io_addr++;
273 signature++;
274 length--;
275 } while (length);
276 retval = 1;
277 out:
278 return retval;
279 }
281 /*
282 * Cache management
283 *
284 * This needed for two cases
285 * 1. Out of order aware processors
286 * 2. Accidentally out of order processors (PPro errata #51)
287 */
289 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
291 static inline void flush_write_buffers(void)
292 {
293 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
294 }
296 #define dma_cache_inv(_start,_size) flush_write_buffers()
297 #define dma_cache_wback(_start,_size) flush_write_buffers()
298 #define dma_cache_wback_inv(_start,_size) flush_write_buffers()
300 #else
302 /* Nothing to do */
304 #define dma_cache_inv(_start,_size) do { } while (0)
305 #define dma_cache_wback(_start,_size) do { } while (0)
306 #define dma_cache_wback_inv(_start,_size) do { } while (0)
307 #define flush_write_buffers()
309 #endif
311 #endif /* __KERNEL__ */
313 #ifdef SLOW_IO_BY_JUMPING
314 #define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:"
315 #else
316 #define __SLOW_DOWN_IO "outb %%al,$0x80;"
317 #endif
319 static inline void slow_down_io(void) {
320 __asm__ __volatile__(
321 __SLOW_DOWN_IO
322 #ifdef REALLY_SLOW_IO
323 __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
324 #endif
325 : : );
326 }
328 #ifdef CONFIG_X86_NUMAQ
329 extern void *xquad_portio; /* Where the IO area was mapped */
330 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
331 #define __BUILDIO(bwl,bw,type) \
332 static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
333 if (xquad_portio) \
334 write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
335 else \
336 out##bwl##_local(value, port); \
337 } \
338 static inline void out##bwl(unsigned type value, int port) { \
339 out##bwl##_quad(value, port, 0); \
340 } \
341 static inline unsigned type in##bwl##_quad(int port, int quad) { \
342 if (xquad_portio) \
343 return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
344 else \
345 return in##bwl##_local(port); \
346 } \
347 static inline unsigned type in##bwl(int port) { \
348 return in##bwl##_quad(port, 0); \
349 }
350 #else
351 #define __BUILDIO(bwl,bw,type) \
352 static inline void out##bwl(unsigned type value, int port) { \
353 out##bwl##_local(value, port); \
354 } \
355 static inline unsigned type in##bwl(int port) { \
356 return in##bwl##_local(port); \
357 }
358 #endif
361 #define BUILDIO(bwl,bw,type) \
362 static inline void out##bwl##_local(unsigned type value, int port) { \
363 __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
364 } \
365 static inline unsigned type in##bwl##_local(int port) { \
366 unsigned type value; \
367 __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
368 return value; \
369 } \
370 static inline void out##bwl##_local_p(unsigned type value, int port) { \
371 out##bwl##_local(value, port); \
372 slow_down_io(); \
373 } \
374 static inline unsigned type in##bwl##_local_p(int port) { \
375 unsigned type value = in##bwl##_local(port); \
376 slow_down_io(); \
377 return value; \
378 } \
379 __BUILDIO(bwl,bw,type) \
380 static inline void out##bwl##_p(unsigned type value, int port) { \
381 out##bwl(value, port); \
382 slow_down_io(); \
383 } \
384 static inline unsigned type in##bwl##_p(int port) { \
385 unsigned type value = in##bwl(port); \
386 slow_down_io(); \
387 return value; \
388 } \
389 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
390 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
391 } \
392 static inline void ins##bwl(int port, void *addr, unsigned long count) { \
393 __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
394 }
396 BUILDIO(b,b,char)
397 BUILDIO(w,w,short)
398 BUILDIO(l,,int)
400 /* We will be supplying our own /dev/mem implementation */
401 #define ARCH_HAS_DEV_MEM
403 #endif