ia64/xen-unstable

view linux-2.6.11-xen-sparse/arch/xen/i386/Kconfig @ 4775:25570fbe05c7

bitkeeper revision 1.1389.5.17 (427a2e3dMxo6jmtcFafKR_cMZizuvw)

Merge firebug.cl.cam.ac.uk:/auto/groups/xeno-xenod/BK/xen-unstable.bk
into firebug.cl.cam.ac.uk:/local/scratch/cl349/xen-unstable.bk-clean
author cl349@firebug.cl.cam.ac.uk[cl349]
date Thu May 05 14:31:25 2005 +0000 (2005-05-05)
parents 86c325c8937a eadf34921bc5
children 39bfbd5ae9b8 487de0451d2b 72eae9faf952 78c364215cd6
line source
1 #
2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
4 #
6 menu "X86 Processor Configuration"
8 config XENARCH
9 string
10 default i386
12 config X86
13 bool
14 default y
15 help
16 This is Linux's home port. Linux was originally native to the Intel
17 386, and runs on all the later x86 processors including the Intel
18 486, 586, Pentiums, and various instruction-set-compatible chips by
19 AMD, Cyrix, and others.
21 config MMU
22 bool
23 default y
25 config SBUS
26 bool
28 config UID16
29 bool
30 default y
32 config GENERIC_ISA_DMA
33 bool
34 default y
36 config GENERIC_IOMAP
37 bool
38 default y
40 choice
41 prompt "Processor family"
42 default M686
44 config M386
45 bool "386"
46 ---help---
47 This is the processor type of your CPU. This information is used for
48 optimizing purposes. In order to compile a kernel that can run on
49 all x86 CPU types (albeit not optimally fast), you can specify
50 "386" here.
52 The kernel will not necessarily run on earlier architectures than
53 the one you have chosen, e.g. a Pentium optimized kernel will run on
54 a PPro, but not necessarily on a i486.
56 Here are the settings recommended for greatest speed:
57 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
58 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
59 will run on a 386 class machine.
60 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
61 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
62 - "586" for generic Pentium CPUs lacking the TSC
63 (time stamp counter) register.
64 - "Pentium-Classic" for the Intel Pentium.
65 - "Pentium-MMX" for the Intel Pentium MMX.
66 - "Pentium-Pro" for the Intel Pentium Pro.
67 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
68 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
69 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
70 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
71 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
72 - "Crusoe" for the Transmeta Crusoe series.
73 - "Efficeon" for the Transmeta Efficeon series.
74 - "Winchip-C6" for original IDT Winchip.
75 - "Winchip-2" for IDT Winchip 2.
76 - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
77 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
78 - "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above).
80 If you don't know what to do, choose "386".
82 config M486
83 bool "486"
84 help
85 Select this for a 486 series processor, either Intel or one of the
86 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
87 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
88 U5S.
90 config M586
91 bool "586/K5/5x86/6x86/6x86MX"
92 help
93 Select this for an 586 or 686 series processor such as the AMD K5,
94 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
95 assume the RDTSC (Read Time Stamp Counter) instruction.
97 config M586TSC
98 bool "Pentium-Classic"
99 help
100 Select this for a Pentium Classic processor with the RDTSC (Read
101 Time Stamp Counter) instruction for benchmarking.
103 config M586MMX
104 bool "Pentium-MMX"
105 help
106 Select this for a Pentium with the MMX graphics/multimedia
107 extended instructions.
109 config M686
110 bool "Pentium-Pro"
111 help
112 Select this for Intel Pentium Pro chips. This enables the use of
113 Pentium Pro extended instructions, and disables the init-time guard
114 against the f00f bug found in earlier Pentiums.
116 config MPENTIUMII
117 bool "Pentium-II/Celeron(pre-Coppermine)"
118 help
119 Select this for Intel chips based on the Pentium-II and
120 pre-Coppermine Celeron core. This option enables an unaligned
121 copy optimization, compiles the kernel with optimization flags
122 tailored for the chip, and applies any applicable Pentium Pro
123 optimizations.
125 config MPENTIUMIII
126 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
127 help
128 Select this for Intel chips based on the Pentium-III and
129 Celeron-Coppermine core. This option enables use of some
130 extended prefetch instructions in addition to the Pentium II
131 extensions.
133 config MPENTIUMM
134 bool "Pentium M"
135 help
136 Select this for Intel Pentium M (not Pentium-4 M)
137 notebook chips.
139 config MPENTIUM4
140 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/Xeon"
141 help
142 Select this for Intel Pentium 4 chips. This includes the
143 Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
144 (not Pentium M) chips. This option enables compile flags
145 optimized for the chip, uses the correct cache shift, and
146 applies any applicable Pentium III optimizations.
148 config MK6
149 bool "K6/K6-II/K6-III"
150 help
151 Select this for an AMD K6-family processor. Enables use of
152 some extended instructions, and passes appropriate optimization
153 flags to GCC.
155 config MK7
156 bool "Athlon/Duron/K7"
157 help
158 Select this for an AMD Athlon K7-family processor. Enables use of
159 some extended instructions, and passes appropriate optimization
160 flags to GCC.
162 config MK8
163 bool "Opteron/Athlon64/Hammer/K8"
164 help
165 Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
166 use of some extended instructions, and passes appropriate optimization
167 flags to GCC.
169 config MCRUSOE
170 bool "Crusoe"
171 help
172 Select this for a Transmeta Crusoe processor. Treats the processor
173 like a 586 with TSC, and sets some GCC optimization flags (like a
174 Pentium Pro with no alignment requirements).
176 config MEFFICEON
177 bool "Efficeon"
178 help
179 Select this for a Transmeta Efficeon processor.
181 config MWINCHIPC6
182 bool "Winchip-C6"
183 help
184 Select this for an IDT Winchip C6 chip. Linux and GCC
185 treat this chip as a 586TSC with some extended instructions
186 and alignment requirements.
188 config MWINCHIP2
189 bool "Winchip-2"
190 help
191 Select this for an IDT Winchip-2. Linux and GCC
192 treat this chip as a 586TSC with some extended instructions
193 and alignment requirements.
195 config MWINCHIP3D
196 bool "Winchip-2A/Winchip-3"
197 help
198 Select this for an IDT Winchip-2A or 3. Linux and GCC
199 treat this chip as a 586TSC with some extended instructions
200 and alignment reqirements. Also enable out of order memory
201 stores for this CPU, which can increase performance of some
202 operations.
204 config MCYRIXIII
205 bool "CyrixIII/VIA-C3"
206 help
207 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
208 treat this chip as a generic 586. Whilst the CPU is 686 class,
209 it lacks the cmov extension which gcc assumes is present when
210 generating 686 code.
211 Note that Nehemiah (Model 9) and above will not boot with this
212 kernel due to them lacking the 3DNow! instructions used in earlier
213 incarnations of the CPU.
215 config MVIAC3_2
216 bool "VIA C3-2 (Nehemiah)"
217 help
218 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
219 of SSE and tells gcc to treat the CPU as a 686.
220 Note, this kernel will not boot on older (pre model 9) C3s.
222 endchoice
224 config X86_GENERIC
225 bool "Generic x86 support"
226 help
227 Instead of just including optimizations for the selected
228 x86 variant (e.g. PII, Crusoe or Athlon), include some more
229 generic optimizations as well. This will make the kernel
230 perform better on x86 CPUs other than that selected.
232 This is really intended for distributors who need more
233 generic optimizations.
235 #
236 # Define implied options from the CPU selection here
237 #
238 config X86_CMPXCHG
239 bool
240 depends on !M386
241 default y
243 config X86_XADD
244 bool
245 depends on !M386
246 default y
248 config X86_L1_CACHE_SHIFT
249 int
250 default "7" if MPENTIUM4 || X86_GENERIC
251 default "4" if X86_ELAN || M486 || M386
252 default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2
253 default "6" if MK7 || MK8 || MPENTIUMM
255 config RWSEM_GENERIC_SPINLOCK
256 bool
257 depends on M386
258 default y
260 config RWSEM_XCHGADD_ALGORITHM
261 bool
262 depends on !M386
263 default y
265 config GENERIC_CALIBRATE_DELAY
266 bool
267 default y
269 config X86_PPRO_FENCE
270 bool
271 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386
272 default y
274 config X86_F00F_BUG
275 bool
276 depends on M586MMX || M586TSC || M586 || M486 || M386
277 default y
279 config X86_WP_WORKS_OK
280 bool
281 depends on !M386
282 default y
284 config X86_INVLPG
285 bool
286 depends on !M386
287 default y
289 config X86_BSWAP
290 bool
291 depends on !M386
292 default y
294 config X86_POPAD_OK
295 bool
296 depends on !M386
297 default y
299 config X86_ALIGNMENT_16
300 bool
301 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2
302 default y
304 config X86_GOOD_APIC
305 bool
306 depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON
307 default y
309 config X86_INTEL_USERCOPY
310 bool
311 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON
312 default y
314 config X86_USE_PPRO_CHECKSUM
315 bool
316 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON
317 default y
319 config X86_USE_3DNOW
320 bool
321 depends on MCYRIXIII || MK7
322 default y
324 config X86_OOSTORE
325 bool
326 depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
327 default y
329 config HPET_TIMER
330 bool
331 default n
332 #config HPET_TIMER
333 # bool "HPET Timer Support"
334 # help
335 # This enables the use of the HPET for the kernel's internal timer.
336 # HPET is the next generation timer replacing legacy 8254s.
337 # You can safely choose Y here. However, HPET will only be
338 # activated if the platform and the BIOS support this feature.
339 # Otherwise the 8254 will be used for timing services.
340 #
341 # Choose N to continue using the legacy 8254 timer.
343 config HPET_EMULATE_RTC
344 def_bool HPET_TIMER && RTC=y
346 config SMP
347 bool "Symmetric multi-processing support"
348 ---help---
349 This enables support for systems with more than one CPU. If you have
350 a system with only one CPU, like most personal computers, say N. If
351 you have a system with more than one CPU, say Y.
353 If you say N here, the kernel will run on single and multiprocessor
354 machines, but will use only one CPU of a multiprocessor machine. If
355 you say Y here, the kernel will run on many, but not all,
356 singleprocessor machines. On a singleprocessor machine, the kernel
357 will run faster if you say N here.
359 Note that if you say Y here and choose architecture "586" or
360 "Pentium" under "Processor family", the kernel will not work on 486
361 architectures. Similarly, multiprocessor kernels for the "PPro"
362 architecture may not work on all Pentium based boards.
364 People using multiprocessor machines who say Y here should also say
365 Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
366 Management" code will be disabled if you say Y here.
368 See also the <file:Documentation/smp.txt>,
369 <file:Documentation/i386/IO-APIC.txt>,
370 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
371 <http://www.tldp.org/docs.html#howto>.
373 If you don't know what to do here, say N.
375 config NR_CPUS
376 int "Maximum number of CPUs (2-255)"
377 range 2 255
378 depends on SMP
379 default "32" if X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000
380 default "8"
381 help
382 This allows you to specify the maximum number of CPUs which this
383 kernel will support. The maximum supported value is 255 and the
384 minimum value which makes sense is 2.
386 This is purely to save memory - each supported CPU adds
387 approximately eight kilobytes to the kernel image.
389 config SCHED_SMT
390 bool "SMT (Hyperthreading) scheduler support"
391 depends on SMP
392 default off
393 help
394 SMT scheduler support improves the CPU scheduler's decision making
395 when dealing with Intel Pentium 4 chips with HyperThreading at a
396 cost of slightly increased overhead in some places. If unsure say
397 N here.
399 config PREEMPT
400 bool "Preemptible Kernel"
401 help
402 This option reduces the latency of the kernel when reacting to
403 real-time or interactive events by allowing a low priority process to
404 be preempted even if it is in kernel mode executing a system call.
405 This allows applications to run more reliably even when the system is
406 under load.
408 Say Y here if you are building a kernel for a desktop, embedded
409 or real-time system. Say N if you are unsure.
411 config PREEMPT_BKL
412 bool "Preempt The Big Kernel Lock"
413 depends on PREEMPT
414 default y
415 help
416 This option reduces the latency of the kernel by making the
417 big kernel lock preemptible.
419 Say Y here if you are building a kernel for a desktop system.
420 Say N if you are unsure.
422 #config X86_TSC
423 # bool
424 # depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2) && !X86_NUMAQ
425 # default y
427 #config X86_MCE
428 # bool "Machine Check Exception"
429 # depends on !X86_VOYAGER
430 # ---help---
431 # Machine Check Exception support allows the processor to notify the
432 # kernel if it detects a problem (e.g. overheating, component failure).
433 # The action the kernel takes depends on the severity of the problem,
434 # ranging from a warning message on the console, to halting the machine.
435 # Your processor must be a Pentium or newer to support this - check the
436 # flags in /proc/cpuinfo for mce. Note that some older Pentium systems
437 # have a design flaw which leads to false MCE events - hence MCE is
438 # disabled on all P5 processors, unless explicitly enabled with "mce"
439 # as a boot argument. Similarly, if MCE is built in and creates a
440 # problem on some new non-standard machine, you can boot with "nomce"
441 # to disable it. MCE support simply ignores non-MCE processors like
442 # the 386 and 486, so nearly everyone can say Y here.
444 #config X86_MCE_NONFATAL
445 # tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
446 # depends on X86_MCE
447 # help
448 # Enabling this feature starts a timer that triggers every 5 seconds which
449 # will look at the machine check registers to see if anything happened.
450 # Non-fatal problems automatically get corrected (but still logged).
451 # Disable this if you don't want to see these messages.
452 # Seeing the messages this option prints out may be indicative of dying hardware,
453 # or out-of-spec (ie, overclocked) hardware.
454 # This option only does something on certain CPUs.
455 # (AMD Athlon/Duron and Intel Pentium 4)
457 #config X86_MCE_P4THERMAL
458 # bool "check for P4 thermal throttling interrupt."
459 # depends on X86_MCE && (X86_UP_APIC || SMP)
460 # help
461 # Enabling this feature will cause a message to be printed when the P4
462 # enters thermal throttling.
464 config MICROCODE
465 tristate "/dev/cpu/microcode - Intel IA32 CPU microcode support"
466 depends on XEN_PRIVILEGED_GUEST
467 ---help---
468 If you say Y here and also to "/dev file system support" in the
469 'File systems' section, you will be able to update the microcode on
470 Intel processors in the IA32 family, e.g. Pentium Pro, Pentium II,
471 Pentium III, Pentium 4, Xeon etc. You will obviously need the
472 actual microcode binary data itself which is not shipped with the
473 Linux kernel.
475 For latest news and information on obtaining all the required
476 ingredients for this driver, check:
477 <http://www.urbanmyth.org/microcode/>.
479 To compile this driver as a module, choose M here: the
480 module will be called microcode.
482 #config X86_MSR
483 # tristate "/dev/cpu/*/msr - Model-specific register support"
484 # help
485 # This device gives privileged processes access to the x86
486 # Model-Specific Registers (MSRs). It is a character device with
487 # major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
488 # MSR accesses are directed to a specific CPU on multi-processor
489 # systems.
491 config X86_CPUID
492 tristate "/dev/cpu/*/cpuid - CPU information support"
493 help
494 This device gives processes access to the x86 CPUID instruction to
495 be executed on a specific processor. It is a character device
496 with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
497 /dev/cpu/31/cpuid.
499 source "drivers/firmware/Kconfig"
501 choice
502 prompt "High Memory Support"
503 default NOHIGHMEM
505 config NOHIGHMEM
506 bool "off"
507 ---help---
508 Linux can use up to 64 Gigabytes of physical memory on x86 systems.
509 However, the address space of 32-bit x86 processors is only 4
510 Gigabytes large. That means that, if you have a large amount of
511 physical memory, not all of it can be "permanently mapped" by the
512 kernel. The physical memory that's not permanently mapped is called
513 "high memory".
515 If you are compiling a kernel which will never run on a machine with
516 more than 1 Gigabyte total physical RAM, answer "off" here (default
517 choice and suitable for most users). This will result in a "3GB/1GB"
518 split: 3GB are mapped so that each process sees a 3GB virtual memory
519 space and the remaining part of the 4GB virtual memory space is used
520 by the kernel to permanently map as much physical memory as
521 possible.
523 If the machine has between 1 and 4 Gigabytes physical RAM, then
524 answer "4GB" here.
526 If more than 4 Gigabytes is used then answer "64GB" here. This
527 selection turns Intel PAE (Physical Address Extension) mode on.
528 PAE implements 3-level paging on IA32 processors. PAE is fully
529 supported by Linux, PAE mode is implemented on all recent Intel
530 processors (Pentium Pro and better). NOTE: If you say "64GB" here,
531 then the kernel will not boot on CPUs that don't support PAE!
533 The actual amount of total physical memory will either be
534 auto detected or can be forced by using a kernel command line option
535 such as "mem=256M". (Try "man bootparam" or see the documentation of
536 your boot loader (lilo or loadlin) about how to pass options to the
537 kernel at boot time.)
539 If unsure, say "off".
541 config HIGHMEM4G
542 bool "4GB"
543 help
544 Select this if you have a 32-bit processor and between 1 and 4
545 gigabytes of physical RAM.
547 #config HIGHMEM64G
548 # bool "64GB"
549 # help
550 # Select this if you have a 32-bit processor and more than 4
551 # gigabytes of physical RAM.
553 endchoice
555 config HIGHMEM
556 bool
557 depends on HIGHMEM64G || HIGHMEM4G
558 default y
560 config X86_PAE
561 bool
562 depends on HIGHMEM64G
563 default y
565 # Common NUMA Features
566 config NUMA
567 bool "Numa Memory Allocation and Scheduler Support"
568 depends on SMP && HIGHMEM64G && (X86_NUMAQ || X86_GENERICARCH || (X86_SUMMIT && ACPI))
569 default n if X86_PC
570 default y if (X86_NUMAQ || X86_SUMMIT)
572 # Need comments to help the hapless user trying to turn on NUMA support
573 comment "NUMA (NUMA-Q) requires SMP, 64GB highmem support"
574 depends on X86_NUMAQ && (!HIGHMEM64G || !SMP)
576 comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI"
577 depends on X86_SUMMIT && (!HIGHMEM64G || !ACPI)
579 config DISCONTIGMEM
580 bool
581 depends on NUMA
582 default y
584 config HAVE_ARCH_BOOTMEM_NODE
585 bool
586 depends on NUMA
587 default y
589 #config HIGHPTE
590 # bool "Allocate 3rd-level pagetables from highmem"
591 # depends on HIGHMEM4G || HIGHMEM64G
592 # help
593 # The VM uses one page table entry for each page of physical memory.
594 # For systems with a lot of RAM, this can be wasteful of precious
595 # low memory. Setting this option will put user-space page table
596 # entries in high memory.
598 config MTRR
599 bool
600 depends on XEN_PRIVILEGED_GUEST
601 default y
603 #config MTRR
604 # bool "MTRR (Memory Type Range Register) support"
605 # ---help---
606 # On Intel P6 family processors (Pentium Pro, Pentium II and later)
607 # the Memory Type Range Registers (MTRRs) may be used to control
608 # processor access to memory ranges. This is most useful if you have
609 # a video (VGA) card on a PCI or AGP bus. Enabling write-combining
610 # allows bus write transfers to be combined into a larger transfer
611 # before bursting over the PCI/AGP bus. This can increase performance
612 # of image write operations 2.5 times or more. Saying Y here creates a
613 # /proc/mtrr file which may be used to manipulate your processor's
614 # MTRRs. Typically the X server should use this.
615 #
616 # This code has a reasonably generic interface so that similar
617 # control registers on other processors can be easily supported
618 # as well:
619 #
620 # The Cyrix 6x86, 6x86MX and M II processors have Address Range
621 # Registers (ARRs) which provide a similar functionality to MTRRs. For
622 # these, the ARRs are used to emulate the MTRRs.
623 # The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
624 # MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
625 # write-combining. All of these processors are supported by this code
626 # and it makes sense to say Y here if you have one of them.
627 #
628 # Saying Y here also fixes a problem with buggy SMP BIOSes which only
629 # set the MTRRs for the boot CPU and not for the secondary CPUs. This
630 # can lead to all sorts of problems, so it's good to say Y here.
631 #
632 # You can safely say Y even if your machine doesn't have MTRRs, you'll
633 # just add about 9 KB to your kernel.
634 #
635 # See <file:Documentation/mtrr.txt> for more information.
637 config IRQBALANCE
638 bool "Enable kernel irq balancing"
639 depends on SMP && X86_IO_APIC
640 default y
641 help
642 The default yes will allow the kernel to do irq load balancing.
643 Saying no will keep the kernel from doing irq load balancing.
645 config HAVE_DEC_LOCK
646 bool
647 depends on (SMP || PREEMPT) && X86_CMPXCHG
648 default y
650 # turning this on wastes a bunch of space.
651 # Summit needs it only when NUMA is on
652 config BOOT_IOREMAP
653 bool
654 depends on (((X86_SUMMIT || X86_GENERICARCH) && NUMA) || (X86 && EFI))
655 default y
657 config REGPARM
658 bool "Use register arguments (EXPERIMENTAL)"
659 depends on EXPERIMENTAL
660 default n
661 help
662 Compile the kernel with -mregparm=3. This uses a different ABI
663 and passes the first three arguments of a function call in registers.
664 This will probably break binary only modules.
666 This feature is only enabled for gcc-3.0 and later - earlier compilers
667 generate incorrect output with certain kernel constructs when
668 -mregparm=3 is used.
670 config X86_LOCAL_APIC
671 bool
672 depends on !SMP && X86_UP_APIC
673 default y
675 config X86_IO_APIC
676 bool
677 depends on !SMP && X86_UP_IOAPIC
678 default y
680 if XEN_PHYSDEV_ACCESS
682 menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
684 config X86_VISWS_APIC
685 bool
686 depends on X86_VISWS
687 default y
689 config X86_LOCAL_APIC
690 bool
691 depends on (X86_VISWS || SMP) && !X86_VOYAGER
692 default y
694 config X86_UP_APIC
695 bool "Local APIC support on uniprocessors" if !SMP
696 depends on !(X86_VISWS || X86_VOYAGER)
697 ---help---
698 A local APIC (Advanced Programmable Interrupt Controller) is an
699 integrated interrupt controller in the CPU. If you have a single-CPU
700 system which has a processor with a local APIC, you can say Y here to
701 enable and use it. If you say Y here even though your machine doesn't
702 have a local APIC, then the kernel will still run with no slowdown at
703 all. The local APIC supports CPU-generated self-interrupts (timer,
704 performance counters), and the NMI watchdog which detects hard
705 lockups.
707 If you have a system with several CPUs, you do not need to say Y
708 here: the local APIC will be used automatically.
710 config X86_UP_IOAPIC
711 bool "IO-APIC support on uniprocessors"
712 depends on !SMP && X86_UP_APIC
713 help
714 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
715 SMP-capable replacement for PC-style interrupt controllers. Most
716 SMP systems and a small number of uniprocessor systems have one.
717 If you have a single-CPU system with an IO-APIC, you can say Y here
718 to use it. If you say Y here even though your machine doesn't have
719 an IO-APIC, then the kernel will still run with no slowdown at all.
721 If you have a system with several CPUs, you do not need to say Y
722 here: the IO-APIC will be used automatically.
724 config X86_IO_APIC
725 bool
726 depends on SMP && !(X86_VISWS || X86_VOYAGER)
727 default y
729 config PCI
730 bool "PCI support" if !X86_VISWS
731 depends on !X86_VOYAGER
732 default y if X86_VISWS
733 help
734 Find out whether you have a PCI motherboard. PCI is the name of a
735 bus system, i.e. the way the CPU talks to the other stuff inside
736 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
737 VESA. If you have PCI, say Y, otherwise N.
739 The PCI-HOWTO, available from
740 <http://www.tldp.org/docs.html#howto>, contains valuable
741 information about which PCI hardware does work under Linux and which
742 doesn't.
744 choice
745 prompt "PCI access mode"
746 depends on PCI && !X86_VISWS
747 default PCI_GOANY
748 ---help---
749 On PCI systems, the BIOS can be used to detect the PCI devices and
750 determine their configuration. However, some old PCI motherboards
751 have BIOS bugs and may crash if this is done. Also, some embedded
752 PCI-based systems don't have any BIOS at all. Linux can also try to
753 detect the PCI hardware directly without using the BIOS.
755 With this option, you can specify how Linux should detect the
756 PCI devices. If you choose "BIOS", the BIOS will be used,
757 if you choose "Direct", the BIOS won't be used, and if you
758 choose "MMConfig", then PCI Express MMCONFIG will be used.
759 If you choose "Any", the kernel will try MMCONFIG, then the
760 direct access method and falls back to the BIOS if that doesn't
761 work. If unsure, go with the default, which is "Any".
763 config PCI_GOBIOS
764 bool "BIOS"
766 config PCI_GOMMCONFIG
767 bool "MMConfig"
769 config PCI_GODIRECT
770 bool "Direct"
772 config PCI_GOANY
773 bool "Any"
775 endchoice
777 config PCI_BIOS
778 bool
779 depends on !X86_VISWS && PCI && (PCI_GOBIOS || PCI_GOANY)
780 default y
782 config PCI_DIRECT
783 bool
784 depends on PCI && ((PCI_GODIRECT || PCI_GOANY) || X86_VISWS)
785 default y
787 config PCI_MMCONFIG
788 bool
789 depends on PCI && (PCI_GOMMCONFIG || (PCI_GOANY && ACPI))
790 select ACPI_BOOT
791 default y
793 source "drivers/pci/pcie/Kconfig"
795 source "drivers/pci/Kconfig"
797 config ISA
798 bool "ISA support"
799 depends on !(X86_VOYAGER || X86_VISWS)
800 help
801 Find out whether you have ISA slots on your motherboard. ISA is the
802 name of a bus system, i.e. the way the CPU talks to the other stuff
803 inside your box. Other bus systems are PCI, EISA, MicroChannel
804 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
805 newer boards don't support it. If you have ISA, say Y, otherwise N.
807 config EISA
808 bool "EISA support"
809 depends on ISA
810 ---help---
811 The Extended Industry Standard Architecture (EISA) bus was
812 developed as an open alternative to the IBM MicroChannel bus.
814 The EISA bus provided some of the features of the IBM MicroChannel
815 bus while maintaining backward compatibility with cards made for
816 the older ISA bus. The EISA bus saw limited use between 1988 and
817 1995 when it was made obsolete by the PCI bus.
819 Say Y here if you are building a kernel for an EISA-based machine.
821 Otherwise, say N.
823 source "drivers/eisa/Kconfig"
825 config MCA
826 bool "MCA support"
827 depends on !(X86_VISWS || X86_VOYAGER)
828 help
829 MicroChannel Architecture is found in some IBM PS/2 machines and
830 laptops. It is a bus system similar to PCI or ISA. See
831 <file:Documentation/mca.txt> (and especially the web page given
832 there) before attempting to build an MCA bus kernel.
834 config MCA
835 depends on X86_VOYAGER
836 default y if X86_VOYAGER
838 source "drivers/mca/Kconfig"
840 config SCx200
841 tristate "NatSemi SCx200 support"
842 depends on !X86_VOYAGER
843 help
844 This provides basic support for the National Semiconductor SCx200
845 processor. Right now this is just a driver for the GPIO pins.
847 If you don't know what to do here, say N.
849 This support is also available as a module. If compiled as a
850 module, it will be called scx200.
852 source "drivers/pcmcia/Kconfig"
854 source "drivers/pci/hotplug/Kconfig"
856 endmenu
858 endif
860 source "arch/i386/Kconfig.debug"
862 #
863 # Use the generic interrupt handling code in kernel/irq/:
864 #
865 config GENERIC_HARDIRQS
866 bool
867 default y
869 config GENERIC_IRQ_PROBE
870 bool
871 default y
873 config X86_SMP
874 bool
875 depends on SMP && !X86_VOYAGER
876 default y
878 #config X86_HT
879 # bool
880 # depends on SMP && !(X86_VISWS || X86_VOYAGER)
881 # default y
883 config X86_BIOS_REBOOT
884 bool
885 depends on !(X86_VISWS || X86_VOYAGER)
886 default y
888 config X86_TRAMPOLINE
889 bool
890 depends on X86_SMP || (X86_VOYAGER && SMP)
891 default y
893 config PC
894 bool
895 depends on X86 && !EMBEDDED
896 default y
898 endmenu