ia64/xen-unstable

view xen/arch/x86/domain.c @ 14107:1e5a83fb928b

xen memory allocator: Allow per-domain bitwidth restrictions.
Original patch by Jan Beulich <jbeulich@novell.com>
Signed-off-by: Keir Fraser <keir@xensource.com>
author Keir Fraser <keir@xensource.com>
date Sat Feb 24 13:57:34 2007 +0000 (2007-02-24)
parents 6daa91dc9247
children 5943a8314d69
line source
1 /******************************************************************************
2 * arch/x86/domain.c
3 *
4 * x86-specific domain handling (e.g., register setup and context switching).
5 */
7 /*
8 * Copyright (C) 1995 Linus Torvalds
9 *
10 * Pentium III FXSR, SSE support
11 * Gareth Hughes <gareth@valinux.com>, May 2000
12 */
14 #include <xen/config.h>
15 #include <xen/init.h>
16 #include <xen/lib.h>
17 #include <xen/errno.h>
18 #include <xen/sched.h>
19 #include <xen/domain.h>
20 #include <xen/smp.h>
21 #include <xen/delay.h>
22 #include <xen/softirq.h>
23 #include <xen/grant_table.h>
24 #include <xen/iocap.h>
25 #include <xen/kernel.h>
26 #include <xen/multicall.h>
27 #include <xen/irq.h>
28 #include <xen/event.h>
29 #include <xen/console.h>
30 #include <xen/percpu.h>
31 #include <asm/regs.h>
32 #include <asm/mc146818rtc.h>
33 #include <asm/system.h>
34 #include <asm/io.h>
35 #include <asm/processor.h>
36 #include <asm/desc.h>
37 #include <asm/i387.h>
38 #include <asm/mpspec.h>
39 #include <asm/ldt.h>
40 #include <asm/paging.h>
41 #include <asm/hvm/hvm.h>
42 #include <asm/hvm/support.h>
43 #include <asm/msr.h>
44 #ifdef CONFIG_COMPAT
45 #include <compat/vcpu.h>
46 #endif
48 DEFINE_PER_CPU(struct vcpu *, curr_vcpu);
50 static void paravirt_ctxt_switch_from(struct vcpu *v);
51 static void paravirt_ctxt_switch_to(struct vcpu *v);
53 static void vcpu_destroy_pagetables(struct vcpu *v);
55 static void continue_idle_domain(struct vcpu *v)
56 {
57 reset_stack_and_jump(idle_loop);
58 }
60 static void continue_nonidle_domain(struct vcpu *v)
61 {
62 reset_stack_and_jump(ret_from_intr);
63 }
65 static void default_idle(void)
66 {
67 local_irq_disable();
68 if ( !softirq_pending(smp_processor_id()) )
69 safe_halt();
70 else
71 local_irq_enable();
72 }
74 void idle_loop(void)
75 {
76 for ( ; ; )
77 {
78 page_scrub_schedule_work();
79 default_idle();
80 do_softirq();
81 }
82 }
84 void startup_cpu_idle_loop(void)
85 {
86 struct vcpu *v = current;
88 ASSERT(is_idle_vcpu(v));
89 cpu_set(smp_processor_id(), v->domain->domain_dirty_cpumask);
90 cpu_set(smp_processor_id(), v->vcpu_dirty_cpumask);
92 reset_stack_and_jump(idle_loop);
93 }
95 void dump_pageframe_info(struct domain *d)
96 {
97 struct page_info *page;
99 printk("Memory pages belonging to domain %u:\n", d->domain_id);
101 if ( d->tot_pages >= 10 )
102 {
103 printk(" DomPage list too long to display\n");
104 }
105 else
106 {
107 list_for_each_entry ( page, &d->page_list, list )
108 {
109 printk(" DomPage %p: mfn=%p, caf=%08x, taf=%" PRtype_info "\n",
110 _p(page_to_maddr(page)), _p(page_to_mfn(page)),
111 page->count_info, page->u.inuse.type_info);
112 }
113 }
115 list_for_each_entry ( page, &d->xenpage_list, list )
116 {
117 printk(" XenPage %p: mfn=%p, caf=%08x, taf=%" PRtype_info "\n",
118 _p(page_to_maddr(page)), _p(page_to_mfn(page)),
119 page->count_info, page->u.inuse.type_info);
120 }
121 }
123 struct vcpu *alloc_vcpu_struct(void)
124 {
125 struct vcpu *v;
126 if ( (v = xmalloc(struct vcpu)) != NULL )
127 memset(v, 0, sizeof(*v));
128 return v;
129 }
131 void free_vcpu_struct(struct vcpu *v)
132 {
133 xfree(v);
134 }
136 #ifdef CONFIG_COMPAT
138 int setup_arg_xlat_area(struct vcpu *v, l4_pgentry_t *l4tab)
139 {
140 struct domain *d = v->domain;
141 unsigned i;
142 struct page_info *pg;
144 if ( !d->arch.mm_arg_xlat_l3 )
145 {
146 pg = alloc_domheap_page(NULL);
147 if ( !pg )
148 return -ENOMEM;
149 d->arch.mm_arg_xlat_l3 = clear_page(page_to_virt(pg));
150 }
152 l4tab[l4_table_offset(COMPAT_ARG_XLAT_VIRT_BASE)] =
153 l4e_from_paddr(__pa(d->arch.mm_arg_xlat_l3), __PAGE_HYPERVISOR);
155 for ( i = 0; i < COMPAT_ARG_XLAT_PAGES; ++i )
156 {
157 unsigned long va = COMPAT_ARG_XLAT_VIRT_START(v->vcpu_id) + i * PAGE_SIZE;
158 l2_pgentry_t *l2tab;
159 l1_pgentry_t *l1tab;
161 if ( !l3e_get_intpte(d->arch.mm_arg_xlat_l3[l3_table_offset(va)]) )
162 {
163 pg = alloc_domheap_page(NULL);
164 if ( !pg )
165 return -ENOMEM;
166 clear_page(page_to_virt(pg));
167 d->arch.mm_arg_xlat_l3[l3_table_offset(va)] = l3e_from_page(pg, __PAGE_HYPERVISOR);
168 }
169 l2tab = l3e_to_l2e(d->arch.mm_arg_xlat_l3[l3_table_offset(va)]);
170 if ( !l2e_get_intpte(l2tab[l2_table_offset(va)]) )
171 {
172 pg = alloc_domheap_page(NULL);
173 if ( !pg )
174 return -ENOMEM;
175 clear_page(page_to_virt(pg));
176 l2tab[l2_table_offset(va)] = l2e_from_page(pg, __PAGE_HYPERVISOR);
177 }
178 l1tab = l2e_to_l1e(l2tab[l2_table_offset(va)]);
179 BUG_ON(l1e_get_intpte(l1tab[l1_table_offset(va)]));
180 pg = alloc_domheap_page(NULL);
181 if ( !pg )
182 return -ENOMEM;
183 l1tab[l1_table_offset(va)] = l1e_from_page(pg, PAGE_HYPERVISOR);
184 }
186 return 0;
187 }
189 static void release_arg_xlat_area(struct domain *d)
190 {
191 if ( d->arch.mm_arg_xlat_l3 )
192 {
193 unsigned l3;
195 for ( l3 = 0; l3 < L3_PAGETABLE_ENTRIES; ++l3 )
196 {
197 if ( l3e_get_intpte(d->arch.mm_arg_xlat_l3[l3]) )
198 {
199 l2_pgentry_t *l2tab = l3e_to_l2e(d->arch.mm_arg_xlat_l3[l3]);
200 unsigned l2;
202 for ( l2 = 0; l2 < L2_PAGETABLE_ENTRIES; ++l2 )
203 {
204 if ( l2e_get_intpte(l2tab[l2]) )
205 {
206 l1_pgentry_t *l1tab = l2e_to_l1e(l2tab[l2]);
207 unsigned l1;
209 for ( l1 = 0; l1 < L1_PAGETABLE_ENTRIES; ++l1 )
210 {
211 if ( l1e_get_intpte(l1tab[l1]) )
212 free_domheap_page(l1e_get_page(l1tab[l1]));
213 }
214 free_domheap_page(l2e_get_page(l2tab[l2]));
215 }
216 }
217 free_domheap_page(l3e_get_page(d->arch.mm_arg_xlat_l3[l3]));
218 }
219 }
220 free_domheap_page(virt_to_page(d->arch.mm_arg_xlat_l3));
221 }
222 }
224 static int setup_compat_l4(struct vcpu *v)
225 {
226 struct page_info *pg = alloc_domheap_page(NULL);
227 l4_pgentry_t *l4tab;
228 int rc;
230 if ( !pg )
231 return -ENOMEM;
232 l4tab = copy_page(page_to_virt(pg), idle_pg_table);
233 l4tab[l4_table_offset(LINEAR_PT_VIRT_START)] =
234 l4e_from_page(pg, __PAGE_HYPERVISOR);
235 l4tab[l4_table_offset(PERDOMAIN_VIRT_START)] =
236 l4e_from_paddr(__pa(v->domain->arch.mm_perdomain_l3), __PAGE_HYPERVISOR);
237 v->arch.guest_table = pagetable_from_page(pg);
238 v->arch.guest_table_user = v->arch.guest_table;
240 if ( (rc = setup_arg_xlat_area(v, l4tab)) < 0 )
241 {
242 free_domheap_page(pg);
243 return rc;
244 }
246 return 0;
247 }
249 static void release_compat_l4(struct vcpu *v)
250 {
251 free_domheap_page(pagetable_get_page(v->arch.guest_table));
252 v->arch.guest_table = pagetable_null();
253 v->arch.guest_table_user = pagetable_null();
254 }
256 static inline int may_switch_mode(struct domain *d)
257 {
258 return (d->tot_pages == 0);
259 }
261 int switch_native(struct domain *d)
262 {
263 l1_pgentry_t gdt_l1e;
264 unsigned int vcpuid;
266 if ( d == NULL )
267 return -EINVAL;
268 if ( !may_switch_mode(d) )
269 return -EACCES;
270 if ( !IS_COMPAT(d) )
271 return 0;
273 clear_bit(_DOMF_compat, &d->domain_flags);
274 release_arg_xlat_area(d);
276 /* switch gdt */
277 gdt_l1e = l1e_from_page(virt_to_page(gdt_table), PAGE_HYPERVISOR);
278 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
279 {
280 d->arch.mm_perdomain_pt[((vcpuid << GDT_LDT_VCPU_SHIFT) +
281 FIRST_RESERVED_GDT_PAGE)] = gdt_l1e;
282 if (d->vcpu[vcpuid])
283 release_compat_l4(d->vcpu[vcpuid]);
284 }
286 d->arch.physaddr_bitsize = 64;
288 return 0;
289 }
291 int switch_compat(struct domain *d)
292 {
293 l1_pgentry_t gdt_l1e;
294 unsigned int vcpuid;
296 if ( d == NULL )
297 return -EINVAL;
298 if ( compat_disabled )
299 return -ENOSYS;
300 if ( !may_switch_mode(d) )
301 return -EACCES;
302 if ( IS_COMPAT(d) )
303 return 0;
305 set_bit(_DOMF_compat, &d->domain_flags);
307 /* switch gdt */
308 gdt_l1e = l1e_from_page(virt_to_page(compat_gdt_table), PAGE_HYPERVISOR);
309 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
310 {
311 d->arch.mm_perdomain_pt[((vcpuid << GDT_LDT_VCPU_SHIFT) +
312 FIRST_RESERVED_GDT_PAGE)] = gdt_l1e;
313 if (d->vcpu[vcpuid]
314 && setup_compat_l4(d->vcpu[vcpuid]) != 0)
315 return -ENOMEM;
316 }
318 d->arch.physaddr_bitsize =
319 fls((1UL << 32) - HYPERVISOR_COMPAT_VIRT_START(d)) - 1
320 + (PAGE_SIZE - 2);
322 return 0;
323 }
325 #else
326 #define release_arg_xlat_area(d) ((void)0)
327 #define setup_compat_l4(v) 0
328 #define release_compat_l4(v) ((void)0)
329 #endif
331 int vcpu_initialise(struct vcpu *v)
332 {
333 struct domain *d = v->domain;
334 int rc;
336 v->arch.flags = TF_kernel_mode;
338 pae_l3_cache_init(&v->arch.pae_l3_cache);
340 paging_vcpu_init(v);
342 if ( is_hvm_domain(d) )
343 {
344 if ( (rc = hvm_vcpu_initialise(v)) != 0 )
345 return rc;
346 }
347 else
348 {
349 /* PV guests get an emulated PIT too for video BIOSes to use. */
350 if ( !is_idle_domain(d) && (v->vcpu_id == 0) )
351 pit_init(v, cpu_khz);
353 v->arch.schedule_tail = continue_nonidle_domain;
354 v->arch.ctxt_switch_from = paravirt_ctxt_switch_from;
355 v->arch.ctxt_switch_to = paravirt_ctxt_switch_to;
357 if ( is_idle_domain(d) )
358 {
359 v->arch.schedule_tail = continue_idle_domain;
360 v->arch.cr3 = __pa(idle_pg_table);
361 }
362 }
364 v->arch.perdomain_ptes =
365 d->arch.mm_perdomain_pt + (v->vcpu_id << GDT_LDT_VCPU_SHIFT);
367 if ( IS_COMPAT(d) && (rc = setup_compat_l4(v)) != 0 )
368 return rc;
370 return 0;
371 }
373 void vcpu_destroy(struct vcpu *v)
374 {
375 if ( IS_COMPAT(v->domain) )
376 release_compat_l4(v);
377 }
379 int arch_domain_create(struct domain *d)
380 {
381 #ifdef __x86_64__
382 struct page_info *pg;
383 int i;
384 #endif
385 l1_pgentry_t gdt_l1e;
386 int vcpuid, pdpt_order;
387 int rc = -ENOMEM;
389 pdpt_order = get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t));
390 d->arch.mm_perdomain_pt = alloc_xenheap_pages(pdpt_order);
391 if ( d->arch.mm_perdomain_pt == NULL )
392 goto fail;
393 memset(d->arch.mm_perdomain_pt, 0, PAGE_SIZE << pdpt_order);
395 /*
396 * Map Xen segments into every VCPU's GDT, irrespective of whether every
397 * VCPU will actually be used. This avoids an NMI race during context
398 * switch: if we take an interrupt after switching CR3 but before switching
399 * GDT, and the old VCPU# is invalid in the new domain, we would otherwise
400 * try to load CS from an invalid table.
401 */
402 gdt_l1e = l1e_from_page(virt_to_page(gdt_table), PAGE_HYPERVISOR);
403 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
404 d->arch.mm_perdomain_pt[((vcpuid << GDT_LDT_VCPU_SHIFT) +
405 FIRST_RESERVED_GDT_PAGE)] = gdt_l1e;
407 #if defined(__i386__)
409 mapcache_init(d);
411 #else /* __x86_64__ */
413 if ( (pg = alloc_domheap_page(NULL)) == NULL )
414 goto fail;
415 d->arch.mm_perdomain_l2 = clear_page(page_to_virt(pg));
416 for ( i = 0; i < (1 << pdpt_order); i++ )
417 d->arch.mm_perdomain_l2[l2_table_offset(PERDOMAIN_VIRT_START)+i] =
418 l2e_from_page(virt_to_page(d->arch.mm_perdomain_pt)+i,
419 __PAGE_HYPERVISOR);
421 if ( (pg = alloc_domheap_page(NULL)) == NULL )
422 goto fail;
423 d->arch.mm_perdomain_l3 = clear_page(page_to_virt(pg));
424 d->arch.mm_perdomain_l3[l3_table_offset(PERDOMAIN_VIRT_START)] =
425 l3e_from_page(virt_to_page(d->arch.mm_perdomain_l2),
426 __PAGE_HYPERVISOR);
428 #endif /* __x86_64__ */
430 #ifdef CONFIG_COMPAT
431 HYPERVISOR_COMPAT_VIRT_START(d) = __HYPERVISOR_COMPAT_VIRT_START;
432 #endif
434 paging_domain_init(d);
436 if ( !is_idle_domain(d) )
437 {
438 d->arch.ioport_caps =
439 rangeset_new(d, "I/O Ports", RANGESETF_prettyprint_hex);
440 if ( d->arch.ioport_caps == NULL )
441 goto fail;
443 if ( (d->shared_info = alloc_xenheap_page()) == NULL )
444 goto fail;
446 memset(d->shared_info, 0, PAGE_SIZE);
447 share_xen_page_with_guest(
448 virt_to_page(d->shared_info), d, XENSHARE_writable);
449 }
451 return is_hvm_domain(d) ? hvm_domain_initialise(d) : 0;
453 fail:
454 free_xenheap_page(d->shared_info);
455 #ifdef __x86_64__
456 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
457 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
458 #endif
459 free_xenheap_pages(d->arch.mm_perdomain_pt, pdpt_order);
460 return rc;
461 }
463 void arch_domain_destroy(struct domain *d)
464 {
465 struct vcpu *v;
467 if ( is_hvm_domain(d) )
468 {
469 for_each_vcpu ( d, v )
470 hvm_vcpu_destroy(v);
471 hvm_domain_destroy(d);
472 }
474 paging_final_teardown(d);
476 free_xenheap_pages(
477 d->arch.mm_perdomain_pt,
478 get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t)));
480 #ifdef __x86_64__
481 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
482 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
483 #endif
485 if ( IS_COMPAT(d) )
486 release_arg_xlat_area(d);
488 free_xenheap_page(d->shared_info);
489 }
491 /* This is called by arch_final_setup_guest and do_boot_vcpu */
492 int arch_set_info_guest(
493 struct vcpu *v, vcpu_guest_context_u c)
494 {
495 struct domain *d = v->domain;
496 #ifdef CONFIG_COMPAT
497 #define c(fld) (!IS_COMPAT(d) ? (c.nat->fld) : (c.cmp->fld))
498 #else
499 #define c(fld) (c.nat->fld)
500 #endif
501 unsigned long cr3_pfn = INVALID_MFN;
502 unsigned long flags = c(flags);
503 int i, rc;
505 if ( !is_hvm_vcpu(v) )
506 {
507 if ( !IS_COMPAT(d) )
508 {
509 fixup_guest_stack_selector(d, c.nat->user_regs.ss);
510 fixup_guest_stack_selector(d, c.nat->kernel_ss);
511 fixup_guest_code_selector(d, c.nat->user_regs.cs);
512 #ifdef __i386__
513 fixup_guest_code_selector(d, c.nat->event_callback_cs);
514 fixup_guest_code_selector(d, c.nat->failsafe_callback_cs);
515 #endif
517 for ( i = 0; i < 256; i++ )
518 fixup_guest_code_selector(d, c.nat->trap_ctxt[i].cs);
520 /* LDT safety checks. */
521 if ( ((c.nat->ldt_base & (PAGE_SIZE-1)) != 0) ||
522 (c.nat->ldt_ents > 8192) ||
523 !array_access_ok(c.nat->ldt_base,
524 c.nat->ldt_ents,
525 LDT_ENTRY_SIZE) )
526 return -EINVAL;
527 }
528 #ifdef CONFIG_COMPAT
529 else
530 {
531 fixup_guest_stack_selector(d, c.cmp->user_regs.ss);
532 fixup_guest_stack_selector(d, c.cmp->kernel_ss);
533 fixup_guest_code_selector(d, c.cmp->user_regs.cs);
534 fixup_guest_code_selector(d, c.cmp->event_callback_cs);
535 fixup_guest_code_selector(d, c.cmp->failsafe_callback_cs);
537 for ( i = 0; i < 256; i++ )
538 fixup_guest_code_selector(d, c.cmp->trap_ctxt[i].cs);
540 /* LDT safety checks. */
541 if ( ((c.cmp->ldt_base & (PAGE_SIZE-1)) != 0) ||
542 (c.cmp->ldt_ents > 8192) ||
543 !compat_array_access_ok(c.cmp->ldt_base,
544 c.cmp->ldt_ents,
545 LDT_ENTRY_SIZE) )
546 return -EINVAL;
547 }
548 #endif
549 }
551 clear_bit(_VCPUF_fpu_initialised, &v->vcpu_flags);
552 if ( flags & VGCF_I387_VALID )
553 set_bit(_VCPUF_fpu_initialised, &v->vcpu_flags);
555 v->arch.flags &= ~TF_kernel_mode;
556 if ( (flags & VGCF_in_kernel) || is_hvm_vcpu(v)/*???*/ )
557 v->arch.flags |= TF_kernel_mode;
559 if ( !IS_COMPAT(v->domain) )
560 memcpy(&v->arch.guest_context, c.nat, sizeof(*c.nat));
561 #ifdef CONFIG_COMPAT
562 else
563 {
564 XLAT_vcpu_guest_context(&v->arch.guest_context, c.cmp);
565 }
566 #endif
568 /* Only CR0.TS is modifiable by guest or admin. */
569 v->arch.guest_context.ctrlreg[0] &= X86_CR0_TS;
570 v->arch.guest_context.ctrlreg[0] |= read_cr0() & ~X86_CR0_TS;
572 init_int80_direct_trap(v);
574 if ( !is_hvm_vcpu(v) )
575 {
576 /* IOPL privileges are virtualised. */
577 v->arch.iopl = (v->arch.guest_context.user_regs.eflags >> 12) & 3;
578 v->arch.guest_context.user_regs.eflags &= ~EF_IOPL;
580 /* Ensure real hardware interrupts are enabled. */
581 v->arch.guest_context.user_regs.eflags |= EF_IE;
582 }
583 else
584 {
585 hvm_load_cpu_guest_regs(v, &v->arch.guest_context.user_regs);
586 }
588 if ( test_bit(_VCPUF_initialised, &v->vcpu_flags) )
589 return 0;
591 memset(v->arch.guest_context.debugreg, 0,
592 sizeof(v->arch.guest_context.debugreg));
593 for ( i = 0; i < 8; i++ )
594 (void)set_debugreg(v, i, c(debugreg[i]));
596 if ( v->vcpu_id == 0 )
597 d->vm_assist = c(vm_assist);
599 if ( !is_hvm_vcpu(v) )
600 {
601 if ( !IS_COMPAT(d) )
602 rc = (int)set_gdt(v, c.nat->gdt_frames, c.nat->gdt_ents);
603 #ifdef CONFIG_COMPAT
604 else
605 {
606 unsigned long gdt_frames[ARRAY_SIZE(c.cmp->gdt_frames)];
607 unsigned int i, n = (c.cmp->gdt_ents + 511) / 512;
609 if ( n > ARRAY_SIZE(c.cmp->gdt_frames) )
610 return -EINVAL;
611 for ( i = 0; i < n; ++i )
612 gdt_frames[i] = c.cmp->gdt_frames[i];
613 rc = (int)set_gdt(v, gdt_frames, c.cmp->gdt_ents);
614 }
615 #endif
616 if ( rc != 0 )
617 return rc;
619 if ( !IS_COMPAT(d) )
620 {
621 cr3_pfn = gmfn_to_mfn(d, xen_cr3_to_pfn(c.nat->ctrlreg[3]));
623 if ( paging_mode_refcounts(d)
624 ? !get_page(mfn_to_page(cr3_pfn), d)
625 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
626 PGT_base_page_table) )
627 {
628 destroy_gdt(v);
629 return -EINVAL;
630 }
632 v->arch.guest_table = pagetable_from_pfn(cr3_pfn);
633 }
634 #ifdef CONFIG_COMPAT
635 else
636 {
637 l4_pgentry_t *l4tab;
639 cr3_pfn = gmfn_to_mfn(d, compat_cr3_to_pfn(c.cmp->ctrlreg[3]));
641 if ( paging_mode_refcounts(d)
642 ? !get_page(mfn_to_page(cr3_pfn), d)
643 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
644 PGT_l3_page_table) )
645 {
646 destroy_gdt(v);
647 return -EINVAL;
648 }
650 l4tab = __va(pagetable_get_paddr(v->arch.guest_table));
651 *l4tab = l4e_from_pfn(cr3_pfn, _PAGE_PRESENT|_PAGE_RW|_PAGE_USER|_PAGE_ACCESSED);
652 }
653 #endif
654 }
656 if ( v->vcpu_id == 0 )
657 update_domain_wallclock_time(d);
659 /* Don't redo final setup */
660 set_bit(_VCPUF_initialised, &v->vcpu_flags);
662 if ( paging_mode_enabled(d) )
663 paging_update_paging_modes(v);
665 update_cr3(v);
667 return 0;
668 #undef c
669 }
671 int arch_vcpu_reset(struct vcpu *v)
672 {
673 destroy_gdt(v);
674 vcpu_destroy_pagetables(v);
675 return 0;
676 }
678 long
679 arch_do_vcpu_op(
680 int cmd, struct vcpu *v, XEN_GUEST_HANDLE(void) arg)
681 {
682 long rc = 0;
684 switch ( cmd )
685 {
686 case VCPUOP_register_runstate_memory_area:
687 {
688 struct vcpu_register_runstate_memory_area area;
689 struct vcpu_runstate_info runstate;
691 rc = -EFAULT;
692 if ( copy_from_guest(&area, arg, 1) )
693 break;
695 if ( !guest_handle_okay(area.addr.h, 1) )
696 break;
698 rc = 0;
699 runstate_guest(v) = area.addr.h;
701 if ( v == current )
702 {
703 __copy_to_guest(runstate_guest(v), &v->runstate, 1);
704 }
705 else
706 {
707 vcpu_runstate_get(v, &runstate);
708 __copy_to_guest(runstate_guest(v), &runstate, 1);
709 }
711 break;
712 }
714 default:
715 rc = -ENOSYS;
716 break;
717 }
719 return rc;
720 }
722 #ifdef __x86_64__
724 #define loadsegment(seg,value) ({ \
725 int __r = 1; \
726 __asm__ __volatile__ ( \
727 "1: movl %k1,%%" #seg "\n2:\n" \
728 ".section .fixup,\"ax\"\n" \
729 "3: xorl %k0,%k0\n" \
730 " movl %k0,%%" #seg "\n" \
731 " jmp 2b\n" \
732 ".previous\n" \
733 ".section __ex_table,\"a\"\n" \
734 " .align 8\n" \
735 " .quad 1b,3b\n" \
736 ".previous" \
737 : "=r" (__r) : "r" (value), "0" (__r) );\
738 __r; })
740 /*
741 * save_segments() writes a mask of segments which are dirty (non-zero),
742 * allowing load_segments() to avoid some expensive segment loads and
743 * MSR writes.
744 */
745 static DEFINE_PER_CPU(unsigned int, dirty_segment_mask);
746 #define DIRTY_DS 0x01
747 #define DIRTY_ES 0x02
748 #define DIRTY_FS 0x04
749 #define DIRTY_GS 0x08
750 #define DIRTY_FS_BASE 0x10
751 #define DIRTY_GS_BASE_USER 0x20
753 static void load_segments(struct vcpu *n)
754 {
755 struct vcpu_guest_context *nctxt = &n->arch.guest_context;
756 int all_segs_okay = 1;
757 unsigned int dirty_segment_mask, cpu = smp_processor_id();
759 /* Load and clear the dirty segment mask. */
760 dirty_segment_mask = per_cpu(dirty_segment_mask, cpu);
761 per_cpu(dirty_segment_mask, cpu) = 0;
763 /* Either selector != 0 ==> reload. */
764 if ( unlikely((dirty_segment_mask & DIRTY_DS) | nctxt->user_regs.ds) )
765 all_segs_okay &= loadsegment(ds, nctxt->user_regs.ds);
767 /* Either selector != 0 ==> reload. */
768 if ( unlikely((dirty_segment_mask & DIRTY_ES) | nctxt->user_regs.es) )
769 all_segs_okay &= loadsegment(es, nctxt->user_regs.es);
771 /*
772 * Either selector != 0 ==> reload.
773 * Also reload to reset FS_BASE if it was non-zero.
774 */
775 if ( unlikely((dirty_segment_mask & (DIRTY_FS | DIRTY_FS_BASE)) |
776 nctxt->user_regs.fs) )
777 all_segs_okay &= loadsegment(fs, nctxt->user_regs.fs);
779 /*
780 * Either selector != 0 ==> reload.
781 * Also reload to reset GS_BASE if it was non-zero.
782 */
783 if ( unlikely((dirty_segment_mask & (DIRTY_GS | DIRTY_GS_BASE_USER)) |
784 nctxt->user_regs.gs) )
785 {
786 /* Reset GS_BASE with user %gs? */
787 if ( (dirty_segment_mask & DIRTY_GS) || !nctxt->gs_base_user )
788 all_segs_okay &= loadsegment(gs, nctxt->user_regs.gs);
789 }
791 if ( !IS_COMPAT(n->domain) )
792 {
793 /* This can only be non-zero if selector is NULL. */
794 if ( nctxt->fs_base )
795 wrmsr(MSR_FS_BASE,
796 nctxt->fs_base,
797 nctxt->fs_base>>32);
799 /* Most kernels have non-zero GS base, so don't bother testing. */
800 /* (This is also a serialising instruction, avoiding AMD erratum #88.) */
801 wrmsr(MSR_SHADOW_GS_BASE,
802 nctxt->gs_base_kernel,
803 nctxt->gs_base_kernel>>32);
805 /* This can only be non-zero if selector is NULL. */
806 if ( nctxt->gs_base_user )
807 wrmsr(MSR_GS_BASE,
808 nctxt->gs_base_user,
809 nctxt->gs_base_user>>32);
811 /* If in kernel mode then switch the GS bases around. */
812 if ( (n->arch.flags & TF_kernel_mode) )
813 __asm__ __volatile__ ( "swapgs" );
814 }
816 if ( unlikely(!all_segs_okay) )
817 {
818 struct cpu_user_regs *regs = guest_cpu_user_regs();
819 unsigned long *rsp =
820 (n->arch.flags & TF_kernel_mode) ?
821 (unsigned long *)regs->rsp :
822 (unsigned long *)nctxt->kernel_sp;
823 unsigned long cs_and_mask, rflags;
825 if ( IS_COMPAT(n->domain) )
826 {
827 unsigned int *esp = ring_1(regs) ?
828 (unsigned int *)regs->rsp :
829 (unsigned int *)nctxt->kernel_sp;
830 unsigned int cs_and_mask, eflags;
831 int ret = 0;
833 /* CS longword also contains full evtchn_upcall_mask. */
834 cs_and_mask = (unsigned short)regs->cs |
835 ((unsigned int)vcpu_info(n, evtchn_upcall_mask) << 16);
836 /* Fold upcall mask into RFLAGS.IF. */
837 eflags = regs->_eflags & ~X86_EFLAGS_IF;
838 eflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
840 if ( !ring_1(regs) )
841 {
842 ret = put_user(regs->ss, esp-1);
843 ret |= put_user(regs->_esp, esp-2);
844 esp -= 2;
845 }
847 if ( ret |
848 put_user(eflags, esp-1) |
849 put_user(cs_and_mask, esp-2) |
850 put_user(regs->_eip, esp-3) |
851 put_user(nctxt->user_regs.gs, esp-4) |
852 put_user(nctxt->user_regs.fs, esp-5) |
853 put_user(nctxt->user_regs.es, esp-6) |
854 put_user(nctxt->user_regs.ds, esp-7) )
855 {
856 gdprintk(XENLOG_ERR, "Error while creating compat "
857 "failsafe callback frame.\n");
858 domain_crash(n->domain);
859 }
861 if ( test_bit(_VGCF_failsafe_disables_events,
862 &n->arch.guest_context.flags) )
863 vcpu_info(n, evtchn_upcall_mask) = 1;
865 regs->entry_vector = TRAP_syscall;
866 regs->_eflags &= 0xFFFCBEFFUL;
867 regs->ss = FLAT_COMPAT_KERNEL_SS;
868 regs->_esp = (unsigned long)(esp-7);
869 regs->cs = FLAT_COMPAT_KERNEL_CS;
870 regs->_eip = nctxt->failsafe_callback_eip;
871 return;
872 }
874 if ( !(n->arch.flags & TF_kernel_mode) )
875 toggle_guest_mode(n);
876 else
877 regs->cs &= ~3;
879 /* CS longword also contains full evtchn_upcall_mask. */
880 cs_and_mask = (unsigned long)regs->cs |
881 ((unsigned long)vcpu_info(n, evtchn_upcall_mask) << 32);
883 /* Fold upcall mask into RFLAGS.IF. */
884 rflags = regs->rflags & ~X86_EFLAGS_IF;
885 rflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
887 if ( put_user(regs->ss, rsp- 1) |
888 put_user(regs->rsp, rsp- 2) |
889 put_user(rflags, rsp- 3) |
890 put_user(cs_and_mask, rsp- 4) |
891 put_user(regs->rip, rsp- 5) |
892 put_user(nctxt->user_regs.gs, rsp- 6) |
893 put_user(nctxt->user_regs.fs, rsp- 7) |
894 put_user(nctxt->user_regs.es, rsp- 8) |
895 put_user(nctxt->user_regs.ds, rsp- 9) |
896 put_user(regs->r11, rsp-10) |
897 put_user(regs->rcx, rsp-11) )
898 {
899 gdprintk(XENLOG_ERR, "Error while creating failsafe "
900 "callback frame.\n");
901 domain_crash(n->domain);
902 }
904 if ( test_bit(_VGCF_failsafe_disables_events,
905 &n->arch.guest_context.flags) )
906 vcpu_info(n, evtchn_upcall_mask) = 1;
908 regs->entry_vector = TRAP_syscall;
909 regs->rflags &= ~(X86_EFLAGS_AC|X86_EFLAGS_VM|X86_EFLAGS_RF|
910 X86_EFLAGS_NT|X86_EFLAGS_TF);
911 regs->ss = FLAT_KERNEL_SS;
912 regs->rsp = (unsigned long)(rsp-11);
913 regs->cs = FLAT_KERNEL_CS;
914 regs->rip = nctxt->failsafe_callback_eip;
915 }
916 }
918 static void save_segments(struct vcpu *v)
919 {
920 struct vcpu_guest_context *ctxt = &v->arch.guest_context;
921 struct cpu_user_regs *regs = &ctxt->user_regs;
922 unsigned int dirty_segment_mask = 0;
924 regs->ds = read_segment_register(ds);
925 regs->es = read_segment_register(es);
926 regs->fs = read_segment_register(fs);
927 regs->gs = read_segment_register(gs);
929 if ( regs->ds )
930 dirty_segment_mask |= DIRTY_DS;
932 if ( regs->es )
933 dirty_segment_mask |= DIRTY_ES;
935 if ( regs->fs || IS_COMPAT(v->domain) )
936 {
937 dirty_segment_mask |= DIRTY_FS;
938 ctxt->fs_base = 0; /* != 0 selector kills fs_base */
939 }
940 else if ( ctxt->fs_base )
941 {
942 dirty_segment_mask |= DIRTY_FS_BASE;
943 }
945 if ( regs->gs || IS_COMPAT(v->domain) )
946 {
947 dirty_segment_mask |= DIRTY_GS;
948 ctxt->gs_base_user = 0; /* != 0 selector kills gs_base_user */
949 }
950 else if ( ctxt->gs_base_user )
951 {
952 dirty_segment_mask |= DIRTY_GS_BASE_USER;
953 }
955 this_cpu(dirty_segment_mask) = dirty_segment_mask;
956 }
958 #define switch_kernel_stack(v) ((void)0)
960 #elif defined(__i386__)
962 #define load_segments(n) ((void)0)
963 #define save_segments(p) ((void)0)
965 static inline void switch_kernel_stack(struct vcpu *v)
966 {
967 struct tss_struct *tss = &init_tss[smp_processor_id()];
968 tss->esp1 = v->arch.guest_context.kernel_sp;
969 tss->ss1 = v->arch.guest_context.kernel_ss;
970 }
972 #endif /* __i386__ */
974 static void paravirt_ctxt_switch_from(struct vcpu *v)
975 {
976 save_segments(v);
977 }
979 static void paravirt_ctxt_switch_to(struct vcpu *v)
980 {
981 set_int80_direct_trap(v);
982 switch_kernel_stack(v);
983 }
985 #define loaddebug(_v,_reg) \
986 __asm__ __volatile__ ("mov %0,%%db" #_reg : : "r" ((_v)->debugreg[_reg]))
988 static void __context_switch(void)
989 {
990 struct cpu_user_regs *stack_regs = guest_cpu_user_regs();
991 unsigned int cpu = smp_processor_id();
992 struct vcpu *p = per_cpu(curr_vcpu, cpu);
993 struct vcpu *n = current;
995 ASSERT(p != n);
996 ASSERT(cpus_empty(n->vcpu_dirty_cpumask));
998 if ( !is_idle_vcpu(p) )
999 {
1000 memcpy(&p->arch.guest_context.user_regs,
1001 stack_regs,
1002 CTXT_SWITCH_STACK_BYTES);
1003 unlazy_fpu(p);
1004 p->arch.ctxt_switch_from(p);
1007 if ( !is_idle_vcpu(n) )
1009 memcpy(stack_regs,
1010 &n->arch.guest_context.user_regs,
1011 CTXT_SWITCH_STACK_BYTES);
1013 /* Maybe switch the debug registers. */
1014 if ( unlikely(n->arch.guest_context.debugreg[7]) )
1016 loaddebug(&n->arch.guest_context, 0);
1017 loaddebug(&n->arch.guest_context, 1);
1018 loaddebug(&n->arch.guest_context, 2);
1019 loaddebug(&n->arch.guest_context, 3);
1020 /* no 4 and 5 */
1021 loaddebug(&n->arch.guest_context, 6);
1022 loaddebug(&n->arch.guest_context, 7);
1024 n->arch.ctxt_switch_to(n);
1027 if ( p->domain != n->domain )
1028 cpu_set(cpu, n->domain->domain_dirty_cpumask);
1029 cpu_set(cpu, n->vcpu_dirty_cpumask);
1031 write_ptbase(n);
1033 if ( p->vcpu_id != n->vcpu_id )
1035 char gdt_load[10];
1036 *(unsigned short *)(&gdt_load[0]) = LAST_RESERVED_GDT_BYTE;
1037 *(unsigned long *)(&gdt_load[2]) = GDT_VIRT_START(n);
1038 __asm__ __volatile__ ( "lgdt %0" : "=m" (gdt_load) );
1041 if ( p->domain != n->domain )
1042 cpu_clear(cpu, p->domain->domain_dirty_cpumask);
1043 cpu_clear(cpu, p->vcpu_dirty_cpumask);
1045 per_cpu(curr_vcpu, cpu) = n;
1049 void context_switch(struct vcpu *prev, struct vcpu *next)
1051 unsigned int cpu = smp_processor_id();
1052 cpumask_t dirty_mask = next->vcpu_dirty_cpumask;
1054 ASSERT(local_irq_is_enabled());
1056 /* Allow at most one CPU at a time to be dirty. */
1057 ASSERT(cpus_weight(dirty_mask) <= 1);
1058 if ( unlikely(!cpu_isset(cpu, dirty_mask) && !cpus_empty(dirty_mask)) )
1060 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1061 if ( !cpus_empty(next->vcpu_dirty_cpumask) )
1062 flush_tlb_mask(next->vcpu_dirty_cpumask);
1065 local_irq_disable();
1067 if ( is_hvm_vcpu(prev) && !list_empty(&prev->arch.hvm_vcpu.tm_list) )
1068 pt_freeze_time(prev);
1070 set_current(next);
1072 if ( (per_cpu(curr_vcpu, cpu) == next) || is_idle_vcpu(next) )
1074 local_irq_enable();
1076 else
1078 __context_switch();
1080 #ifdef CONFIG_COMPAT
1081 if ( is_idle_vcpu(prev)
1082 || IS_COMPAT(prev->domain) != IS_COMPAT(next->domain) )
1084 uint32_t efer_lo, efer_hi;
1086 local_flush_tlb_one(GDT_VIRT_START(next) + FIRST_RESERVED_GDT_BYTE);
1088 rdmsr(MSR_EFER, efer_lo, efer_hi);
1089 if ( !IS_COMPAT(next->domain) == !(efer_lo & EFER_SCE) )
1091 efer_lo ^= EFER_SCE;
1092 wrmsr(MSR_EFER, efer_lo, efer_hi);
1095 #endif
1097 /* Re-enable interrupts before restoring state which may fault. */
1098 local_irq_enable();
1100 if ( !is_hvm_vcpu(next) )
1102 load_LDT(next);
1103 load_segments(next);
1107 context_saved(prev);
1109 /* Update per-VCPU guest runstate shared memory area (if registered). */
1110 if ( !guest_handle_is_null(runstate_guest(next)) )
1112 if ( !IS_COMPAT(next->domain) )
1113 __copy_to_guest(runstate_guest(next), &next->runstate, 1);
1114 #ifdef CONFIG_COMPAT
1115 else
1117 struct compat_vcpu_runstate_info info;
1119 XLAT_vcpu_runstate_info(&info, &next->runstate);
1120 __copy_to_guest(next->runstate_guest.compat, &info, 1);
1122 #endif
1125 schedule_tail(next);
1126 BUG();
1129 void continue_running(struct vcpu *same)
1131 schedule_tail(same);
1132 BUG();
1135 int __sync_lazy_execstate(void)
1137 unsigned long flags;
1138 int switch_required;
1140 local_irq_save(flags);
1142 switch_required = (this_cpu(curr_vcpu) != current);
1144 if ( switch_required )
1146 ASSERT(current == idle_vcpu[smp_processor_id()]);
1147 __context_switch();
1150 local_irq_restore(flags);
1152 return switch_required;
1155 void sync_vcpu_execstate(struct vcpu *v)
1157 if ( cpu_isset(smp_processor_id(), v->vcpu_dirty_cpumask) )
1158 (void)__sync_lazy_execstate();
1160 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1161 flush_tlb_mask(v->vcpu_dirty_cpumask);
1164 #define next_arg(fmt, args) ({ \
1165 unsigned long __arg; \
1166 switch ( *(fmt)++ ) \
1167 { \
1168 case 'i': __arg = (unsigned long)va_arg(args, unsigned int); break; \
1169 case 'l': __arg = (unsigned long)va_arg(args, unsigned long); break; \
1170 case 'h': __arg = (unsigned long)va_arg(args, void *); break; \
1171 default: __arg = 0; BUG(); \
1172 } \
1173 __arg; \
1174 })
1176 unsigned long hypercall_create_continuation(
1177 unsigned int op, const char *format, ...)
1179 struct mc_state *mcs = &this_cpu(mc_state);
1180 struct cpu_user_regs *regs;
1181 const char *p = format;
1182 unsigned long arg;
1183 unsigned int i;
1184 va_list args;
1186 va_start(args, format);
1188 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1190 __set_bit(_MCSF_call_preempted, &mcs->flags);
1192 for ( i = 0; *p != '\0'; i++ )
1193 mcs->call.args[i] = next_arg(p, args);
1194 if ( IS_COMPAT(current->domain) )
1196 for ( ; i < 6; i++ )
1197 mcs->call.args[i] = 0;
1200 else
1202 regs = guest_cpu_user_regs();
1203 regs->eax = op;
1204 regs->eip -= 2; /* re-execute 'syscall' / 'int 0x82' */
1206 #ifdef __x86_64__
1207 if ( !IS_COMPAT(current->domain) )
1209 for ( i = 0; *p != '\0'; i++ )
1211 arg = next_arg(p, args);
1212 switch ( i )
1214 case 0: regs->rdi = arg; break;
1215 case 1: regs->rsi = arg; break;
1216 case 2: regs->rdx = arg; break;
1217 case 3: regs->r10 = arg; break;
1218 case 4: regs->r8 = arg; break;
1219 case 5: regs->r9 = arg; break;
1223 else
1224 #endif
1226 if ( supervisor_mode_kernel || is_hvm_vcpu(current) )
1227 regs->eip &= ~31; /* re-execute entire hypercall entry stub */
1229 for ( i = 0; *p != '\0'; i++ )
1231 arg = next_arg(p, args);
1232 switch ( i )
1234 case 0: regs->ebx = arg; break;
1235 case 1: regs->ecx = arg; break;
1236 case 2: regs->edx = arg; break;
1237 case 3: regs->esi = arg; break;
1238 case 4: regs->edi = arg; break;
1239 case 5: regs->ebp = arg; break;
1245 va_end(args);
1247 return op;
1250 #ifdef CONFIG_COMPAT
1251 int hypercall_xlat_continuation(unsigned int *id, unsigned int mask, ...)
1253 int rc = 0;
1254 struct mc_state *mcs = &this_cpu(mc_state);
1255 struct cpu_user_regs *regs;
1256 unsigned int i, cval = 0;
1257 unsigned long nval = 0;
1258 va_list args;
1260 BUG_ON(*id > 5);
1261 BUG_ON(mask & (1U << *id));
1263 va_start(args, mask);
1265 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1267 if ( !test_bit(_MCSF_call_preempted, &mcs->flags) )
1268 return 0;
1269 for ( i = 0; i < 6; ++i, mask >>= 1 )
1271 if ( mask & 1 )
1273 nval = va_arg(args, unsigned long);
1274 cval = va_arg(args, unsigned int);
1275 if ( cval == nval )
1276 mask &= ~1U;
1277 else
1278 BUG_ON(nval == (unsigned int)nval);
1280 else if ( id && *id == i )
1282 *id = mcs->call.args[i];
1283 id = NULL;
1285 if ( (mask & 1) && mcs->call.args[i] == nval )
1286 ++rc;
1287 else
1289 cval = mcs->call.args[i];
1290 BUG_ON(mcs->call.args[i] != cval);
1292 mcs->compat_call.args[i] = cval;
1295 else
1297 regs = guest_cpu_user_regs();
1298 for ( i = 0; i < 6; ++i, mask >>= 1 )
1300 unsigned long *reg;
1302 switch ( i )
1304 case 0: reg = &regs->ebx; break;
1305 case 1: reg = &regs->ecx; break;
1306 case 2: reg = &regs->edx; break;
1307 case 3: reg = &regs->esi; break;
1308 case 4: reg = &regs->edi; break;
1309 case 5: reg = &regs->ebp; break;
1310 default: BUG(); reg = NULL; break;
1312 if ( (mask & 1) )
1314 nval = va_arg(args, unsigned long);
1315 cval = va_arg(args, unsigned int);
1316 if ( cval == nval )
1317 mask &= ~1U;
1318 else
1319 BUG_ON(nval == (unsigned int)nval);
1321 else if ( id && *id == i )
1323 *id = *reg;
1324 id = NULL;
1326 if ( (mask & 1) && *reg == nval )
1328 *reg = cval;
1329 ++rc;
1331 else
1332 BUG_ON(*reg != (unsigned int)*reg);
1336 va_end(args);
1338 return rc;
1340 #endif
1342 static void relinquish_memory(struct domain *d, struct list_head *list)
1344 struct list_head *ent;
1345 struct page_info *page;
1346 unsigned long x, y;
1348 /* Use a recursive lock, as we may enter 'free_domheap_page'. */
1349 spin_lock_recursive(&d->page_alloc_lock);
1351 ent = list->next;
1352 while ( ent != list )
1354 page = list_entry(ent, struct page_info, list);
1356 /* Grab a reference to the page so it won't disappear from under us. */
1357 if ( unlikely(!get_page(page, d)) )
1359 /* Couldn't get a reference -- someone is freeing this page. */
1360 ent = ent->next;
1361 continue;
1364 if ( test_and_clear_bit(_PGT_pinned, &page->u.inuse.type_info) )
1365 put_page_and_type(page);
1367 if ( test_and_clear_bit(_PGC_allocated, &page->count_info) )
1368 put_page(page);
1370 /*
1371 * Forcibly invalidate base page tables at this point to break circular
1372 * 'linear page table' references. This is okay because MMU structures
1373 * are not shared across domains and this domain is now dead. Thus base
1374 * tables are not in use so a non-zero count means circular reference.
1375 */
1376 y = page->u.inuse.type_info;
1377 for ( ; ; )
1379 x = y;
1380 if ( likely((x & (PGT_type_mask|PGT_validated)) !=
1381 (PGT_base_page_table|PGT_validated)) )
1382 break;
1384 y = cmpxchg(&page->u.inuse.type_info, x, x & ~PGT_validated);
1385 if ( likely(y == x) )
1387 free_page_type(page, PGT_base_page_table);
1388 break;
1392 /* Follow the list chain and /then/ potentially free the page. */
1393 ent = ent->next;
1394 put_page(page);
1397 spin_unlock_recursive(&d->page_alloc_lock);
1400 static void vcpu_destroy_pagetables(struct vcpu *v)
1402 struct domain *d = v->domain;
1403 unsigned long pfn;
1405 #ifdef CONFIG_COMPAT
1406 if ( IS_COMPAT(d) )
1408 if ( is_hvm_vcpu(v) )
1409 pfn = pagetable_get_pfn(v->arch.guest_table);
1410 else
1411 pfn = l4e_get_pfn(*(l4_pgentry_t *)
1412 __va(pagetable_get_paddr(v->arch.guest_table)));
1414 if ( pfn != 0 )
1416 if ( paging_mode_refcounts(d) )
1417 put_page(mfn_to_page(pfn));
1418 else
1419 put_page_and_type(mfn_to_page(pfn));
1422 if ( is_hvm_vcpu(v) )
1423 v->arch.guest_table = pagetable_null();
1424 else
1425 l4e_write(
1426 (l4_pgentry_t *) __va(pagetable_get_paddr(v->arch.guest_table)),
1427 l4e_empty());
1429 v->arch.cr3 = 0;
1430 return;
1432 #endif
1434 pfn = pagetable_get_pfn(v->arch.guest_table);
1435 if ( pfn != 0 )
1437 if ( paging_mode_refcounts(d) )
1438 put_page(mfn_to_page(pfn));
1439 else
1440 put_page_and_type(mfn_to_page(pfn));
1441 #ifdef __x86_64__
1442 if ( pfn == pagetable_get_pfn(v->arch.guest_table_user) )
1443 v->arch.guest_table_user = pagetable_null();
1444 #endif
1445 v->arch.guest_table = pagetable_null();
1448 #ifdef __x86_64__
1449 /* Drop ref to guest_table_user (from MMUEXT_NEW_USER_BASEPTR) */
1450 pfn = pagetable_get_pfn(v->arch.guest_table_user);
1451 if ( pfn != 0 )
1453 if ( paging_mode_refcounts(d) )
1454 put_page(mfn_to_page(pfn));
1455 else
1456 put_page_and_type(mfn_to_page(pfn));
1457 v->arch.guest_table_user = pagetable_null();
1459 #endif
1461 v->arch.cr3 = 0;
1464 void domain_relinquish_resources(struct domain *d)
1466 struct vcpu *v;
1468 BUG_ON(!cpus_empty(d->domain_dirty_cpumask));
1470 /* Drop the in-use references to page-table bases. */
1471 for_each_vcpu ( d, v )
1472 vcpu_destroy_pagetables(v);
1474 /* Tear down paging-assistance stuff. */
1475 paging_teardown(d);
1477 /*
1478 * Relinquish GDT mappings. No need for explicit unmapping of the LDT as
1479 * it automatically gets squashed when the guest's mappings go away.
1480 */
1481 for_each_vcpu(d, v)
1482 destroy_gdt(v);
1484 /* Relinquish every page of memory. */
1485 relinquish_memory(d, &d->xenpage_list);
1486 relinquish_memory(d, &d->page_list);
1488 /* Free page used by xen oprofile buffer */
1489 free_xenoprof_pages(d);
1492 void arch_dump_domain_info(struct domain *d)
1494 paging_dump_domain_info(d);
1497 void arch_dump_vcpu_info(struct vcpu *v)
1499 paging_dump_vcpu_info(v);
1502 /*
1503 * Local variables:
1504 * mode: C
1505 * c-set-style: "BSD"
1506 * c-basic-offset: 4
1507 * tab-width: 4
1508 * indent-tabs-mode: nil
1509 * End:
1510 */