ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-xen/asm-i386/hypercall.h @ 6294:1a0723cd37f1

Fix many uses of machine addresses in XenLinux. Primarily
this fixes users of virt_to_machine/machine_to_virt to
use virt_to_mfn/mfn_to_virt where that is more appropriate.

This should be a big step to improved PAE stability.

Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Fri Aug 19 16:06:43 2005 +0000 (2005-08-19)
parents 47d49e8b8042
children f51fe43c5d1c 5f4724c13040 81576d3d1ca8 3a8f27c6d56c
line source
1 /******************************************************************************
2 * hypercall.h
3 *
4 * Linux-specific hypervisor handling.
5 *
6 * Copyright (c) 2002-2004, K A Fraser
7 *
8 * This file may be distributed separately from the Linux kernel, or
9 * incorporated into other software packages, subject to the following license:
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a copy
12 * of this source file (the "Software"), to deal in the Software without
13 * restriction, including without limitation the rights to use, copy, modify,
14 * merge, publish, distribute, sublicense, and/or sell copies of the Software,
15 * and to permit persons to whom the Software is furnished to do so, subject to
16 * the following conditions:
17 *
18 * The above copyright notice and this permission notice shall be included in
19 * all copies or substantial portions of the Software.
20 *
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
24 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 * IN THE SOFTWARE.
28 */
30 #ifndef __HYPERCALL_H__
31 #define __HYPERCALL_H__
32 #include <asm-xen/xen-public/xen.h>
34 /*
35 * Assembler stubs for hyper-calls.
36 */
38 static inline int
39 HYPERVISOR_set_trap_table(
40 trap_info_t *table)
41 {
42 int ret;
43 unsigned long ignore;
45 __asm__ __volatile__ (
46 TRAP_INSTR
47 : "=a" (ret), "=b" (ignore)
48 : "0" (__HYPERVISOR_set_trap_table), "1" (table)
49 : "memory" );
51 return ret;
52 }
54 static inline int
55 HYPERVISOR_mmu_update(
56 mmu_update_t *req, int count, int *success_count, domid_t domid)
57 {
58 int ret;
59 unsigned long ign1, ign2, ign3, ign4;
61 __asm__ __volatile__ (
62 TRAP_INSTR
63 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
64 : "0" (__HYPERVISOR_mmu_update), "1" (req), "2" (count),
65 "3" (success_count), "4" (domid)
66 : "memory" );
68 return ret;
69 }
71 static inline int
72 HYPERVISOR_mmuext_op(
73 struct mmuext_op *op, int count, int *success_count, domid_t domid)
74 {
75 int ret;
76 unsigned long ign1, ign2, ign3, ign4;
78 __asm__ __volatile__ (
79 TRAP_INSTR
80 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
81 : "0" (__HYPERVISOR_mmuext_op), "1" (op), "2" (count),
82 "3" (success_count), "4" (domid)
83 : "memory" );
85 return ret;
86 }
88 static inline int
89 HYPERVISOR_set_gdt(
90 unsigned long *frame_list, int entries)
91 {
92 int ret;
93 unsigned long ign1, ign2;
95 __asm__ __volatile__ (
96 TRAP_INSTR
97 : "=a" (ret), "=b" (ign1), "=c" (ign2)
98 : "0" (__HYPERVISOR_set_gdt), "1" (frame_list), "2" (entries)
99 : "memory" );
102 return ret;
103 }
105 static inline int
106 HYPERVISOR_stack_switch(
107 unsigned long ss, unsigned long esp)
108 {
109 int ret;
110 unsigned long ign1, ign2;
112 __asm__ __volatile__ (
113 TRAP_INSTR
114 : "=a" (ret), "=b" (ign1), "=c" (ign2)
115 : "0" (__HYPERVISOR_stack_switch), "1" (ss), "2" (esp)
116 : "memory" );
118 return ret;
119 }
121 static inline int
122 HYPERVISOR_set_callbacks(
123 unsigned long event_selector, unsigned long event_address,
124 unsigned long failsafe_selector, unsigned long failsafe_address)
125 {
126 int ret;
127 unsigned long ign1, ign2, ign3, ign4;
129 __asm__ __volatile__ (
130 TRAP_INSTR
131 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
132 : "0" (__HYPERVISOR_set_callbacks), "1" (event_selector),
133 "2" (event_address), "3" (failsafe_selector), "4" (failsafe_address)
134 : "memory" );
136 return ret;
137 }
139 static inline int
140 HYPERVISOR_fpu_taskswitch(
141 int set)
142 {
143 int ret;
144 unsigned long ign;
146 __asm__ __volatile__ (
147 TRAP_INSTR
148 : "=a" (ret), "=b" (ign)
149 : "0" (__HYPERVISOR_fpu_taskswitch), "1" (set)
150 : "memory" );
152 return ret;
153 }
155 static inline int
156 HYPERVISOR_yield(
157 void)
158 {
159 int ret;
160 unsigned long ign;
162 __asm__ __volatile__ (
163 TRAP_INSTR
164 : "=a" (ret), "=b" (ign)
165 : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_yield)
166 : "memory", "ecx" );
168 return ret;
169 }
171 static inline int
172 HYPERVISOR_block(
173 void)
174 {
175 int ret;
176 unsigned long ign1;
177 __asm__ __volatile__ (
178 TRAP_INSTR
179 : "=a" (ret), "=b" (ign1)
180 : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_block)
181 : "memory", "ecx" );
183 return ret;
184 }
186 static inline int
187 HYPERVISOR_shutdown(
188 void)
189 {
190 int ret;
191 unsigned long ign1;
192 __asm__ __volatile__ (
193 TRAP_INSTR
194 : "=a" (ret), "=b" (ign1)
195 : "0" (__HYPERVISOR_sched_op),
196 "1" (SCHEDOP_shutdown | (SHUTDOWN_poweroff << SCHEDOP_reasonshift))
197 : "memory", "ecx" );
199 return ret;
200 }
202 static inline int
203 HYPERVISOR_reboot(
204 void)
205 {
206 int ret;
207 unsigned long ign1;
208 __asm__ __volatile__ (
209 TRAP_INSTR
210 : "=a" (ret), "=b" (ign1)
211 : "0" (__HYPERVISOR_sched_op),
212 "1" (SCHEDOP_shutdown | (SHUTDOWN_reboot << SCHEDOP_reasonshift))
213 : "memory", "ecx" );
215 return ret;
216 }
218 static inline int
219 HYPERVISOR_suspend(
220 unsigned long srec)
221 {
222 int ret;
223 unsigned long ign1, ign2;
225 /* NB. On suspend, control software expects a suspend record in %esi. */
226 __asm__ __volatile__ (
227 TRAP_INSTR
228 : "=a" (ret), "=b" (ign1), "=S" (ign2)
229 : "0" (__HYPERVISOR_sched_op),
230 "b" (SCHEDOP_shutdown | (SHUTDOWN_suspend << SCHEDOP_reasonshift)),
231 "S" (srec) : "memory", "ecx");
233 return ret;
234 }
236 static inline int
237 HYPERVISOR_crash(
238 void)
239 {
240 int ret;
241 unsigned long ign1;
242 __asm__ __volatile__ (
243 TRAP_INSTR
244 : "=a" (ret), "=b" (ign1)
245 : "0" (__HYPERVISOR_sched_op),
246 "1" (SCHEDOP_shutdown | (SHUTDOWN_crash << SCHEDOP_reasonshift))
247 : "memory", "ecx" );
249 return ret;
250 }
252 static inline long
253 HYPERVISOR_set_timer_op(
254 u64 timeout)
255 {
256 int ret;
257 unsigned long timeout_hi = (unsigned long)(timeout>>32);
258 unsigned long timeout_lo = (unsigned long)timeout;
259 unsigned long ign1, ign2;
261 __asm__ __volatile__ (
262 TRAP_INSTR
263 : "=a" (ret), "=b" (ign1), "=c" (ign2)
264 : "0" (__HYPERVISOR_set_timer_op), "b" (timeout_lo), "c" (timeout_hi)
265 : "memory");
267 return ret;
268 }
270 static inline int
271 HYPERVISOR_dom0_op(
272 dom0_op_t *dom0_op)
273 {
274 int ret;
275 unsigned long ign1;
277 dom0_op->interface_version = DOM0_INTERFACE_VERSION;
278 __asm__ __volatile__ (
279 TRAP_INSTR
280 : "=a" (ret), "=b" (ign1)
281 : "0" (__HYPERVISOR_dom0_op), "1" (dom0_op)
282 : "memory");
284 return ret;
285 }
287 static inline int
288 HYPERVISOR_set_debugreg(
289 int reg, unsigned long value)
290 {
291 int ret;
292 unsigned long ign1, ign2;
293 __asm__ __volatile__ (
294 TRAP_INSTR
295 : "=a" (ret), "=b" (ign1), "=c" (ign2)
296 : "0" (__HYPERVISOR_set_debugreg), "1" (reg), "2" (value)
297 : "memory" );
299 return ret;
300 }
302 static inline unsigned long
303 HYPERVISOR_get_debugreg(
304 int reg)
305 {
306 unsigned long ret;
307 unsigned long ign;
308 __asm__ __volatile__ (
309 TRAP_INSTR
310 : "=a" (ret), "=b" (ign)
311 : "0" (__HYPERVISOR_get_debugreg), "1" (reg)
312 : "memory" );
314 return ret;
315 }
317 static inline int
318 HYPERVISOR_update_descriptor(
319 u64 ma, u64 desc)
320 {
321 int ret;
322 unsigned long ign1, ign2, ign3, ign4;
324 __asm__ __volatile__ (
325 TRAP_INSTR
326 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
327 : "0" (__HYPERVISOR_update_descriptor),
328 "1" ((unsigned long)ma), "2" ((unsigned long)(ma>>32)),
329 "3" ((unsigned long)desc), "4" ((unsigned long)(desc>>32))
330 : "memory" );
332 return ret;
333 }
335 static inline int
336 HYPERVISOR_dom_mem_op(
337 unsigned int op, unsigned long *extent_list,
338 unsigned long nr_extents, unsigned int extent_order)
339 {
340 int ret;
341 unsigned long ign1, ign2, ign3, ign4, ign5;
343 __asm__ __volatile__ (
344 TRAP_INSTR
345 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4),
346 "=D" (ign5)
347 : "0" (__HYPERVISOR_dom_mem_op), "1" (op), "2" (extent_list),
348 "3" (nr_extents), "4" (extent_order), "5" (DOMID_SELF)
349 : "memory" );
351 return ret;
352 }
354 static inline int
355 HYPERVISOR_multicall(
356 void *call_list, int nr_calls)
357 {
358 int ret;
359 unsigned long ign1, ign2;
361 __asm__ __volatile__ (
362 TRAP_INSTR
363 : "=a" (ret), "=b" (ign1), "=c" (ign2)
364 : "0" (__HYPERVISOR_multicall), "1" (call_list), "2" (nr_calls)
365 : "memory" );
367 return ret;
368 }
370 static inline int
371 HYPERVISOR_update_va_mapping(
372 unsigned long va, pte_t new_val, unsigned long flags)
373 {
374 int ret;
375 unsigned long ign1, ign2, ign3, ign4;
377 __asm__ __volatile__ (
378 TRAP_INSTR
379 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
380 : "0" (__HYPERVISOR_update_va_mapping),
381 "1" (va), "2" ((new_val).pte_low),
382 #ifdef CONFIG_X86_PAE
383 "3" ((new_val).pte_high),
384 #else
385 "3" (0),
386 #endif
387 "4" (flags)
388 : "memory" );
390 return ret;
391 }
393 static inline int
394 HYPERVISOR_event_channel_op(
395 void *op)
396 {
397 int ret;
398 unsigned long ignore;
399 __asm__ __volatile__ (
400 TRAP_INSTR
401 : "=a" (ret), "=b" (ignore)
402 : "0" (__HYPERVISOR_event_channel_op), "1" (op)
403 : "memory" );
405 return ret;
406 }
408 static inline int
409 HYPERVISOR_xen_version(
410 int cmd)
411 {
412 int ret;
413 unsigned long ignore;
415 __asm__ __volatile__ (
416 TRAP_INSTR
417 : "=a" (ret), "=b" (ignore)
418 : "0" (__HYPERVISOR_xen_version), "1" (cmd)
419 : "memory" );
421 return ret;
422 }
424 static inline int
425 HYPERVISOR_console_io(
426 int cmd, int count, char *str)
427 {
428 int ret;
429 unsigned long ign1, ign2, ign3;
430 __asm__ __volatile__ (
431 TRAP_INSTR
432 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
433 : "0" (__HYPERVISOR_console_io), "1" (cmd), "2" (count), "3" (str)
434 : "memory" );
436 return ret;
437 }
439 static inline int
440 HYPERVISOR_physdev_op(
441 void *physdev_op)
442 {
443 int ret;
444 unsigned long ign;
446 __asm__ __volatile__ (
447 TRAP_INSTR
448 : "=a" (ret), "=b" (ign)
449 : "0" (__HYPERVISOR_physdev_op), "1" (physdev_op)
450 : "memory" );
452 return ret;
453 }
455 static inline int
456 HYPERVISOR_grant_table_op(
457 unsigned int cmd, void *uop, unsigned int count)
458 {
459 int ret;
460 unsigned long ign1, ign2, ign3;
462 __asm__ __volatile__ (
463 TRAP_INSTR
464 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
465 : "0" (__HYPERVISOR_grant_table_op), "1" (cmd), "2" (uop), "3" (count)
466 : "memory" );
468 return ret;
469 }
471 static inline int
472 HYPERVISOR_update_va_mapping_otherdomain(
473 unsigned long va, pte_t new_val, unsigned long flags, domid_t domid)
474 {
475 int ret;
476 unsigned long ign1, ign2, ign3, ign4, ign5;
478 __asm__ __volatile__ (
479 TRAP_INSTR
480 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3),
481 "=S" (ign4), "=D" (ign5)
482 : "0" (__HYPERVISOR_update_va_mapping_otherdomain),
483 "1" (va), "2" ((new_val).pte_low),
484 #ifdef CONFIG_X86_PAE
485 "3" ((new_val).pte_high),
486 #else
487 "3" (0),
488 #endif
489 "4" (flags), "5" (domid) :
490 "memory" );
492 return ret;
493 }
495 static inline int
496 HYPERVISOR_vm_assist(
497 unsigned int cmd, unsigned int type)
498 {
499 int ret;
500 unsigned long ign1, ign2;
502 __asm__ __volatile__ (
503 TRAP_INSTR
504 : "=a" (ret), "=b" (ign1), "=c" (ign2)
505 : "0" (__HYPERVISOR_vm_assist), "1" (cmd), "2" (type)
506 : "memory" );
508 return ret;
509 }
511 static inline int
512 HYPERVISOR_boot_vcpu(
513 unsigned long vcpu, vcpu_guest_context_t *ctxt)
514 {
515 int ret;
516 unsigned long ign1, ign2;
518 __asm__ __volatile__ (
519 TRAP_INSTR
520 : "=a" (ret), "=b" (ign1), "=c" (ign2)
521 : "0" (__HYPERVISOR_boot_vcpu), "1" (vcpu), "2" (ctxt)
522 : "memory");
524 return ret;
525 }
527 static inline int
528 HYPERVISOR_vcpu_down(
529 int vcpu)
530 {
531 int ret;
532 unsigned long ign1;
533 /* Yes, I really do want to clobber edx here: when we resume a
534 vcpu after unpickling a multi-processor domain, it returns
535 here, but clobbers all of the call clobbered registers. */
536 __asm__ __volatile__ (
537 TRAP_INSTR
538 : "=a" (ret), "=b" (ign1)
539 : "0" (__HYPERVISOR_sched_op),
540 "1" (SCHEDOP_vcpu_down | (vcpu << SCHEDOP_vcpushift))
541 : "memory", "ecx", "edx" );
543 return ret;
544 }
546 static inline int
547 HYPERVISOR_vcpu_up(
548 int vcpu)
549 {
550 int ret;
551 unsigned long ign1;
552 __asm__ __volatile__ (
553 TRAP_INSTR
554 : "=a" (ret), "=b" (ign1)
555 : "0" (__HYPERVISOR_sched_op),
556 "1" (SCHEDOP_vcpu_up | (vcpu << SCHEDOP_vcpushift))
557 : "memory", "ecx" );
559 return ret;
560 }
562 static inline int
563 HYPERVISOR_vcpu_pickle(
564 int vcpu, vcpu_guest_context_t *ctxt)
565 {
566 int ret;
567 unsigned long ign1, ign2;
568 __asm__ __volatile__ (
569 TRAP_INSTR
570 : "=a" (ret), "=b" (ign1), "=c" (ign2)
571 : "0" (__HYPERVISOR_sched_op),
572 "1" (SCHEDOP_vcpu_pickle | (vcpu << SCHEDOP_vcpushift)),
573 "2" (ctxt)
574 : "memory" );
576 return ret;
577 }
579 #endif /* __HYPERCALL_H__ */