ia64/xen-unstable

view xen/include/asm-ia64/vcpu.h @ 9756:14a34d811e81

[IA64] introduce P2M conversion

introduce P2M conversion functions necessary for dom0vp model.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author awilliam@ldap.hp.com
date Tue Apr 25 13:06:57 2006 -0600 (2006-04-25)
parents c3972d632ff6
children 2d2ef3f4c747
line source
1 #ifndef _XEN_IA64_VCPU_H
2 #define _XEN_IA64_VCPU_H
4 // TODO: Many (or perhaps most) of these should eventually be
5 // static inline functions
7 //#include "thread.h"
8 #include <asm/ia64_int.h>
9 #include <public/arch-ia64.h>
10 typedef unsigned long UINT64;
11 typedef unsigned int UINT;
12 typedef int BOOLEAN;
13 struct vcpu;
14 typedef struct vcpu VCPU;
16 typedef cpu_user_regs_t REGS;
19 /* Note: PSCB stands for Privilegied State Communication Block. */
20 #define VCPU(_v,_x) (_v->arch.privregs->_x)
21 #define PSCB(_v,_x) VCPU(_v,_x)
22 #define PSCBX(_v,_x) (_v->arch._x)
24 #define PRIVOP_ADDR_COUNT
25 #ifdef PRIVOP_ADDR_COUNT
26 #define _GET_IFA 0
27 #define _THASH 1
28 #define PRIVOP_COUNT_NINSTS 2
29 #define PRIVOP_COUNT_NADDRS 30
31 struct privop_addr_count {
32 char *instname;
33 unsigned long addr[PRIVOP_COUNT_NADDRS];
34 unsigned long count[PRIVOP_COUNT_NADDRS];
35 unsigned long overflow;
36 };
37 #endif
39 /* general registers */
40 extern UINT64 vcpu_get_gr(VCPU *vcpu, unsigned long reg);
41 extern IA64FAULT vcpu_get_gr_nat(VCPU *vcpu, unsigned long reg, UINT64 *val);
42 extern IA64FAULT vcpu_set_gr(VCPU *vcpu, unsigned long reg, UINT64 value, int nat);
43 extern IA64FAULT vcpu_get_fpreg(VCPU *vcpu, unsigned long reg, struct ia64_fpreg *val);
45 /* application registers */
46 extern void vcpu_load_kernel_regs(VCPU *vcpu);
47 extern IA64FAULT vcpu_set_ar(VCPU *vcpu, UINT64 reg, UINT64 val);
48 extern IA64FAULT vcpu_get_ar(VCPU *vcpu, UINT64 reg, UINT64 *val);
49 /* psr */
50 extern BOOLEAN vcpu_get_psr_ic(VCPU *vcpu);
51 extern UINT64 vcpu_get_ipsr_int_state(VCPU *vcpu,UINT64 prevpsr);
52 extern IA64FAULT vcpu_get_psr(VCPU *vcpu, UINT64 *pval);
53 extern IA64FAULT vcpu_reset_psr_sm(VCPU *vcpu, UINT64 imm);
54 extern IA64FAULT vcpu_set_psr_sm(VCPU *vcpu, UINT64 imm);
55 extern IA64FAULT vcpu_set_psr_l(VCPU *vcpu, UINT64 val);
56 extern IA64FAULT vcpu_set_psr_i(VCPU *vcpu);
57 extern IA64FAULT vcpu_reset_psr_dt(VCPU *vcpu);
58 extern IA64FAULT vcpu_set_psr_dt(VCPU *vcpu);
59 /* control registers */
60 extern IA64FAULT vcpu_set_dcr(VCPU *vcpu, UINT64 val);
61 extern IA64FAULT vcpu_set_itm(VCPU *vcpu, UINT64 val);
62 extern IA64FAULT vcpu_set_iva(VCPU *vcpu, UINT64 val);
63 extern IA64FAULT vcpu_set_pta(VCPU *vcpu, UINT64 val);
64 extern IA64FAULT vcpu_set_ipsr(VCPU *vcpu, UINT64 val);
65 extern IA64FAULT vcpu_set_isr(VCPU *vcpu, UINT64 val);
66 extern IA64FAULT vcpu_set_iip(VCPU *vcpu, UINT64 val);
67 extern IA64FAULT vcpu_set_ifa(VCPU *vcpu, UINT64 val);
68 extern IA64FAULT vcpu_set_itir(VCPU *vcpu, UINT64 val);
69 extern IA64FAULT vcpu_set_iipa(VCPU *vcpu, UINT64 val);
70 extern IA64FAULT vcpu_set_ifs(VCPU *vcpu, UINT64 val);
71 extern IA64FAULT vcpu_set_iim(VCPU *vcpu, UINT64 val);
72 extern IA64FAULT vcpu_set_iha(VCPU *vcpu, UINT64 val);
73 extern IA64FAULT vcpu_set_lid(VCPU *vcpu, UINT64 val);
74 extern IA64FAULT vcpu_set_tpr(VCPU *vcpu, UINT64 val);
75 extern IA64FAULT vcpu_set_eoi(VCPU *vcpu, UINT64 val);
76 extern IA64FAULT vcpu_set_lrr0(VCPU *vcpu, UINT64 val);
77 extern IA64FAULT vcpu_set_lrr1(VCPU *vcpu, UINT64 val);
78 extern IA64FAULT vcpu_get_dcr(VCPU *vcpu, UINT64 *pval);
79 extern IA64FAULT vcpu_get_itm(VCPU *vcpu, UINT64 *pval);
80 extern IA64FAULT vcpu_get_iva(VCPU *vcpu, UINT64 *pval);
81 extern IA64FAULT vcpu_get_pta(VCPU *vcpu, UINT64 *pval);
82 extern IA64FAULT vcpu_get_ipsr(VCPU *vcpu, UINT64 *pval);
83 extern IA64FAULT vcpu_get_isr(VCPU *vcpu, UINT64 *pval);
84 extern IA64FAULT vcpu_get_iip(VCPU *vcpu, UINT64 *pval);
85 extern IA64FAULT vcpu_increment_iip(VCPU *vcpu);
86 extern IA64FAULT vcpu_get_ifa(VCPU *vcpu, UINT64 *pval);
87 extern IA64FAULT vcpu_get_itir(VCPU *vcpu, UINT64 *pval);
88 extern unsigned long vcpu_get_itir_on_fault(VCPU *vcpu, UINT64 ifa);
89 extern IA64FAULT vcpu_get_iipa(VCPU *vcpu, UINT64 *pval);
90 extern IA64FAULT vcpu_get_ifs(VCPU *vcpu, UINT64 *pval);
91 extern IA64FAULT vcpu_get_iim(VCPU *vcpu, UINT64 *pval);
92 extern IA64FAULT vcpu_get_iha(VCPU *vcpu, UINT64 *pval);
93 extern IA64FAULT vcpu_get_lid(VCPU *vcpu, UINT64 *pval);
94 extern IA64FAULT vcpu_get_tpr(VCPU *vcpu, UINT64 *pval);
95 extern IA64FAULT vcpu_get_irr0(VCPU *vcpu, UINT64 *pval);
96 extern IA64FAULT vcpu_get_irr1(VCPU *vcpu, UINT64 *pval);
97 extern IA64FAULT vcpu_get_irr2(VCPU *vcpu, UINT64 *pval);
98 extern IA64FAULT vcpu_get_irr3(VCPU *vcpu, UINT64 *pval);
99 extern IA64FAULT vcpu_get_lrr0(VCPU *vcpu, UINT64 *pval);
100 extern IA64FAULT vcpu_get_lrr1(VCPU *vcpu, UINT64 *pval);
101 /* interrupt registers */
102 extern void vcpu_pend_unspecified_interrupt(VCPU *vcpu);
103 extern UINT64 vcpu_check_pending_interrupts(VCPU *vcpu);
104 extern IA64FAULT vcpu_get_itv(VCPU *vcpu,UINT64 *pval);
105 extern IA64FAULT vcpu_get_pmv(VCPU *vcpu,UINT64 *pval);
106 extern IA64FAULT vcpu_get_cmcv(VCPU *vcpu,UINT64 *pval);
107 extern IA64FAULT vcpu_get_ivr(VCPU *vcpu, UINT64 *pval);
108 extern IA64FAULT vcpu_set_itv(VCPU *vcpu, UINT64 val);
109 extern IA64FAULT vcpu_set_pmv(VCPU *vcpu, UINT64 val);
110 extern IA64FAULT vcpu_set_cmcv(VCPU *vcpu, UINT64 val);
111 /* interval timer registers */
112 extern IA64FAULT vcpu_set_itc(VCPU *vcpu,UINT64 val);
113 extern UINT64 vcpu_timer_pending_early(VCPU *vcpu);
114 /* debug breakpoint registers */
115 extern IA64FAULT vcpu_set_ibr(VCPU *vcpu,UINT64 reg,UINT64 val);
116 extern IA64FAULT vcpu_set_dbr(VCPU *vcpu,UINT64 reg,UINT64 val);
117 extern IA64FAULT vcpu_get_ibr(VCPU *vcpu,UINT64 reg,UINT64 *pval);
118 extern IA64FAULT vcpu_get_dbr(VCPU *vcpu,UINT64 reg,UINT64 *pval);
119 /* performance monitor registers */
120 extern IA64FAULT vcpu_set_pmc(VCPU *vcpu,UINT64 reg,UINT64 val);
121 extern IA64FAULT vcpu_set_pmd(VCPU *vcpu,UINT64 reg,UINT64 val);
122 extern IA64FAULT vcpu_get_pmc(VCPU *vcpu,UINT64 reg,UINT64 *pval);
123 extern IA64FAULT vcpu_get_pmd(VCPU *vcpu,UINT64 reg,UINT64 *pval);
124 /* banked general registers */
125 extern IA64FAULT vcpu_bsw0(VCPU *vcpu);
126 extern IA64FAULT vcpu_bsw1(VCPU *vcpu);
127 /* region registers */
128 extern IA64FAULT vcpu_set_rr(VCPU *vcpu,UINT64 reg,UINT64 val);
129 extern IA64FAULT vcpu_get_rr(VCPU *vcpu,UINT64 reg,UINT64 *pval);
130 extern IA64FAULT vcpu_get_rr_ve(VCPU *vcpu,UINT64 vadr);
131 /* protection key registers */
132 extern IA64FAULT vcpu_get_pkr(VCPU *vcpu, UINT64 reg, UINT64 *pval);
133 extern IA64FAULT vcpu_set_pkr(VCPU *vcpu, UINT64 reg, UINT64 val);
134 extern IA64FAULT vcpu_tak(VCPU *vcpu, UINT64 vadr, UINT64 *key);
135 /* TLB */
136 extern void vcpu_purge_tr_entry(TR_ENTRY *trp);
137 extern IA64FAULT vcpu_itr_d(VCPU *vcpu, UINT64 slot, UINT64 padr,
138 UINT64 itir, UINT64 ifa);
139 extern IA64FAULT vcpu_itr_i(VCPU *vcpu, UINT64 slot, UINT64 padr,
140 UINT64 itir, UINT64 ifa);
141 extern IA64FAULT vcpu_itc_d(VCPU *vcpu, UINT64 padr, UINT64 itir, UINT64 ifa);
142 extern IA64FAULT vcpu_itc_i(VCPU *vcpu, UINT64 padr, UINT64 itir, UINT64 ifa);
143 extern IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);
144 extern IA64FAULT vcpu_ptc_e(VCPU *vcpu, UINT64 vadr);
145 extern IA64FAULT vcpu_ptc_g(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);
146 extern IA64FAULT vcpu_ptc_ga(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);
147 extern IA64FAULT vcpu_ptr_d(VCPU *vcpu,UINT64 vadr, UINT64 addr_range);
148 extern IA64FAULT vcpu_ptr_i(VCPU *vcpu,UINT64 vadr, UINT64 addr_range);
149 extern IA64FAULT vcpu_translate(VCPU *vcpu, UINT64 address,
150 BOOLEAN is_data, BOOLEAN in_tpa,
151 UINT64 *pteval, UINT64 *itir, UINT64 *iha);
152 extern IA64FAULT vcpu_tpa(VCPU *vcpu, UINT64 vadr, UINT64 *padr);
153 extern IA64FAULT vcpu_force_data_miss(VCPU *vcpu, UINT64 ifa);
154 extern IA64FAULT vcpu_fc(VCPU *vcpu, UINT64 vadr);
155 /* misc */
156 extern IA64FAULT vcpu_rfi(VCPU *vcpu);
157 extern IA64FAULT vcpu_thash(VCPU *vcpu, UINT64 vadr, UINT64 *pval);
158 extern IA64FAULT vcpu_cover(VCPU *vcpu);
159 extern IA64FAULT vcpu_ttag(VCPU *vcpu, UINT64 vadr, UINT64 *padr);
160 extern IA64FAULT vcpu_get_cpuid(VCPU *vcpu, UINT64 reg, UINT64 *pval);
162 extern void vcpu_pend_interrupt(VCPU *vcpu, UINT64 vector);
163 extern void vcpu_pend_timer(VCPU *vcpu);
164 extern void vcpu_poke_timer(VCPU *vcpu);
165 extern void vcpu_set_next_timer(VCPU *vcpu);
166 extern BOOLEAN vcpu_timer_expired(VCPU *vcpu);
167 extern UINT64 vcpu_deliverable_interrupts(VCPU *vcpu);
168 extern void vcpu_itc_no_srlz(VCPU *vcpu, UINT64, UINT64, UINT64, UINT64, UINT64);
169 extern UINT64 vcpu_get_tmp(VCPU *, UINT64);
170 extern void vcpu_set_tmp(VCPU *, UINT64, UINT64);
172 static inline UINT64
173 itir_ps(UINT64 itir)
174 {
175 return ((itir >> 2) & 0x3f);
176 }
178 static inline UINT64
179 itir_mask(UINT64 itir)
180 {
181 return (~((1UL << itir_ps(itir)) - 1));
182 }
184 #define verbose(a...) do {if (vcpu_verbose) printf(a);} while(0)
186 //#define vcpu_quick_region_check(_tr_regions,_ifa) 1
187 #define vcpu_quick_region_check(_tr_regions,_ifa) \
188 (_tr_regions & (1 << ((unsigned long)_ifa >> 61)))
189 #define vcpu_quick_region_set(_tr_regions,_ifa) \
190 do {_tr_regions |= (1 << ((unsigned long)_ifa >> 61)); } while (0)
193 #endif