ia64/xen-unstable

view xen/include/asm-x86/hvm/vmx/vmcs.h @ 9952:0c586a81d941

Fix injection of guest faults resulting from failed injection of a
previous event. We enter an infinite loop if the original failed
injection cannot be fixed up by Xen (e.g., because it's not a shadow
pagetable issue).

The RHEL4 HVM guest hang issue was actually a side effect of
change-set 9699. In the rhel4 guest hang rc.sysinit init-script was
calls kmodule program to probe the hardware. The kmodule uses the kudzu
library call probeDevices(). For probing the graphics hardware in the
vbe_get_mode_info() function, sets up the environment and goes into the
vm86 mode to do the int x10 call. For returning back to protected mode
it sets up a int 0xff call. At the time of calling the int 0xff the
guest process pages were not filled up. And it was causing an infinite
loop of vmexits with the IDT_VECTORING_INFO on the int 0xff instruction.

The reason for the infinite loop is changeset 9699. With that
the guest page fault was always getting overridden by the int 0xff gp
fault coming from the IDT_VECTORING_INFO. With the attached patch if VMM
is injecting exceptions like page faults or gp faults then
IDT_VECTORING_INFO field does not override it, and that breaks the
vmexit infinite loop for the rhel4.

Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
author kaf24@firebug.cl.cam.ac.uk
date Fri May 05 14:05:31 2006 +0100 (2006-05-05)
parents f0e14b4e535c
children 81ab21f76a6f
line source
1 /*
2 * vmcs.h: VMCS related definitions
3 * Copyright (c) 2004, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19 #ifndef __ASM_X86_HVM_VMX_VMCS_H__
20 #define __ASM_X86_HVM_VMX_VMCS_H__
22 #include <asm/config.h>
23 #include <asm/hvm/io.h>
24 #include <asm/hvm/vmx/cpu.h>
25 #include <public/hvm/vmx_assist.h>
27 extern int start_vmx(void);
28 extern void stop_vmx(void);
30 void vmx_final_setup_guest(struct vcpu *v);
32 void vmx_enter_scheduler(void);
34 enum {
35 VMX_CPU_STATE_PAE_ENABLED=0,
36 VMX_CPU_STATE_LME_ENABLED,
37 VMX_CPU_STATE_LMA_ENABLED,
38 VMX_CPU_STATE_ASSIST_ENABLED,
39 };
41 #define VMX_LONG_GUEST(ed) \
42 (test_bit(VMX_CPU_STATE_LMA_ENABLED, &ed->arch.hvm_vmx.cpu_state))
44 struct vmcs_struct {
45 u32 vmcs_revision_id;
46 unsigned char data [0]; /* vmcs size is read from MSR */
47 };
49 extern int vmcs_size;
51 enum {
52 VMX_INDEX_MSR_LSTAR = 0,
53 VMX_INDEX_MSR_STAR,
54 VMX_INDEX_MSR_CSTAR,
55 VMX_INDEX_MSR_SYSCALL_MASK,
56 VMX_INDEX_MSR_EFER,
58 VMX_MSR_COUNT,
59 };
61 struct vmx_msr_state {
62 unsigned long flags;
63 unsigned long msr_items[VMX_MSR_COUNT];
64 unsigned long shadow_gs;
65 };
67 struct arch_vmx_struct {
68 struct vmcs_struct *vmcs; /* VMCS pointer in virtual. */
69 unsigned int launch_cpu; /* VMCS is valid on this CPU. */
70 u32 exec_control; /* cache of cpu execution control */
71 u32 vector_injected; /* if there is vector installed in the INTR_INFO_FIELD */
72 unsigned long flags; /* VMCS flags */
73 unsigned long cpu_cr0; /* copy of guest CR0 */
74 unsigned long cpu_shadow_cr0; /* copy of guest read shadow CR0 */
75 unsigned long cpu_cr2; /* save CR2 */
76 unsigned long cpu_cr3;
77 unsigned long cpu_state;
78 unsigned long cpu_based_exec_control;
79 struct vmx_msr_state msr_content;
80 void *io_bitmap_a, *io_bitmap_b;
81 struct timer hlt_timer; /* hlt ins emulation wakeup timer */
82 };
84 #define vmx_schedule_tail(next) \
85 (next)->thread.arch_vmx.arch_vmx_schedule_tail((next))
87 #define ARCH_VMX_VMCS_LOADED 0 /* VMCS has been loaded and active */
88 #define ARCH_VMX_VMCS_LAUNCH 1 /* Needs VMCS launch */
89 #define ARCH_VMX_VMCS_RESUME 2 /* Needs VMCS resume */
91 void vmx_do_resume(struct vcpu *);
92 struct vmcs_struct *alloc_vmcs(void);
93 void destroy_vmcs(struct arch_vmx_struct *arch_vmx);
95 extern void vmx_request_clear_vmcs(struct vcpu *v);
97 #define VMCS_USE_HOST_ENV 1
98 #define VMCS_USE_SEPARATE_ENV 0
100 extern int vmcs_version;
102 #define CPU_BASED_VIRTUAL_INTR_PENDING 0x00000004
103 #define CPU_BASED_USE_TSC_OFFSETING 0x00000008
104 #define CPU_BASED_HLT_EXITING 0x00000080
105 #define CPU_BASED_INVDPG_EXITING 0x00000200
106 #define CPU_BASED_MWAIT_EXITING 0x00000400
107 #define CPU_BASED_RDPMC_EXITING 0x00000800
108 #define CPU_BASED_RDTSC_EXITING 0x00001000
109 #define CPU_BASED_CR8_LOAD_EXITING 0x00080000
110 #define CPU_BASED_CR8_STORE_EXITING 0x00100000
111 #define CPU_BASED_TPR_SHADOW 0x00200000
112 #define CPU_BASED_MOV_DR_EXITING 0x00800000
113 #define CPU_BASED_UNCOND_IO_EXITING 0x01000000
114 #define CPU_BASED_ACTIVATE_IO_BITMAP 0x02000000
115 #define CPU_BASED_MONITOR_EXITING 0x20000000
116 #define CPU_BASED_PAUSE_EXITING 0x40000000
117 #define PIN_BASED_EXT_INTR_MASK 0x1
118 #define PIN_BASED_NMI_EXITING 0x8
120 #define VM_EXIT_ACK_INTR_ON_EXIT 0x00008000
121 #define VM_EXIT_HOST_ADD_SPACE_SIZE 0x00000200
124 /* VMCS Encordings */
125 enum vmcs_field {
126 GUEST_ES_SELECTOR = 0x00000800,
127 GUEST_CS_SELECTOR = 0x00000802,
128 GUEST_SS_SELECTOR = 0x00000804,
129 GUEST_DS_SELECTOR = 0x00000806,
130 GUEST_FS_SELECTOR = 0x00000808,
131 GUEST_GS_SELECTOR = 0x0000080a,
132 GUEST_LDTR_SELECTOR = 0x0000080c,
133 GUEST_TR_SELECTOR = 0x0000080e,
134 HOST_ES_SELECTOR = 0x00000c00,
135 HOST_CS_SELECTOR = 0x00000c02,
136 HOST_SS_SELECTOR = 0x00000c04,
137 HOST_DS_SELECTOR = 0x00000c06,
138 HOST_FS_SELECTOR = 0x00000c08,
139 HOST_GS_SELECTOR = 0x00000c0a,
140 HOST_TR_SELECTOR = 0x00000c0c,
141 IO_BITMAP_A = 0x00002000,
142 IO_BITMAP_A_HIGH = 0x00002001,
143 IO_BITMAP_B = 0x00002002,
144 IO_BITMAP_B_HIGH = 0x00002003,
145 VM_EXIT_MSR_STORE_ADDR = 0x00002006,
146 VM_EXIT_MSR_STORE_ADDR_HIGH = 0x00002007,
147 VM_EXIT_MSR_LOAD_ADDR = 0x00002008,
148 VM_EXIT_MSR_LOAD_ADDR_HIGH = 0x00002009,
149 VM_ENTRY_MSR_LOAD_ADDR = 0x0000200a,
150 VM_ENTRY_MSR_LOAD_ADDR_HIGH = 0x0000200b,
151 TSC_OFFSET = 0x00002010,
152 TSC_OFFSET_HIGH = 0x00002011,
153 VIRTUAL_APIC_PAGE_ADDR = 0x00002012,
154 VIRTUAL_APIC_PAGE_ADDR_HIGH = 0x00002013,
155 VMCS_LINK_POINTER = 0x00002800,
156 VMCS_LINK_POINTER_HIGH = 0x00002801,
157 GUEST_IA32_DEBUGCTL = 0x00002802,
158 GUEST_IA32_DEBUGCTL_HIGH = 0x00002803,
159 PIN_BASED_VM_EXEC_CONTROL = 0x00004000,
160 CPU_BASED_VM_EXEC_CONTROL = 0x00004002,
161 EXCEPTION_BITMAP = 0x00004004,
162 PAGE_FAULT_ERROR_CODE_MASK = 0x00004006,
163 PAGE_FAULT_ERROR_CODE_MATCH = 0x00004008,
164 CR3_TARGET_COUNT = 0x0000400a,
165 VM_EXIT_CONTROLS = 0x0000400c,
166 VM_EXIT_MSR_STORE_COUNT = 0x0000400e,
167 VM_EXIT_MSR_LOAD_COUNT = 0x00004010,
168 VM_ENTRY_CONTROLS = 0x00004012,
169 VM_ENTRY_MSR_LOAD_COUNT = 0x00004014,
170 VM_ENTRY_INTR_INFO_FIELD = 0x00004016,
171 VM_ENTRY_EXCEPTION_ERROR_CODE = 0x00004018,
172 VM_ENTRY_INSTRUCTION_LEN = 0x0000401a,
173 TPR_THRESHOLD = 0x0000401c,
174 SECONDARY_VM_EXEC_CONTROL = 0x0000401e,
175 VM_INSTRUCTION_ERROR = 0x00004400,
176 VM_EXIT_REASON = 0x00004402,
177 VM_EXIT_INTR_INFO = 0x00004404,
178 VM_EXIT_INTR_ERROR_CODE = 0x00004406,
179 IDT_VECTORING_INFO_FIELD = 0x00004408,
180 IDT_VECTORING_ERROR_CODE = 0x0000440a,
181 VM_EXIT_INSTRUCTION_LEN = 0x0000440c,
182 VMX_INSTRUCTION_INFO = 0x0000440e,
183 GUEST_ES_LIMIT = 0x00004800,
184 GUEST_CS_LIMIT = 0x00004802,
185 GUEST_SS_LIMIT = 0x00004804,
186 GUEST_DS_LIMIT = 0x00004806,
187 GUEST_FS_LIMIT = 0x00004808,
188 GUEST_GS_LIMIT = 0x0000480a,
189 GUEST_LDTR_LIMIT = 0x0000480c,
190 GUEST_TR_LIMIT = 0x0000480e,
191 GUEST_GDTR_LIMIT = 0x00004810,
192 GUEST_IDTR_LIMIT = 0x00004812,
193 GUEST_ES_AR_BYTES = 0x00004814,
194 GUEST_CS_AR_BYTES = 0x00004816,
195 GUEST_SS_AR_BYTES = 0x00004818,
196 GUEST_DS_AR_BYTES = 0x0000481a,
197 GUEST_FS_AR_BYTES = 0x0000481c,
198 GUEST_GS_AR_BYTES = 0x0000481e,
199 GUEST_LDTR_AR_BYTES = 0x00004820,
200 GUEST_TR_AR_BYTES = 0x00004822,
201 GUEST_INTERRUPTIBILITY_INFO = 0x00004824,
202 GUEST_SYSENTER_CS = 0x0000482A,
203 HOST_IA32_SYSENTER_CS = 0x00004c00,
204 CR0_GUEST_HOST_MASK = 0x00006000,
205 CR4_GUEST_HOST_MASK = 0x00006002,
206 CR0_READ_SHADOW = 0x00006004,
207 CR4_READ_SHADOW = 0x00006006,
208 CR3_TARGET_VALUE0 = 0x00006008,
209 CR3_TARGET_VALUE1 = 0x0000600a,
210 CR3_TARGET_VALUE2 = 0x0000600c,
211 CR3_TARGET_VALUE3 = 0x0000600e,
212 EXIT_QUALIFICATION = 0x00006400,
213 GUEST_LINEAR_ADDRESS = 0x0000640a,
214 GUEST_CR0 = 0x00006800,
215 GUEST_CR3 = 0x00006802,
216 GUEST_CR4 = 0x00006804,
217 GUEST_ES_BASE = 0x00006806,
218 GUEST_CS_BASE = 0x00006808,
219 GUEST_SS_BASE = 0x0000680a,
220 GUEST_DS_BASE = 0x0000680c,
221 GUEST_FS_BASE = 0x0000680e,
222 GUEST_GS_BASE = 0x00006810,
223 GUEST_LDTR_BASE = 0x00006812,
224 GUEST_TR_BASE = 0x00006814,
225 GUEST_GDTR_BASE = 0x00006816,
226 GUEST_IDTR_BASE = 0x00006818,
227 GUEST_DR7 = 0x0000681a,
228 GUEST_RSP = 0x0000681c,
229 GUEST_RIP = 0x0000681e,
230 GUEST_RFLAGS = 0x00006820,
231 GUEST_PENDING_DBG_EXCEPTIONS = 0x00006822,
232 GUEST_SYSENTER_ESP = 0x00006824,
233 GUEST_SYSENTER_EIP = 0x00006826,
234 HOST_CR0 = 0x00006c00,
235 HOST_CR3 = 0x00006c02,
236 HOST_CR4 = 0x00006c04,
237 HOST_FS_BASE = 0x00006c06,
238 HOST_GS_BASE = 0x00006c08,
239 HOST_TR_BASE = 0x00006c0a,
240 HOST_GDTR_BASE = 0x00006c0c,
241 HOST_IDTR_BASE = 0x00006c0e,
242 HOST_IA32_SYSENTER_ESP = 0x00006c10,
243 HOST_IA32_SYSENTER_EIP = 0x00006c12,
244 HOST_RSP = 0x00006c14,
245 HOST_RIP = 0x00006c16,
246 };
248 #endif /* ASM_X86_HVM_VMX_VMCS_H__ */
250 /*
251 * Local variables:
252 * mode: C
253 * c-set-style: "BSD"
254 * c-basic-offset: 4
255 * tab-width: 4
256 * indent-tabs-mode: nil
257 * End:
258 */