view tools/misc/xm @ 9488:0a6f5527ca4b

[IA64] set itv handoff as masked and enable reading irr[0-3]

Set initial vcpu itv handoff state to mask the timer vector.
This seems to match hardware and makes logical sense from a
spurious interrupt perspective. Enable vcpu_get_irr[0-3]
functions as they seem to work and have the proper backing.
This enables the check_sal_cache_flush() in arch/ia64/kernel.sal.c
to work unmodified, allowing us to remove the Xen changes from
the file (and thus the file from the sparse tree).

Signed-off-by: Alex Williamson <alex.williamson@hp.com>
author awilliam@xenbuild.aw
date Tue Apr 04 09:39:45 2006 -0600 (2006-04-04)
parents 3b385d58d823
children 0e24e9674ded
line source
1 #!/usr/bin/env python
2 # -*- mode: python; -*-
3 import sys
5 # add fallback path for non-native python path installs if needed
6 sys.path.append('/usr/lib/python')
7 sys.path.append('/usr/lib64/python')
8 from xen.xm import main
10 main.main(sys.argv)