ia64/xen-unstable

view xen/include/asm-x86/mtrr.h @ 19237:07e65892fc8e

[VTD] Utilise the snoop control capability in shadow with VT-d code

We compute the shadow PAT index in leaf page entries now as:
1) No VT-d assigned: let shadow PAT index as WB, handled already
in shadow code before.
2) direct assigned MMIO area: let shadow code compute the shadow
PAT with gMTRR=UC and gPAT value.
3) Snoop control enable: let shadow PAT index as WB.
4) Snoop control disable: let shadow code compute the shadow
PAT with gMTRR and gPAT, handled already in shadow code before

Signed-off-by: Xin, Xiaohui <xiaohui.xin@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Feb 20 11:11:40 2009 +0000 (2009-02-20)
parents 175a425e9b55
children
line source
1 #ifndef __ASM_X86_MTRR_H__
2 #define __ASM_X86_MTRR_H__
4 #include <xen/config.h>
6 /* These are the region types. They match the architectural specification. */
7 #define MTRR_TYPE_UNCACHABLE 0
8 #define MTRR_TYPE_WRCOMB 1
9 #define MTRR_TYPE_WRTHROUGH 4
10 #define MTRR_TYPE_WRPROT 5
11 #define MTRR_TYPE_WRBACK 6
12 #define MTRR_NUM_TYPES 7
13 #define MEMORY_NUM_TYPES MTRR_NUM_TYPES
14 #define NO_HARDCODE_MEM_TYPE MTRR_NUM_TYPES
16 #define NORMAL_CACHE_MODE 0
17 #define NO_FILL_CACHE_MODE 2
19 enum {
20 PAT_TYPE_UNCACHABLE=0,
21 PAT_TYPE_WRCOMB=1,
22 PAT_TYPE_RESERVED=2,
23 PAT_TYPE_WRTHROUGH=4,
24 PAT_TYPE_WRPROT=5,
25 PAT_TYPE_WRBACK=6,
26 PAT_TYPE_UC_MINUS=7,
27 PAT_TYPE_NUMS
28 };
30 #define INVALID_MEM_TYPE PAT_TYPE_NUMS
32 /* In the Intel processor's MTRR interface, the MTRR type is always held in
33 an 8 bit field: */
34 typedef u8 mtrr_type;
36 struct mtrr_var_range {
37 u32 base_lo;
38 u32 base_hi;
39 u32 mask_lo;
40 u32 mask_hi;
41 };
43 #define NUM_FIXED_RANGES 88
44 #define NUM_FIXED_MSR 11
45 struct mtrr_state {
46 struct mtrr_var_range *var_ranges;
47 mtrr_type fixed_ranges[NUM_FIXED_RANGES];
48 unsigned char enabled;
49 unsigned char have_fixed;
50 mtrr_type def_type;
52 u64 mtrr_cap;
53 /* ranges in var MSRs are overlapped or not:0(no overlapped) */
54 bool_t overlapped;
55 };
57 extern void mtrr_save_fixed_ranges(void *);
58 extern void mtrr_save_state(void);
59 extern int mtrr_add(unsigned long base, unsigned long size,
60 unsigned int type, char increment);
61 extern int mtrr_add_page(unsigned long base, unsigned long size,
62 unsigned int type, char increment);
63 extern int mtrr_del(int reg, unsigned long base, unsigned long size);
64 extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
65 extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
66 extern u32 get_pat_flags(struct vcpu *v, u32 gl1e_flags, paddr_t gpaddr,
67 paddr_t spaddr, uint8_t gmtrr_mtype);
68 extern uint8_t epte_get_entry_emt(
69 struct domain *d, unsigned long gfn, unsigned long mfn,
70 uint8_t *igmt, int direct_mmio);
71 extern void ept_change_entry_emt_with_range(
72 struct domain *d, unsigned long start_gfn, unsigned long end_gfn);
73 extern unsigned char pat_type_2_pte_flags(unsigned char pat_type);
75 #endif /* __ASM_X86_MTRR_H__ */