ia64/xen-unstable

view linux-2.6-xen-sparse/arch/x86_64/kernel/setup64-xen.c @ 13647:057c4c2991fa

32-on-64: Fix an one-off error in compat_addr_ok().
Signed-off-by: Jan Beulich <jbeulich@novell.com>
author kaf24@localhost.localdomain
date Fri Jan 26 13:36:52 2007 +0000 (2007-01-26)
parents 3adf00179a63
children
line source
1 /*
2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
6 *
7 * Jun Nakajima <jun.nakajima@intel.com>
8 * Modified for Xen
9 *
10 */
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
14 #include <linux/string.h>
15 #include <linux/bootmem.h>
16 #include <linux/bitops.h>
17 #include <linux/module.h>
18 #include <asm/bootsetup.h>
19 #include <asm/pda.h>
20 #include <asm/pgtable.h>
21 #include <asm/processor.h>
22 #include <asm/desc.h>
23 #include <asm/atomic.h>
24 #include <asm/mmu_context.h>
25 #include <asm/smp.h>
26 #include <asm/i387.h>
27 #include <asm/percpu.h>
28 #include <asm/proto.h>
29 #include <asm/sections.h>
30 #ifdef CONFIG_XEN
31 #include <asm/hypervisor.h>
32 #endif
34 char x86_boot_params[BOOT_PARAM_SIZE] __initdata = {0,};
36 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
38 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
39 EXPORT_SYMBOL(_cpu_pda);
40 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
42 #ifndef CONFIG_X86_NO_IDT
43 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
44 #endif
46 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
48 unsigned long __supported_pte_mask __read_mostly = ~0UL;
49 EXPORT_SYMBOL(__supported_pte_mask);
50 static int do_not_nx __cpuinitdata = 0;
52 /* noexec=on|off
53 Control non executable mappings for 64bit processes.
55 on Enable(default)
56 off Disable
57 */
58 int __init nonx_setup(char *str)
59 {
60 if (!strncmp(str, "on", 2)) {
61 __supported_pte_mask |= _PAGE_NX;
62 do_not_nx = 0;
63 } else if (!strncmp(str, "off", 3)) {
64 do_not_nx = 1;
65 __supported_pte_mask &= ~_PAGE_NX;
66 }
67 return 1;
68 }
69 __setup("noexec=", nonx_setup); /* parsed early actually */
71 int force_personality32 = 0;
73 /* noexec32=on|off
74 Control non executable heap for 32bit processes.
75 To control the stack too use noexec=off
77 on PROT_READ does not imply PROT_EXEC for 32bit processes
78 off PROT_READ implies PROT_EXEC (default)
79 */
80 static int __init nonx32_setup(char *str)
81 {
82 if (!strcmp(str, "on"))
83 force_personality32 &= ~READ_IMPLIES_EXEC;
84 else if (!strcmp(str, "off"))
85 force_personality32 |= READ_IMPLIES_EXEC;
86 return 1;
87 }
88 __setup("noexec32=", nonx32_setup);
90 /*
91 * Great future plan:
92 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
93 * Always point %gs to its beginning
94 */
95 void __init setup_per_cpu_areas(void)
96 {
97 int i;
98 unsigned long size;
100 #ifdef CONFIG_HOTPLUG_CPU
101 prefill_possible_map();
102 #endif
104 /* Copy section for each CPU (we discard the original) */
105 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
106 #ifdef CONFIG_MODULES
107 if (size < PERCPU_ENOUGH_ROOM)
108 size = PERCPU_ENOUGH_ROOM;
109 #endif
111 for_each_cpu_mask (i, cpu_possible_map) {
112 char *ptr;
114 if (!NODE_DATA(cpu_to_node(i))) {
115 printk("cpu with no node %d, num_online_nodes %d\n",
116 i, num_online_nodes());
117 ptr = alloc_bootmem(size);
118 } else {
119 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
120 }
121 if (!ptr)
122 panic("Cannot allocate cpu data for CPU %d\n", i);
123 cpu_pda(i)->data_offset = ptr - __per_cpu_start;
124 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
125 }
126 }
128 #ifdef CONFIG_XEN
129 static void switch_pt(void)
130 {
131 xen_pt_switch(__pa(init_level4_pgt));
132 xen_new_user_pt(__pa(init_level4_user_pgt));
133 }
135 void __cpuinit cpu_gdt_init(struct desc_ptr *gdt_descr)
136 {
137 unsigned long frames[16];
138 unsigned long va;
139 int f;
141 for (va = gdt_descr->address, f = 0;
142 va < gdt_descr->address + gdt_descr->size;
143 va += PAGE_SIZE, f++) {
144 frames[f] = virt_to_mfn(va);
145 make_page_readonly(
146 (void *)va, XENFEAT_writable_descriptor_tables);
147 }
148 if (HYPERVISOR_set_gdt(frames, gdt_descr->size /
149 sizeof (struct desc_struct)))
150 BUG();
151 }
152 #else
153 static void switch_pt(void)
154 {
155 asm volatile("movq %0,%%cr3" :: "r" (__pa_symbol(&init_level4_pgt)));
156 }
158 void __init cpu_gdt_init(struct desc_ptr *gdt_descr)
159 {
160 asm volatile("lgdt %0" :: "m" (*gdt_descr));
161 asm volatile("lidt %0" :: "m" (idt_descr));
162 }
163 #endif
165 void pda_init(int cpu)
166 {
167 struct x8664_pda *pda = cpu_pda(cpu);
169 /* Setup up data that may be needed in __get_free_pages early */
170 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
171 #ifndef CONFIG_XEN
172 wrmsrl(MSR_GS_BASE, pda);
173 #else
174 HYPERVISOR_set_segment_base(SEGBASE_GS_KERNEL, (unsigned long)pda);
175 #endif
176 pda->cpunumber = cpu;
177 pda->irqcount = -1;
178 pda->kernelstack =
179 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
180 pda->active_mm = &init_mm;
181 pda->mmu_state = 0;
183 if (cpu == 0) {
184 #ifdef CONFIG_XEN
185 xen_init_pt();
186 #endif
187 /* others are initialized in smpboot.c */
188 pda->pcurrent = &init_task;
189 pda->irqstackptr = boot_cpu_stack;
190 } else {
191 pda->irqstackptr = (char *)
192 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
193 if (!pda->irqstackptr)
194 panic("cannot allocate irqstack for cpu %d", cpu);
195 }
197 switch_pt();
199 pda->irqstackptr += IRQSTACKSIZE-64;
200 }
202 #ifndef CONFIG_X86_NO_TSS
203 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
204 __attribute__((section(".bss.page_aligned")));
205 #endif
207 /* May not be marked __init: used by software suspend */
208 void syscall_init(void)
209 {
210 #ifndef CONFIG_XEN
211 /*
212 * LSTAR and STAR live in a bit strange symbiosis.
213 * They both write to the same internal register. STAR allows to set CS/DS
214 * but only a 32bit target. LSTAR sets the 64bit rip.
215 */
216 wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
217 wrmsrl(MSR_LSTAR, system_call);
219 /* Flags to clear on syscall */
220 wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
221 #endif
222 #ifdef CONFIG_IA32_EMULATION
223 syscall32_cpu_init ();
224 #endif
225 }
227 void __cpuinit check_efer(void)
228 {
229 unsigned long efer;
231 rdmsrl(MSR_EFER, efer);
232 if (!(efer & EFER_NX) || do_not_nx) {
233 __supported_pte_mask &= ~_PAGE_NX;
234 }
235 }
237 /*
238 * cpu_init() initializes state that is per-CPU. Some data is already
239 * initialized (naturally) in the bootstrap process, such as the GDT
240 * and IDT. We reload them nevertheless, this function acts as a
241 * 'CPU state barrier', nothing should get across.
242 * A lot of state is already set up in PDA init.
243 */
244 void __cpuinit cpu_init (void)
245 {
246 int cpu = stack_smp_processor_id();
247 #ifndef CONFIG_X86_NO_TSS
248 struct tss_struct *t = &per_cpu(init_tss, cpu);
249 struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
250 unsigned long v;
251 char *estacks = NULL;
252 unsigned i;
253 #endif
254 struct task_struct *me;
256 /* CPU 0 is initialised in head64.c */
257 if (cpu != 0) {
258 pda_init(cpu);
259 zap_low_mappings(cpu);
260 }
261 #ifndef CONFIG_X86_NO_TSS
262 else
263 estacks = boot_exception_stacks;
264 #endif
266 me = current;
268 if (cpu_test_and_set(cpu, cpu_initialized))
269 panic("CPU#%d already initialized!\n", cpu);
271 printk("Initializing CPU#%d\n", cpu);
273 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
275 /*
276 * Initialize the per-CPU GDT with the boot GDT,
277 * and set up the GDT descriptor:
278 */
279 #ifndef CONFIG_XEN
280 if (cpu)
281 memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
282 #endif
284 cpu_gdt_descr[cpu].size = GDT_SIZE;
285 cpu_gdt_init(&cpu_gdt_descr[cpu]);
287 memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
288 syscall_init();
290 wrmsrl(MSR_FS_BASE, 0);
291 wrmsrl(MSR_KERNEL_GS_BASE, 0);
292 barrier();
294 check_efer();
296 #ifndef CONFIG_X86_NO_TSS
297 /*
298 * set up and load the per-CPU TSS
299 */
300 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
301 if (cpu) {
302 static const unsigned int order[N_EXCEPTION_STACKS] = {
303 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
304 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
305 };
307 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
308 if (!estacks)
309 panic("Cannot allocate exception stack %ld %d\n",
310 v, cpu);
311 }
312 switch (v + 1) {
313 #if DEBUG_STKSZ > EXCEPTION_STKSZ
314 case DEBUG_STACK:
315 cpu_pda(cpu)->debugstack = (unsigned long)estacks;
316 estacks += DEBUG_STKSZ;
317 break;
318 #endif
319 default:
320 estacks += EXCEPTION_STKSZ;
321 break;
322 }
323 orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks;
324 }
326 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
327 /*
328 * <= is required because the CPU will access up to
329 * 8 bits beyond the end of the IO permission bitmap.
330 */
331 for (i = 0; i <= IO_BITMAP_LONGS; i++)
332 t->io_bitmap[i] = ~0UL;
333 #endif
335 atomic_inc(&init_mm.mm_count);
336 me->active_mm = &init_mm;
337 if (me->mm)
338 BUG();
339 enter_lazy_tlb(&init_mm, me);
341 #ifndef CONFIG_X86_NO_TSS
342 set_tss_desc(cpu, t);
343 #endif
344 #ifndef CONFIG_XEN
345 load_TR_desc();
346 #endif
347 load_LDT(&init_mm.context);
349 /*
350 * Clear all 6 debug registers:
351 */
353 set_debugreg(0UL, 0);
354 set_debugreg(0UL, 1);
355 set_debugreg(0UL, 2);
356 set_debugreg(0UL, 3);
357 set_debugreg(0UL, 6);
358 set_debugreg(0UL, 7);
360 fpu_init();
361 }