ia64/xen-unstable

view tools/firmware/hvmloader/apic_regs.h @ 19709:011948e1b5a7

hvmloader: Scan for gpxe-capable NICs until one is found.

Signed-off-by: Akio Takebe <takebe_akio@jp.fujitsu.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Jun 03 16:12:34 2009 +0100 (2009-06-03)
parents d37b210bb8a7
children
line source
1 #ifndef __ASM_APICDEF_H
2 #define __ASM_APICDEF_H
4 #define APIC_DEFAULT_PHYS_BASE 0xfee00000
6 #define APIC_ID 0x20
7 #define APIC_ID_MASK (0xFFu<<24)
8 #define GET_APIC_ID(x) (((x)>>24)&0xFFu)
9 #define SET_APIC_ID(x) (((x)<<24))
10 #define APIC_LVR 0x30
11 #define APIC_LVR_MASK 0xFF00FF
12 #define GET_APIC_VERSION(x) ((x)&0xFF)
13 #define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF)
14 #define APIC_INTEGRATED(x) ((x)&0xF0)
15 #define APIC_XAPIC(x) ((x) >= 0x14)
16 #define APIC_TASKPRI 0x80
17 #define APIC_TPRI_MASK 0xFF
18 #define APIC_ARBPRI 0x90
19 #define APIC_ARBPRI_MASK 0xFF
20 #define APIC_PROCPRI 0xA0
21 #define APIC_EOI 0xB0
22 #define APIC_EIO_ACK 0x0
23 #define APIC_RRR 0xC0
24 #define APIC_LDR 0xD0
25 #define APIC_LDR_MASK (0xFF<<24)
26 #define GET_APIC_LOGICAL_ID(x) (((x)>>24)&0xFF)
27 #define SET_APIC_LOGICAL_ID(x) (((x)<<24))
28 #define APIC_ALL_CPUS 0xFF
29 #define APIC_DFR 0xE0
30 #define APIC_DFR_CLUSTER 0x0FFFFFFFul
31 #define APIC_DFR_FLAT 0xFFFFFFFFul
32 #define APIC_SPIV 0xF0
33 #define APIC_SPIV_FOCUS_DISABLED (1<<9)
34 #define APIC_SPIV_APIC_ENABLED (1<<8)
35 #define APIC_ISR 0x100
36 #define APIC_TMR 0x180
37 #define APIC_IRR 0x200
38 #define APIC_ESR 0x280
39 #define APIC_ESR_SEND_CS 0x00001
40 #define APIC_ESR_RECV_CS 0x00002
41 #define APIC_ESR_SEND_ACC 0x00004
42 #define APIC_ESR_RECV_ACC 0x00008
43 #define APIC_ESR_SENDILL 0x00020
44 #define APIC_ESR_RECVILL 0x00040
45 #define APIC_ESR_ILLREGA 0x00080
46 #define APIC_ICR 0x300
47 #define APIC_DEST_SELF 0x40000
48 #define APIC_DEST_ALLINC 0x80000
49 #define APIC_DEST_ALLBUT 0xC0000
50 #define APIC_ICR_RR_MASK 0x30000
51 #define APIC_ICR_RR_INVALID 0x00000
52 #define APIC_ICR_RR_INPROG 0x10000
53 #define APIC_ICR_RR_VALID 0x20000
54 #define APIC_INT_LEVELTRIG 0x08000
55 #define APIC_INT_ASSERT 0x04000
56 #define APIC_ICR_BUSY 0x01000
57 #define APIC_DEST_LOGICAL 0x00800
58 #define APIC_DEST_PHYSICAL 0x00000
59 #define APIC_DM_FIXED 0x00000
60 #define APIC_DM_LOWEST 0x00100
61 #define APIC_DM_SMI 0x00200
62 #define APIC_DM_REMRD 0x00300
63 #define APIC_DM_NMI 0x00400
64 #define APIC_DM_INIT 0x00500
65 #define APIC_DM_STARTUP 0x00600
66 #define APIC_DM_EXTINT 0x00700
67 #define APIC_VECTOR_MASK 0x000FF
68 #define APIC_ICR2 0x310
69 #define GET_APIC_DEST_FIELD(x) (((x)>>24)&0xFF)
70 #define SET_APIC_DEST_FIELD(x) ((x)<<24)
71 #define APIC_LVTT 0x320
72 #define APIC_LVTTHMR 0x330
73 #define APIC_LVTPC 0x340
74 #define APIC_LVT0 0x350
75 #define APIC_LVT_TIMER_BASE_MASK (0x3<<18)
76 #define GET_APIC_TIMER_BASE(x) (((x)>>18)&0x3)
77 #define SET_APIC_TIMER_BASE(x) (((x)<<18))
78 #define APIC_TIMER_BASE_CLKIN 0x0
79 #define APIC_TIMER_BASE_TMBASE 0x1
80 #define APIC_TIMER_BASE_DIV 0x2
81 #define APIC_LVT_TIMER_PERIODIC (1<<17)
82 #define APIC_LVT_MASKED (1<<16)
83 #define APIC_LVT_LEVEL_TRIGGER (1<<15)
84 #define APIC_LVT_REMOTE_IRR (1<<14)
85 #define APIC_INPUT_POLARITY (1<<13)
86 #define APIC_SEND_PENDING (1<<12)
87 #define APIC_MODE_MASK 0x700
88 #define GET_APIC_DELIVERY_MODE(x) (((x)>>8)&0x7)
89 #define SET_APIC_DELIVERY_MODE(x,y) (((x)&~0x700)|((y)<<8))
90 #define APIC_MODE_FIXED 0x0
91 #define APIC_MODE_NMI 0x4
92 #define APIC_MODE_EXTINT 0x7
93 #define APIC_LVT1 0x360
94 #define APIC_LVTERR 0x370
95 #define APIC_TMICT 0x380
96 #define APIC_TMCCT 0x390
97 #define APIC_TDCR 0x3E0
98 #define APIC_TDR_DIV_TMBASE (1<<2)
99 #define APIC_TDR_DIV_1 0xB
100 #define APIC_TDR_DIV_2 0x0
101 #define APIC_TDR_DIV_4 0x1
102 #define APIC_TDR_DIV_8 0x2
103 #define APIC_TDR_DIV_16 0x3
104 #define APIC_TDR_DIV_32 0x8
105 #define APIC_TDR_DIV_64 0x9
106 #define APIC_TDR_DIV_128 0xA
108 #endif