ia64/xen-unstable

diff .bk-to-hg @ 18521:e61c7833dc9d

CPUIDLE: Handle C2 LAPIC timer & TSC stop

ACPI C2 is quite possible mapped to CPU C3 or deeper state, so
thinking from worst cases, enable C3 like entry/exit handling for C2
by default. Option 'lapic_timer_c2_ok' can be used to select simple C2
entry/exit only if the user make sure that LAPIC tmr & TSC will not be
stop during C2.

Signed-off-by: Wei Gang <gang.wei@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Mon Sep 22 11:24:02 2008 +0100 (2008-09-22)
parents f3123052268f
children c6c0f98bf7d3 ba107a7380bc
line diff