ia64/xen-unstable

annotate tools/firmware/hvmloader/hvmloader.c @ 17467:e2d9fbede4ed

hvmloader: Explicitly revert to text section after declaring bss fields.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Tue Apr 15 18:11:44 2008 +0100 (2008-04-15)
parents 08e010c3f251
children cd5dc735bdf3
rev   line source
kaf24@8708 1 /*
keir@16992 2 * hvmloader.c: HVM bootloader.
kaf24@8708 3 *
kaf24@8708 4 * Leendert van Doorn, leendert@watson.ibm.com
kaf24@8708 5 * Copyright (c) 2005, International Business Machines Corporation.
kaf24@8708 6 *
kfraser@12554 7 * Copyright (c) 2006, Keir Fraser, XenSource Inc.
kfraser@12554 8 *
kaf24@8708 9 * This program is free software; you can redistribute it and/or modify it
kaf24@8708 10 * under the terms and conditions of the GNU General Public License,
kaf24@8708 11 * version 2, as published by the Free Software Foundation.
kaf24@8708 12 *
kaf24@8708 13 * This program is distributed in the hope it will be useful, but WITHOUT
kaf24@8708 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
kaf24@8708 15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
kaf24@8708 16 * more details.
kaf24@8708 17 *
kaf24@8708 18 * You should have received a copy of the GNU General Public License along with
kaf24@8708 19 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
kaf24@8708 20 * Place - Suite 330, Boston, MA 02111-1307 USA.
kaf24@8708 21 */
kfraser@14959 22
kaf24@8708 23 #include "roms.h"
kfraser@14959 24 #include "acpi/acpi2_0.h"
kfraser@10976 25 #include "hypercall.h"
kfraser@10976 26 #include "util.h"
kfraser@12548 27 #include "config.h"
kaf24@12571 28 #include "apic_regs.h"
kfraser@12554 29 #include "pci_regs.h"
keir@15303 30 #include "e820.h"
keir@17374 31 #include "option_rom.h"
kfraser@10976 32 #include <xen/version.h>
kfraser@11081 33 #include <xen/hvm/params.h>
kaf24@8708 34
keir@17463 35 asm (
kfraser@12548 36 " .text \n"
kfraser@12548 37 " .globl _start \n"
kfraser@12548 38 "_start: \n"
kfraser@14373 39 /* C runtime kickoff. */
kfraser@12548 40 " cld \n"
kfraser@12548 41 " cli \n"
kfraser@14373 42 " movl $stack_top,%esp \n"
kfraser@14373 43 " movl %esp,%ebp \n"
kfraser@14373 44 " call main \n"
kfraser@14373 45 /* Relocate real-mode trampoline to 0x0. */
kfraser@14373 46 " mov $trampoline_start,%esi \n"
kfraser@14373 47 " xor %edi,%edi \n"
kfraser@14373 48 " mov $trampoline_end,%ecx \n"
kfraser@14373 49 " sub %esi,%ecx \n"
kfraser@14373 50 " rep movsb \n"
kfraser@14373 51 /* Load real-mode compatible segment state (base 0x0000, limit 0xffff). */
kfraser@12548 52 " lgdt gdt_desr \n"
kfraser@14373 53 " mov $0x0010,%ax \n"
kfraser@14373 54 " mov %ax,%ds \n"
kfraser@14373 55 " mov %ax,%es \n"
kfraser@14373 56 " mov %ax,%fs \n"
kfraser@14373 57 " mov %ax,%gs \n"
kfraser@14373 58 " mov %ax,%ss \n"
kfraser@14391 59 /* Initialise all 32-bit GPRs to zero. */
kfraser@14391 60 " xor %eax,%eax \n"
kfraser@14391 61 " xor %ebx,%ebx \n"
kfraser@14391 62 " xor %ecx,%ecx \n"
kfraser@14391 63 " xor %edx,%edx \n"
kfraser@14391 64 " xor %esp,%esp \n"
kfraser@14391 65 " xor %ebp,%ebp \n"
kfraser@14391 66 " xor %esi,%esi \n"
kfraser@14391 67 " xor %edi,%edi \n"
kfraser@14373 68 /* Enter real mode, reload all segment registers and IDT. */
kfraser@14391 69 " ljmp $0x8,$0x0 \n"
kfraser@14373 70 "trampoline_start: .code16 \n"
kfraser@14373 71 " mov %eax,%cr0 \n"
kfraser@14373 72 " ljmp $0,$1f-trampoline_start\n"
kfraser@14391 73 "1: mov %ax,%ds \n"
kfraser@14373 74 " mov %ax,%es \n"
kfraser@14373 75 " mov %ax,%fs \n"
kfraser@14373 76 " mov %ax,%gs \n"
kfraser@14373 77 " mov %ax,%ss \n"
kfraser@14373 78 " lidt 1f-trampoline_start \n"
kfraser@14373 79 " ljmp $0xf000,$0xfff0 \n"
kfraser@14373 80 "1: .word 0x3ff,0,0 \n"
kfraser@14373 81 "trampoline_end: .code32 \n"
kfraser@12548 82 " \n"
kfraser@12548 83 "gdt_desr: \n"
kfraser@12548 84 " .word gdt_end - gdt - 1 \n"
kfraser@12548 85 " .long gdt \n"
kfraser@12548 86 " \n"
kfraser@12548 87 " .align 8 \n"
kfraser@12548 88 "gdt: \n"
kfraser@12548 89 " .quad 0x0000000000000000 \n"
kfraser@14373 90 " .quad 0x00009a000000ffff \n" /* Ring 0 code, base 0 limit 0xffff */
kfraser@14373 91 " .quad 0x000092000000ffff \n" /* Ring 0 data, base 0 limit 0xffff */
kfraser@12548 92 "gdt_end: \n"
kfraser@12548 93 " \n"
kfraser@12548 94 " .bss \n"
kfraser@12548 95 " .align 8 \n"
kfraser@12548 96 "stack: \n"
kfraser@12548 97 " .skip 0x4000 \n"
kfraser@12548 98 "stack_top: \n"
keir@17467 99 " .text \n"
kfraser@12548 100 );
kaf24@8708 101
keir@17463 102 void smp_initialise(void);
kfraser@14959 103 void create_mp_tables(void);
kfraser@14959 104 int hvm_write_smbios_tables(void);
kaf24@8708 105
kfraser@10976 106 static int
kaf24@8708 107 cirrus_check(void)
kaf24@8708 108 {
kfraser@12548 109 outw(0x3C4, 0x9206);
kfraser@12548 110 return inb(0x3C5) == 0x12;
kaf24@8708 111 }
kaf24@8708 112
kfraser@10976 113 static void
kfraser@10976 114 init_hypercalls(void)
kfraser@10976 115 {
kfraser@12548 116 uint32_t eax, ebx, ecx, edx;
kfraser@12548 117 unsigned long i;
kfraser@12554 118 char signature[13];
kfraser@12548 119 xen_extraversion_t extraversion;
kfraser@10976 120
kfraser@12548 121 cpuid(0x40000000, &eax, &ebx, &ecx, &edx);
kfraser@10976 122
kfraser@12548 123 *(uint32_t *)(signature + 0) = ebx;
kfraser@12548 124 *(uint32_t *)(signature + 4) = ecx;
kfraser@12548 125 *(uint32_t *)(signature + 8) = edx;
kfraser@12548 126 signature[12] = '\0';
kfraser@10976 127
keir@17448 128 BUG_ON(strcmp("XenVMMXenVMM", signature) || (eax < 0x40000002));
kfraser@10976 129
kfraser@12554 130 /* Fill in hypercall transfer pages. */
kfraser@12548 131 cpuid(0x40000002, &eax, &ebx, &ecx, &edx);
kfraser@12548 132 for ( i = 0; i < eax; i++ )
kfraser@12548 133 wrmsr(ebx, HYPERCALL_PHYSICAL_ADDRESS + (i << 12) + i);
kfraser@12548 134
kfraser@12554 135 /* Print version information. */
kfraser@12554 136 cpuid(0x40000001, &eax, &ebx, &ecx, &edx);
kfraser@12548 137 hypercall_xen_version(XENVER_extraversion, extraversion);
kfraser@12554 138 printf("Detected Xen v%u.%u%s\n", eax >> 16, eax & 0xffff, extraversion);
kfraser@10976 139 }
kfraser@10976 140
kfraser@12548 141 static void apic_setup(void)
kaf24@8708 142 {
kaf24@12571 143 /* Set the IOAPIC ID to tha static value used in the MP/ACPI tables. */
kaf24@12571 144 ioapic_write(0x00, IOAPIC_ID);
kaf24@8708 145
kaf24@12571 146 /* Set up Virtual Wire mode. */
kaf24@12571 147 lapic_write(APIC_SPIV, APIC_SPIV_APIC_ENABLED | 0xFF);
kaf24@12571 148 lapic_write(APIC_LVT0, APIC_MODE_EXTINT << 8);
kaf24@12571 149 lapic_write(APIC_LVT1, APIC_MODE_NMI << 8);
kaf24@8708 150 }
kaf24@8708 151
kfraser@12554 152 static void pci_setup(void)
kfraser@12554 153 {
keir@16835 154 uint32_t base, devfn, bar_reg, bar_data, bar_sz, cmd;
kfraser@12554 155 uint16_t class, vendor_id, device_id;
kfraser@12554 156 unsigned int bar, pin, link, isa_irq;
kfraser@12554 157
keir@16835 158 /* Resources assignable to PCI devices via BARs. */
keir@16835 159 struct resource {
keir@16835 160 uint32_t base, max;
keir@16835 161 } *resource;
keir@16835 162 struct resource mem_resource = { 0xf0000000, 0xfc000000 };
keir@16835 163 struct resource io_resource = { 0xc000, 0x10000 };
keir@16835 164
keir@16834 165 /* Create a list of device BARs in descending order of size. */
keir@16834 166 struct bars {
keir@16834 167 uint32_t devfn, bar_reg, bar_sz;
keir@16834 168 } *bars = (struct bars *)0xc0000;
keir@16834 169 unsigned int i, nr_bars = 0;
keir@16834 170
kfraser@12554 171 /* Program PCI-ISA bridge with appropriate link routes. */
kfraser@15581 172 isa_irq = 0;
kfraser@15581 173 for ( link = 0; link < 4; link++ )
kfraser@12554 174 {
kfraser@15581 175 do { isa_irq = (isa_irq + 1) & 15;
kfraser@15581 176 } while ( !(PCI_ISA_IRQ_MASK & (1U << isa_irq)) );
kfraser@12554 177 pci_writeb(PCI_ISA_DEVFN, 0x60 + link, isa_irq);
kfraser@12554 178 printf("PCI-ISA link %u routed to IRQ%u\n", link, isa_irq);
kfraser@12554 179 }
kfraser@12554 180
kfraser@12554 181 /* Program ELCR to match PCI-wired IRQs. */
kfraser@12554 182 outb(0x4d0, (uint8_t)(PCI_ISA_IRQ_MASK >> 0));
kfraser@12554 183 outb(0x4d1, (uint8_t)(PCI_ISA_IRQ_MASK >> 8));
kfraser@12554 184
kfraser@12554 185 /* Scan the PCI bus and map resources. */
kfraser@12554 186 for ( devfn = 0; devfn < 128; devfn++ )
kfraser@12554 187 {
kfraser@12554 188 class = pci_readw(devfn, PCI_CLASS_DEVICE);
kfraser@12554 189 vendor_id = pci_readw(devfn, PCI_VENDOR_ID);
kfraser@12554 190 device_id = pci_readw(devfn, PCI_DEVICE_ID);
kfraser@12554 191 if ( (vendor_id == 0xffff) && (device_id == 0xffff) )
kfraser@12554 192 continue;
kfraser@12554 193
kfraser@12554 194 ASSERT((devfn != PCI_ISA_DEVFN) ||
kfraser@12554 195 ((vendor_id == 0x8086) && (device_id == 0x7000)));
kfraser@12554 196
kfraser@12554 197 switch ( class )
kfraser@12554 198 {
kfraser@12554 199 case 0x0680:
kfraser@12554 200 ASSERT((vendor_id == 0x8086) && (device_id == 0x7113));
kfraser@12554 201 /*
kfraser@12554 202 * PIIX4 ACPI PM. Special device with special PCI config space.
kfraser@12554 203 * No ordinary BARs.
kfraser@12554 204 */
kfraser@12554 205 pci_writew(devfn, 0x20, 0x0000); /* No smb bus IO enable */
kfraser@12554 206 pci_writew(devfn, 0x22, 0x0000);
kfraser@12554 207 pci_writew(devfn, 0x3c, 0x0009); /* Hardcoded IRQ9 */
kfraser@12554 208 pci_writew(devfn, 0x3d, 0x0001);
kfraser@12554 209 break;
kfraser@12554 210 case 0x0101:
kfraser@12554 211 /* PIIX3 IDE */
kfraser@12554 212 ASSERT((vendor_id == 0x8086) && (device_id == 0x7010));
kfraser@12554 213 pci_writew(devfn, 0x40, 0x8000); /* enable IDE0 */
kfraser@12554 214 pci_writew(devfn, 0x42, 0x8000); /* enable IDE1 */
kfraser@12554 215 /* fall through */
kfraser@12554 216 default:
kfraser@12554 217 /* Default memory mappings. */
kfraser@12554 218 for ( bar = 0; bar < 7; bar++ )
kfraser@12554 219 {
kfraser@12554 220 bar_reg = PCI_BASE_ADDRESS_0 + 4*bar;
kfraser@12554 221 if ( bar == 6 )
kfraser@12554 222 bar_reg = PCI_ROM_ADDRESS;
kfraser@12554 223
kfraser@12554 224 bar_data = pci_readl(devfn, bar_reg);
kfraser@12554 225 pci_writel(devfn, bar_reg, ~0);
kfraser@12554 226 bar_sz = pci_readl(devfn, bar_reg);
keir@16834 227 pci_writel(devfn, bar_reg, bar_data);
kfraser@12554 228 if ( bar_sz == 0 )
kfraser@12554 229 continue;
kfraser@12554 230
keir@16834 231 bar_sz &= (((bar_data & PCI_BASE_ADDRESS_SPACE) ==
keir@16834 232 PCI_BASE_ADDRESS_SPACE_MEMORY) ?
keir@16834 233 PCI_BASE_ADDRESS_MEM_MASK :
keir@16834 234 (PCI_BASE_ADDRESS_IO_MASK & 0xffff));
kfraser@12554 235 bar_sz &= ~(bar_sz - 1);
kfraser@12554 236
keir@16834 237 for ( i = 0; i < nr_bars; i++ )
keir@16834 238 if ( bars[i].bar_sz < bar_sz )
keir@16834 239 break;
kfraser@12554 240
keir@16834 241 if ( i != nr_bars )
keir@16834 242 memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars));
keir@16834 243
keir@16834 244 bars[i].devfn = devfn;
keir@16834 245 bars[i].bar_reg = bar_reg;
keir@16834 246 bars[i].bar_sz = bar_sz;
keir@16834 247
keir@16834 248 nr_bars++;
kfraser@12554 249 }
kfraser@12554 250 break;
kfraser@12554 251 }
kfraser@12554 252
kfraser@12554 253 /* Map the interrupt. */
kfraser@12554 254 pin = pci_readb(devfn, PCI_INTERRUPT_PIN);
kfraser@12554 255 if ( pin != 0 )
kfraser@12554 256 {
kfraser@12554 257 /* This is the barber's pole mapping used by Xen. */
kfraser@12554 258 link = ((pin - 1) + (devfn >> 3)) & 3;
kfraser@12554 259 isa_irq = pci_readb(PCI_ISA_DEVFN, 0x60 + link);
kfraser@12554 260 pci_writeb(devfn, PCI_INTERRUPT_LINE, isa_irq);
kfraser@12554 261 printf("pci dev %02x:%x INT%c->IRQ%u\n",
kfraser@12554 262 devfn>>3, devfn&7, 'A'+pin-1, isa_irq);
kfraser@12554 263 }
kfraser@12554 264 }
keir@16834 265
keir@16834 266 /* Assign iomem and ioport resources in descending order of size. */
keir@16834 267 for ( i = 0; i < nr_bars; i++ )
keir@16834 268 {
keir@16834 269 devfn = bars[i].devfn;
keir@16834 270 bar_reg = bars[i].bar_reg;
keir@16834 271 bar_sz = bars[i].bar_sz;
keir@16834 272
keir@16834 273 bar_data = pci_readl(devfn, bar_reg);
keir@16834 274
keir@16834 275 if ( (bar_data & PCI_BASE_ADDRESS_SPACE) ==
keir@16834 276 PCI_BASE_ADDRESS_SPACE_MEMORY )
keir@16834 277 {
keir@16835 278 resource = &mem_resource;
keir@16834 279 bar_data &= ~PCI_BASE_ADDRESS_MEM_MASK;
keir@16834 280 }
keir@16834 281 else
keir@16834 282 {
keir@16835 283 resource = &io_resource;
keir@16834 284 bar_data &= ~PCI_BASE_ADDRESS_IO_MASK;
keir@16834 285 }
keir@16834 286
keir@16835 287 base = (resource->base + bar_sz - 1) & ~(bar_sz - 1);
keir@16835 288 bar_data |= base;
keir@16835 289 base += bar_sz;
keir@16835 290
keir@16835 291 if ( (base < resource->base) || (base > resource->max) )
keir@16835 292 {
keir@16835 293 printf("pci dev %02x:%x bar %02x size %08x: no space for "
keir@16835 294 "resource!\n", devfn>>3, devfn&7, bar_reg, bar_sz);
keir@16835 295 continue;
keir@16835 296 }
keir@16835 297
keir@16835 298 resource->base = base;
keir@16834 299
keir@16834 300 pci_writel(devfn, bar_reg, bar_data);
keir@16835 301 printf("pci dev %02x:%x bar %02x size %08x: %08x\n",
keir@16835 302 devfn>>3, devfn&7, bar_reg, bar_sz, bar_data);
keir@16834 303
keir@16834 304 /* Now enable the memory or I/O mapping. */
keir@16834 305 cmd = pci_readw(devfn, PCI_COMMAND);
keir@16834 306 if ( (bar_reg == PCI_ROM_ADDRESS) ||
keir@16834 307 ((bar_data & PCI_BASE_ADDRESS_SPACE) ==
keir@16834 308 PCI_BASE_ADDRESS_SPACE_MEMORY) )
keir@16834 309 cmd |= PCI_COMMAND_MEMORY;
keir@16834 310 else
keir@16834 311 cmd |= PCI_COMMAND_IO;
keir@16834 312 pci_writew(devfn, PCI_COMMAND, cmd);
keir@16834 313 }
kfraser@12554 314 }
kfraser@12554 315
keir@16747 316 static int must_load_extboot(void)
keir@16747 317 {
keir@16747 318 return (inb(0x404) == 1);
keir@16747 319 }
keir@16747 320
keir@16960 321 /*
keir@16960 322 * Scan the PCI bus for the first NIC supported by etherboot, and copy
keir@16960 323 * the corresponding rom data to *copy_rom_dest. Returns the length of the
keir@16960 324 * selected rom, or 0 if no NIC found.
keir@16960 325 */
keir@16960 326 static int scan_etherboot_nic(void *copy_rom_dest)
keir@16960 327 {
keir@17374 328 struct option_rom_header *rom;
keir@17374 329 struct option_rom_pnp_header *pnph;
keir@17374 330 struct option_rom_pci_header *pcih;
keir@16960 331 uint32_t devfn;
keir@16960 332 uint16_t class, vendor_id, device_id;
keir@17374 333 uint8_t csum;
keir@17374 334 int i;
keir@16960 335
keir@16960 336 for ( devfn = 0; devfn < 128; devfn++ )
keir@16960 337 {
keir@16960 338 class = pci_readw(devfn, PCI_CLASS_DEVICE);
keir@16960 339 vendor_id = pci_readw(devfn, PCI_VENDOR_ID);
keir@16960 340 device_id = pci_readw(devfn, PCI_DEVICE_ID);
keir@16960 341
keir@16960 342 if ( (vendor_id == 0xffff) && (device_id == 0xffff) )
keir@16960 343 continue;
keir@16960 344
keir@17374 345 /* We're only interested in NICs. */
keir@17374 346 if ( class != 0x0200 )
keir@16960 347 continue;
keir@16960 348
keir@17374 349 rom = (struct option_rom_header *)etherboot;
keir@17374 350 for ( ; ; )
keir@17374 351 {
keir@17374 352 /* Invalid signature means we're out of option ROMs. */
keir@17430 353 if ( strncmp((char *)rom->signature, "\x55\xaa", 2) ||
keir@17374 354 (rom->rom_size == 0) )
keir@17374 355 break;
keir@17374 356
keir@17374 357 /* Invalid checksum means we're out of option ROMs. */
keir@17374 358 csum = 0;
keir@17374 359 for ( i = 0; i < (rom->rom_size * 512); i++ )
keir@17374 360 csum += ((uint8_t *)rom)[i];
keir@17374 361 if ( csum != 0 )
keir@17374 362 break;
keir@17374 363
keir@17374 364 /* Check the PCI PnP header (if any) for a match. */
keir@17374 365 pcih = (struct option_rom_pci_header *)
keir@17374 366 ((char *)rom + rom->pci_header_offset);
keir@17412 367 if ( (rom->pci_header_offset != 0) &&
keir@17430 368 !strncmp((char *)pcih->signature, "PCIR", 4) &&
keir@17412 369 (pcih->vendor_id == vendor_id) &&
keir@17412 370 (pcih->device_id == device_id) )
keir@17412 371 goto found;
keir@17374 372
keir@17412 373 rom = (struct option_rom_header *)
keir@17412 374 ((char *)rom + rom->rom_size * 512);
keir@17374 375 }
keir@16960 376 }
keir@16960 377
keir@16960 378 return 0;
keir@16960 379
keir@16960 380 found:
keir@17412 381 /* Find the PnP expansion header (if any). */
keir@17412 382 pnph = ((rom->expansion_header_offset != 0)
keir@17412 383 ? ((struct option_rom_pnp_header *)
keir@17412 384 ((char *)rom + rom->expansion_header_offset))
keir@17412 385 : ((struct option_rom_pnp_header *)NULL));
keir@17430 386 while ( (pnph != NULL) && strncmp((char *)pnph->signature, "$PnP", 4) )
keir@17412 387 pnph = ((pnph->next_header_offset != 0)
keir@17412 388 ? ((struct option_rom_pnp_header *)
keir@17412 389 ((char *)rom + pnph->next_header_offset))
keir@17412 390 : ((struct option_rom_pnp_header *)NULL));
keir@17412 391
keir@17374 392 printf("Loading PXE ROM ...\n");
keir@17374 393 if ( (pnph != NULL) && (pnph->manufacturer_name_offset != 0) )
keir@17374 394 printf(" - Manufacturer: %s\n",
keir@17374 395 (char *)rom + pnph->manufacturer_name_offset);
keir@17374 396 if ( (pnph != NULL) && (pnph->product_name_offset != 0) )
keir@17374 397 printf(" - Product name: %s\n",
keir@17374 398 (char *)rom + pnph->product_name_offset);
keir@17374 399 memcpy(copy_rom_dest, rom, rom->rom_size * 512);
keir@17374 400 return rom->rom_size * 512;
keir@16960 401 }
keir@16960 402
keir@14449 403 /* Replace possibly erroneous memory-size CMOS fields with correct values. */
keir@14449 404 static void cmos_write_memory_size(void)
keir@14449 405 {
keir@15303 406 struct e820entry *map = HVM_E820;
keir@15303 407 int i, nr = *HVM_E820_NR;
keir@14449 408 uint32_t base_mem = 640, ext_mem = 0, alt_mem = 0;
keir@14449 409
keir@14449 410 for ( i = 0; i < nr; i++ )
keir@14449 411 if ( (map[i].addr >= 0x100000) && (map[i].type == E820_RAM) )
keir@14449 412 break;
keir@14449 413
keir@14449 414 if ( i != nr )
keir@14449 415 {
keir@14449 416 alt_mem = ext_mem = map[i].addr + map[i].size;
keir@14449 417 ext_mem = (ext_mem > 0x0100000) ? (ext_mem - 0x0100000) >> 10 : 0;
keir@14449 418 if ( ext_mem > 0xffff )
keir@14449 419 ext_mem = 0xffff;
keir@14449 420 alt_mem = (alt_mem > 0x1000000) ? (alt_mem - 0x1000000) >> 16 : 0;
keir@14449 421 }
keir@14449 422
keir@14877 423 /* All BIOSes: conventional memory (CMOS *always* reports 640kB). */
keir@14449 424 cmos_outb(0x15, (uint8_t)(base_mem >> 0));
keir@14449 425 cmos_outb(0x16, (uint8_t)(base_mem >> 8));
keir@14449 426
keir@14449 427 /* All BIOSes: extended memory (1kB chunks above 1MB). */
keir@14449 428 cmos_outb(0x17, (uint8_t)( ext_mem >> 0));
keir@14449 429 cmos_outb(0x18, (uint8_t)( ext_mem >> 8));
keir@14449 430 cmos_outb(0x30, (uint8_t)( ext_mem >> 0));
keir@14449 431 cmos_outb(0x31, (uint8_t)( ext_mem >> 8));
keir@14449 432
keir@14449 433 /* Some BIOSes: alternative extended memory (64kB chunks above 16MB). */
keir@14449 434 cmos_outb(0x34, (uint8_t)( alt_mem >> 0));
keir@14449 435 cmos_outb(0x35, (uint8_t)( alt_mem >> 8));
Tim@13140 436 }
Tim@13140 437
kfraser@12548 438 int main(void)
kfraser@12548 439 {
kfraser@14959 440 int acpi_sz = 0, vgabios_sz = 0, etherboot_sz = 0, rombios_sz, smbios_sz;
keir@16747 441 int extboot_sz = 0;
kaf24@12574 442
kfraser@12554 443 printf("HVM Loader\n");
kfraser@12548 444
kfraser@12548 445 init_hypercalls();
kfraser@12548 446
keir@17363 447 printf("CPU speed is %u MHz\n", get_cpu_mhz());
keir@17363 448
keir@17463 449 smp_initialise();
keir@17463 450
kfraser@12554 451 printf("Writing SMBIOS tables ...\n");
kfraser@14959 452 smbios_sz = hvm_write_smbios_tables();
kfraser@12548 453
kfraser@12554 454 printf("Loading ROMBIOS ...\n");
kfraser@14959 455 rombios_sz = sizeof(rombios);
kfraser@14959 456 if ( rombios_sz > 0x10000 )
kfraser@14959 457 rombios_sz = 0x10000;
kfraser@14959 458 memcpy((void *)ROMBIOS_PHYSICAL_ADDRESS, rombios, rombios_sz);
kaf24@13656 459 highbios_setup();
kfraser@12548 460
kfraser@12548 461 apic_setup();
kfraser@12554 462 pci_setup();
kaf24@12574 463
kfraser@12600 464 if ( (get_vcpu_nr() > 1) || get_apic_mode() )
kaf24@12574 465 create_mp_tables();
kfraser@12548 466
kfraser@12548 467 if ( cirrus_check() )
kfraser@12548 468 {
kfraser@12554 469 printf("Loading Cirrus VGABIOS ...\n");
kfraser@12548 470 memcpy((void *)VGABIOS_PHYSICAL_ADDRESS,
kfraser@12548 471 vgabios_cirrusvga, sizeof(vgabios_cirrusvga));
kfraser@14959 472 vgabios_sz = sizeof(vgabios_cirrusvga);
kfraser@12548 473 }
kfraser@12548 474 else
kfraser@12548 475 {
kfraser@12554 476 printf("Loading Standard VGABIOS ...\n");
kfraser@12548 477 memcpy((void *)VGABIOS_PHYSICAL_ADDRESS,
kfraser@12548 478 vgabios_stdvga, sizeof(vgabios_stdvga));
kfraser@14959 479 vgabios_sz = sizeof(vgabios_stdvga);
kfraser@12548 480 }
kfraser@12548 481
keir@16960 482 etherboot_sz = scan_etherboot_nic((void*)ETHERBOOT_PHYSICAL_ADDRESS);
Tim@13140 483
keir@16747 484 if ( must_load_extboot() )
keir@16747 485 {
keir@16747 486 printf("Loading EXTBOOT ...\n");
keir@16747 487 memcpy((void *)EXTBOOT_PHYSICAL_ADDRESS,
keir@16747 488 extboot, sizeof(extboot));
keir@16747 489 extboot_sz = sizeof(extboot);
keir@16747 490 }
keir@16747 491
kfraser@14959 492 if ( get_acpi_enabled() )
kfraser@12548 493 {
kfraser@12554 494 printf("Loading ACPI ...\n");
kaf24@12574 495 acpi_sz = acpi_build_tables((uint8_t *)ACPI_PHYSICAL_ADDRESS);
kfraser@12634 496 ASSERT((ACPI_PHYSICAL_ADDRESS + acpi_sz) <= 0xF0000);
kfraser@12548 497 }
kfraser@12548 498
keir@14449 499 cmos_write_memory_size();
keir@14449 500
kfraser@14959 501 printf("BIOS map:\n");
kfraser@14959 502 if ( vgabios_sz )
kfraser@14959 503 printf(" %05x-%05x: VGA BIOS\n",
kfraser@14959 504 VGABIOS_PHYSICAL_ADDRESS,
kfraser@14959 505 VGABIOS_PHYSICAL_ADDRESS + vgabios_sz - 1);
kfraser@14959 506 if ( etherboot_sz )
kfraser@14959 507 printf(" %05x-%05x: Etherboot ROM\n",
kfraser@14959 508 ETHERBOOT_PHYSICAL_ADDRESS,
kfraser@14959 509 ETHERBOOT_PHYSICAL_ADDRESS + etherboot_sz - 1);
keir@16747 510 if ( extboot_sz )
keir@16747 511 printf(" %05x-%05x: Extboot ROM\n",
keir@16747 512 EXTBOOT_PHYSICAL_ADDRESS,
keir@16747 513 EXTBOOT_PHYSICAL_ADDRESS + extboot_sz - 1);
kfraser@14959 514 if ( smbios_sz )
kfraser@14959 515 printf(" %05x-%05x: SMBIOS tables\n",
kfraser@14959 516 SMBIOS_PHYSICAL_ADDRESS,
kfraser@14959 517 SMBIOS_PHYSICAL_ADDRESS + smbios_sz - 1);
kfraser@14959 518 if ( acpi_sz )
kfraser@14959 519 printf(" %05x-%05x: ACPI tables\n",
kfraser@14959 520 ACPI_PHYSICAL_ADDRESS,
kfraser@14959 521 ACPI_PHYSICAL_ADDRESS + acpi_sz - 1);
kfraser@14959 522 if ( rombios_sz )
kfraser@14959 523 printf(" %05x-%05x: Main BIOS\n",
kfraser@14959 524 ROMBIOS_PHYSICAL_ADDRESS,
kfraser@14959 525 ROMBIOS_PHYSICAL_ADDRESS + rombios_sz - 1);
kfraser@14959 526
kfraser@14373 527 printf("Invoking ROMBIOS ...\n");
kfraser@12548 528 return 0;
kfraser@12548 529 }
kfraser@12548 530
kfraser@12548 531 /*
kfraser@12548 532 * Local variables:
kfraser@12548 533 * mode: C
kfraser@12548 534 * c-set-style: "BSD"
kfraser@12548 535 * c-basic-offset: 4
kfraser@12548 536 * tab-width: 4
kfraser@12548 537 * indent-tabs-mode: nil
kfraser@12548 538 * End:
kfraser@12548 539 */