ia64/xen-unstable

annotate tools/ioemu/hw/vga_int.h @ 18394:dade7f0bdc8d

hvm: Use main memory for video memory.

When creating an HVM domain, if e.g. another domain is created before
qemu allocates video memory, the extra 8MB memory ballooning is not
available any more, because it got consumed by the other domain.

This fixes it by taking video memory from the main memory:

- make hvmloader use e820_malloc to reserve some of the main memory
and notify ioemu of its address through the Xen platform PCI card.
- add XENMAPSPACE_mfn to the xen_add_to_physmap memory op, to allow
ioemu to move the MFNs between the original position and the PCI
mapping, when LFB acceleration is disabled/enabled
- add a remove_from_physmap memory op, to allow ioemu to unmap it
completely for the case of old guests with acceleration disabled.
- add xc_domain_memory_translate_gpfn_list to libxc to allow ioemu to
get the MFNs of the video memory.
- have xend save the PCI memory space instead of ioemu: if a memory
page is there, the guest can access it like usual memory, so xend
can safely be responsible to save it. The extra benefit is that
live migration will apply the logdirty optimization there too.
- handle old saved images, populating the video memory from ioemu if
really needed.

Signed-off-by: Samuel Thibault <samuel.thibault@eu.citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Aug 27 14:53:39 2008 +0100 (2008-08-27)
parents adf05a812edb
children
rev   line source
chris@10732 1 /*
chris@10732 2 * QEMU internal VGA defines.
chris@10732 3 *
chris@10732 4 * Copyright (c) 2003-2004 Fabrice Bellard
chris@10732 5 *
chris@10732 6 * Permission is hereby granted, free of charge, to any person obtaining a copy
chris@10732 7 * of this software and associated documentation files (the "Software"), to deal
chris@10732 8 * in the Software without restriction, including without limitation the rights
chris@10732 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
chris@10732 10 * copies of the Software, and to permit persons to whom the Software is
chris@10732 11 * furnished to do so, subject to the following conditions:
chris@10732 12 *
chris@10732 13 * The above copyright notice and this permission notice shall be included in
chris@10732 14 * all copies or substantial portions of the Software.
chris@10732 15 *
chris@10732 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
chris@10732 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
chris@10732 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
chris@10732 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
chris@10732 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
chris@10732 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
chris@10732 22 * THE SOFTWARE.
chris@10732 23 */
chris@10732 24 #define MSR_COLOR_EMULATION 0x01
chris@10732 25 #define MSR_PAGE_SELECT 0x20
chris@10732 26
chris@10732 27 #define ST01_V_RETRACE 0x08
chris@10732 28 #define ST01_DISP_ENABLE 0x01
chris@10732 29
chris@10732 30 /* bochs VBE support */
chris@10732 31 //#define CONFIG_BOCHS_VBE
chris@10732 32
chris@10985 33 #define VBE_DISPI_MAX_XRES 1600
chris@10985 34 #define VBE_DISPI_MAX_YRES 1200
chris@10985 35 #define VBE_DISPI_MAX_BPP 32
chris@10732 36
chris@10732 37 #define VBE_DISPI_INDEX_ID 0x0
chris@10732 38 #define VBE_DISPI_INDEX_XRES 0x1
chris@10732 39 #define VBE_DISPI_INDEX_YRES 0x2
chris@10732 40 #define VBE_DISPI_INDEX_BPP 0x3
chris@10732 41 #define VBE_DISPI_INDEX_ENABLE 0x4
chris@10732 42 #define VBE_DISPI_INDEX_BANK 0x5
chris@10732 43 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
chris@10732 44 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
chris@10732 45 #define VBE_DISPI_INDEX_X_OFFSET 0x8
chris@10732 46 #define VBE_DISPI_INDEX_Y_OFFSET 0x9
chris@10732 47 #define VBE_DISPI_INDEX_NB 0xa
chris@10732 48
chris@10732 49 #define VBE_DISPI_ID0 0xB0C0
chris@10732 50 #define VBE_DISPI_ID1 0xB0C1
chris@10732 51 #define VBE_DISPI_ID2 0xB0C2
Christian@15060 52 #define VBE_DISPI_ID3 0xB0C3
Christian@15060 53 #define VBE_DISPI_ID4 0xB0C4
chris@10732 54
chris@10732 55 #define VBE_DISPI_DISABLED 0x00
chris@10732 56 #define VBE_DISPI_ENABLED 0x01
chris@10985 57 #define VBE_DISPI_GETCAPS 0x02
chris@10985 58 #define VBE_DISPI_8BIT_DAC 0x20
chris@10732 59 #define VBE_DISPI_LFB_ENABLED 0x40
chris@10732 60 #define VBE_DISPI_NOCLEARMEM 0x80
chris@10732 61
chris@10732 62 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
chris@10732 63
chris@10732 64 #ifdef CONFIG_BOCHS_VBE
chris@10732 65
chris@10732 66 #define VGA_STATE_COMMON_BOCHS_VBE \
chris@10732 67 uint16_t vbe_index; \
chris@10732 68 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
chris@10732 69 uint32_t vbe_start_addr; \
chris@10732 70 uint32_t vbe_line_offset; \
chris@10732 71 uint32_t vbe_bank_mask;
chris@10732 72
chris@10732 73 #else
chris@10732 74
chris@10732 75 #define VGA_STATE_COMMON_BOCHS_VBE
chris@10732 76
chris@10732 77 #endif /* !CONFIG_BOCHS_VBE */
chris@10732 78
chris@10732 79 #define CH_ATTR_SIZE (160 * 100)
chris@10985 80 #define VGA_MAX_HEIGHT 2048
chris@10732 81
chris@10732 82 #define VGA_STATE_COMMON \
chris@10732 83 uint8_t *vram_ptr; \
keir@18394 84 xen_pfn_t *vram_mfns; \
keir@18394 85 uint64_t stolen_vram_addr; /* Address of stolen RAM */ \
chris@10732 86 unsigned long vram_offset; \
chris@10732 87 unsigned int vram_size; \
chris@10732 88 unsigned long bios_offset; \
chris@10732 89 unsigned int bios_size; \
keir@17571 90 unsigned long lfb_addr; \
keir@17571 91 unsigned long lfb_end; \
Christian@15060 92 PCIDevice *pci_dev; \
chris@10732 93 uint32_t latch; \
chris@10732 94 uint8_t sr_index; \
chris@10732 95 uint8_t sr[256]; \
chris@10732 96 uint8_t gr_index; \
chris@10732 97 uint8_t gr[256]; \
chris@10732 98 uint8_t ar_index; \
chris@10732 99 uint8_t ar[21]; \
chris@10732 100 int ar_flip_flop; \
chris@10732 101 uint8_t cr_index; \
chris@10732 102 uint8_t cr[256]; /* CRT registers */ \
chris@10732 103 uint8_t msr; /* Misc Output Register */ \
chris@10732 104 uint8_t fcr; /* Feature Control Register */ \
chris@10732 105 uint8_t st00; /* status 0 */ \
chris@10732 106 uint8_t st01; /* status 1 */ \
chris@10732 107 uint8_t dac_state; \
chris@10732 108 uint8_t dac_sub_index; \
chris@10732 109 uint8_t dac_read_index; \
chris@10732 110 uint8_t dac_write_index; \
chris@10732 111 uint8_t dac_cache[3]; /* used when writing */ \
Christian@15060 112 int dac_8bit; \
chris@10732 113 uint8_t palette[768]; \
chris@10732 114 int32_t bank_offset; \
chris@10732 115 int (*get_bpp)(struct VGAState *s); \
chris@10732 116 void (*get_offsets)(struct VGAState *s, \
chris@10732 117 uint32_t *pline_offset, \
Christian@15060 118 uint32_t *pstart_addr, \
Christian@15060 119 uint32_t *pline_compare); \
chris@10732 120 void (*get_resolution)(struct VGAState *s, \
chris@10732 121 int *pwidth, \
chris@10732 122 int *pheight); \
chris@10732 123 VGA_STATE_COMMON_BOCHS_VBE \
chris@10732 124 /* display refresh support */ \
chris@10732 125 DisplayState *ds; \
chris@10732 126 uint32_t font_offsets[2]; \
chris@10732 127 int graphic_mode; \
chris@10732 128 uint8_t shift_control; \
chris@10732 129 uint8_t double_scan; \
chris@10732 130 uint32_t line_offset; \
chris@10732 131 uint32_t line_compare; \
chris@10732 132 uint32_t start_addr; \
chris@10732 133 uint32_t plane_updated; \
keir@17364 134 uint32_t last_line_offset; \
chris@10732 135 uint8_t last_cw, last_ch; \
chris@10732 136 uint32_t last_width, last_height; /* in chars or pixels */ \
chris@10732 137 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
keir@17813 138 uint32_t last_depth; /* in bits */ \
chris@10732 139 uint8_t cursor_start, cursor_end; \
chris@10732 140 uint32_t cursor_offset; \
chris@10732 141 unsigned int (*rgb_to_pixel)(unsigned int r, \
chris@10732 142 unsigned int g, unsigned b); \
chris@10732 143 /* hardware mouse cursor support */ \
chris@10732 144 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
chris@10732 145 void (*cursor_invalidate)(struct VGAState *s); \
chris@10732 146 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
chris@10732 147 /* tell for each page if it has been updated since the last time */ \
chris@10732 148 uint32_t last_palette[256]; \
chris@10732 149 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
chris@10732 150
chris@10732 151
chris@10732 152 typedef struct VGAState {
chris@10732 153 VGA_STATE_COMMON
chris@10732 154 } VGAState;
chris@10732 155
chris@10732 156 static inline int c6_to_8(int v)
chris@10732 157 {
chris@10732 158 int b;
chris@10732 159 v &= 0x3f;
chris@10732 160 b = v & 1;
chris@10732 161 return (v << 2) | (b << 1) | b;
chris@10732 162 }
chris@10732 163
chris@10732 164 void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
chris@10732 165 unsigned long vga_ram_offset, int vga_ram_size);
chris@10732 166 uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
chris@10732 167 void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
chris@10732 168 void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
chris@10732 169
chris@10732 170 void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
chris@10732 171 int poffset, int w,
chris@10732 172 unsigned int color0, unsigned int color1,
chris@10732 173 unsigned int color_xor);
chris@10732 174 void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
chris@10732 175 int poffset, int w,
chris@10732 176 unsigned int color0, unsigned int color1,
chris@10732 177 unsigned int color_xor);
chris@10732 178 void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
chris@10732 179 int poffset, int w,
chris@10732 180 unsigned int color0, unsigned int color1,
chris@10732 181 unsigned int color_xor);
chris@10732 182
chris@10732 183 void *vga_update_vram(VGAState *s, void *vga_ram_base, int vga_ram_size);
chris@10732 184 extern const uint8_t sr_mask[8];
chris@10732 185 extern const uint8_t gr_mask[16];