ia64/xen-unstable

annotate xen/arch/ia64/linux-xen/setup.c @ 9770:ced37bea0647

[IA64] FPH enabling + cleanup

Move contents of switch_to macro from xensystem.h to context_switch function.
Initialize FPU on all processors. FPH is always enabled in Xen.
Speed up context-switch (a little bit!) by not enabling/disabling FPH.
Cleanup (unused function/variablesi/fields, debug printf...)
vmx_ia64_switch_to removed (was unused).

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
author awilliam@xenbuild.aw
date Tue Apr 25 22:35:41 2006 -0600 (2006-04-25)
parents bdb08c9ef3d1
children ddcd9c267612
rev   line source
adsharma@5974 1 /*
adsharma@5974 2 * Architecture-specific setup.
adsharma@5974 3 *
adsharma@5974 4 * Copyright (C) 1998-2001, 2003-2004 Hewlett-Packard Co
adsharma@5974 5 * David Mosberger-Tang <davidm@hpl.hp.com>
adsharma@5974 6 * Stephane Eranian <eranian@hpl.hp.com>
djm@6454 7 * Copyright (C) 2000, 2004 Intel Corp
djm@6454 8 * Rohit Seth <rohit.seth@intel.com>
djm@6454 9 * Suresh Siddha <suresh.b.siddha@intel.com>
djm@6454 10 * Gordon Jin <gordon.jin@intel.com>
adsharma@5974 11 * Copyright (C) 1999 VA Linux Systems
adsharma@5974 12 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
adsharma@5974 13 *
djm@6454 14 * 12/26/04 S.Siddha, G.Jin, R.Seth
djm@6454 15 * Add multi-threading and multi-core detection
adsharma@5974 16 * 11/12/01 D.Mosberger Convert get_cpuinfo() to seq_file based show_cpuinfo().
adsharma@5974 17 * 04/04/00 D.Mosberger renamed cpu_initialized to cpu_online_map
adsharma@5974 18 * 03/31/00 R.Seth cpu_initialized and current->processor fixes
adsharma@5974 19 * 02/04/00 D.Mosberger some more get_cpuinfo fixes...
adsharma@5974 20 * 02/01/00 R.Seth fixed get_cpuinfo for SMP
adsharma@5974 21 * 01/07/99 S.Eranian added the support for command line argument
adsharma@5974 22 * 06/24/99 W.Drummond added boot_cpu_data.
djm@6454 23 * 05/28/05 Z. Menyhart Dynamic stride size for "flush_icache_range()"
adsharma@5974 24 */
adsharma@5974 25 #include <linux/config.h>
adsharma@5974 26 #include <linux/module.h>
adsharma@5974 27 #include <linux/init.h>
adsharma@5974 28
adsharma@5974 29 #include <linux/acpi.h>
adsharma@5974 30 #include <linux/bootmem.h>
adsharma@5974 31 #include <linux/console.h>
adsharma@5974 32 #include <linux/delay.h>
adsharma@5974 33 #include <linux/kernel.h>
adsharma@5974 34 #include <linux/reboot.h>
adsharma@5974 35 #include <linux/sched.h>
adsharma@5974 36 #include <linux/seq_file.h>
adsharma@5974 37 #include <linux/string.h>
adsharma@5974 38 #include <linux/threads.h>
adsharma@5974 39 #include <linux/tty.h>
adsharma@5974 40 #include <linux/serial.h>
adsharma@5974 41 #include <linux/serial_core.h>
adsharma@5974 42 #include <linux/efi.h>
adsharma@5974 43 #include <linux/initrd.h>
djm@6454 44 #ifndef XEN
djm@6454 45 #include <linux/platform.h>
djm@6454 46 #include <linux/pm.h>
djm@6454 47 #endif
adsharma@5974 48
adsharma@5974 49 #include <asm/ia32.h>
adsharma@5974 50 #include <asm/machvec.h>
adsharma@5974 51 #include <asm/mca.h>
adsharma@5974 52 #include <asm/meminit.h>
adsharma@5974 53 #include <asm/page.h>
adsharma@5974 54 #include <asm/patch.h>
adsharma@5974 55 #include <asm/pgtable.h>
adsharma@5974 56 #include <asm/processor.h>
adsharma@5974 57 #include <asm/sal.h>
adsharma@5974 58 #include <asm/sections.h>
adsharma@5974 59 #include <asm/serial.h>
adsharma@5974 60 #include <asm/setup.h>
adsharma@5974 61 #include <asm/smp.h>
adsharma@5974 62 #include <asm/system.h>
adsharma@5974 63 #include <asm/unistd.h>
djm@6454 64 #ifdef XEN
adsharma@5974 65 #include <asm/vmx.h>
adsharma@5974 66 #include <asm/io.h>
djm@6454 67 #endif
adsharma@5974 68
adsharma@5974 69 #if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
adsharma@5974 70 # error "struct cpuinfo_ia64 too big!"
adsharma@5974 71 #endif
adsharma@5974 72
adsharma@5974 73 #ifdef CONFIG_SMP
adsharma@5974 74 unsigned long __per_cpu_offset[NR_CPUS];
adsharma@5974 75 EXPORT_SYMBOL(__per_cpu_offset);
adsharma@5974 76 #endif
adsharma@5974 77
adsharma@5974 78 DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info);
djm@6454 79 #ifdef XEN
ydong@5982 80 DEFINE_PER_CPU(cpu_kr_ia64_t, cpu_kr);
djm@6454 81 #endif
adsharma@5974 82 DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
adsharma@5974 83 DEFINE_PER_CPU(unsigned long, ia64_phys_stacked_size_p8);
adsharma@5974 84 unsigned long ia64_cycles_per_usec;
adsharma@5974 85 struct ia64_boot_param *ia64_boot_param;
adsharma@5974 86 struct screen_info screen_info;
djm@6454 87 unsigned long vga_console_iobase;
djm@6454 88 unsigned long vga_console_membase;
adsharma@5974 89
adsharma@5974 90 unsigned long ia64_max_cacheline_size;
adsharma@5974 91 unsigned long ia64_iobase; /* virtual address for I/O accesses */
adsharma@5974 92 EXPORT_SYMBOL(ia64_iobase);
adsharma@5974 93 struct io_space io_space[MAX_IO_SPACES];
adsharma@5974 94 EXPORT_SYMBOL(io_space);
adsharma@5974 95 unsigned int num_io_spaces;
adsharma@5974 96
awilliam@9004 97 #ifdef XEN
awilliam@9004 98 extern void early_cmdline_parse(char **);
awilliam@9004 99 #endif
awilliam@9004 100
djm@6454 101 /*
djm@6454 102 * "flush_icache_range()" needs to know what processor dependent stride size to use
djm@6454 103 * when it makes i-cache(s) coherent with d-caches.
djm@6454 104 */
djm@6454 105 #define I_CACHE_STRIDE_SHIFT 5 /* Safest way to go: 32 bytes by 32 bytes */
djm@6454 106 unsigned long ia64_i_cache_stride_shift = ~0;
adsharma@5974 107
awilliam@9485 108 #ifdef XEN
awilliam@9485 109 #define D_CACHE_STRIDE_SHIFT 5 /* Safest. */
awilliam@9485 110 unsigned long ia64_d_cache_stride_shift = ~0;
awilliam@9485 111 #endif
awilliam@9485 112
adsharma@5974 113 /*
adsharma@5974 114 * The merge_mask variable needs to be set to (max(iommu_page_size(iommu)) - 1). This
adsharma@5974 115 * mask specifies a mask of address bits that must be 0 in order for two buffers to be
adsharma@5974 116 * mergeable by the I/O MMU (i.e., the end address of the first buffer and the start
adsharma@5974 117 * address of the second buffer must be aligned to (merge_mask+1) in order to be
adsharma@5974 118 * mergeable). By default, we assume there is no I/O MMU which can merge physically
adsharma@5974 119 * discontiguous buffers, so we set the merge_mask to ~0UL, which corresponds to a iommu
adsharma@5974 120 * page-size of 2^64.
adsharma@5974 121 */
adsharma@5974 122 unsigned long ia64_max_iommu_merge_mask = ~0UL;
adsharma@5974 123 EXPORT_SYMBOL(ia64_max_iommu_merge_mask);
adsharma@5974 124
adsharma@5974 125 /*
adsharma@5974 126 * We use a special marker for the end of memory and it uses the extra (+1) slot
adsharma@5974 127 */
adsharma@5974 128 struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];
adsharma@5974 129 int num_rsvd_regions;
adsharma@5974 130
adsharma@5974 131
adsharma@5974 132 /*
adsharma@5974 133 * Filter incoming memory segments based on the primitive map created from the boot
adsharma@5974 134 * parameters. Segments contained in the map are removed from the memory ranges. A
adsharma@5974 135 * caller-specified function is called with the memory ranges that remain after filtering.
adsharma@5974 136 * This routine does not assume the incoming segments are sorted.
adsharma@5974 137 */
adsharma@5974 138 int
adsharma@5974 139 filter_rsvd_memory (unsigned long start, unsigned long end, void *arg)
adsharma@5974 140 {
adsharma@5974 141 unsigned long range_start, range_end, prev_start;
adsharma@5974 142 void (*func)(unsigned long, unsigned long, int);
adsharma@5974 143 int i;
adsharma@5974 144
adsharma@5974 145 #if IGNORE_PFN0
adsharma@5974 146 if (start == PAGE_OFFSET) {
adsharma@5974 147 printk(KERN_WARNING "warning: skipping physical page 0\n");
adsharma@5974 148 start += PAGE_SIZE;
adsharma@5974 149 if (start >= end) return 0;
adsharma@5974 150 }
adsharma@5974 151 #endif
adsharma@5974 152 /*
adsharma@5974 153 * lowest possible address(walker uses virtual)
adsharma@5974 154 */
adsharma@5974 155 prev_start = PAGE_OFFSET;
adsharma@5974 156 func = arg;
adsharma@5974 157
adsharma@5974 158 for (i = 0; i < num_rsvd_regions; ++i) {
adsharma@5974 159 range_start = max(start, prev_start);
adsharma@5974 160 range_end = min(end, rsvd_region[i].start);
adsharma@5974 161
adsharma@5974 162 if (range_start < range_end)
adsharma@5974 163 #ifdef XEN
adsharma@5974 164 {
adsharma@5974 165 /* init_boot_pages requires "ps, pe" */
adsharma@5974 166 printk("Init boot pages: 0x%lx -> 0x%lx.\n",
adsharma@5974 167 __pa(range_start), __pa(range_end));
adsharma@5974 168 (*func)(__pa(range_start), __pa(range_end), 0);
adsharma@5974 169 }
adsharma@5974 170 #else
adsharma@5974 171 call_pernode_memory(__pa(range_start), range_end - range_start, func);
adsharma@5974 172 #endif
adsharma@5974 173
adsharma@5974 174 /* nothing more available in this segment */
adsharma@5974 175 if (range_end == end) return 0;
adsharma@5974 176
adsharma@5974 177 prev_start = rsvd_region[i].end;
adsharma@5974 178 }
adsharma@5974 179 /* end of memory marker allows full processing inside loop body */
adsharma@5974 180 return 0;
adsharma@5974 181 }
adsharma@5974 182
adsharma@5974 183 static void
adsharma@5974 184 sort_regions (struct rsvd_region *rsvd_region, int max)
adsharma@5974 185 {
adsharma@5974 186 int j;
adsharma@5974 187
adsharma@5974 188 /* simple bubble sorting */
adsharma@5974 189 while (max--) {
adsharma@5974 190 for (j = 0; j < max; ++j) {
adsharma@5974 191 if (rsvd_region[j].start > rsvd_region[j+1].start) {
adsharma@5974 192 struct rsvd_region tmp;
adsharma@5974 193 tmp = rsvd_region[j];
adsharma@5974 194 rsvd_region[j] = rsvd_region[j + 1];
adsharma@5974 195 rsvd_region[j + 1] = tmp;
adsharma@5974 196 }
adsharma@5974 197 }
adsharma@5974 198 }
adsharma@5974 199 }
adsharma@5974 200
adsharma@5974 201 /**
adsharma@5974 202 * reserve_memory - setup reserved memory areas
adsharma@5974 203 *
adsharma@5974 204 * Setup the reserved memory areas set aside for the boot parameters,
adsharma@5974 205 * initrd, etc. There are currently %IA64_MAX_RSVD_REGIONS defined,
adsharma@5974 206 * see include/asm-ia64/meminit.h if you need to define more.
adsharma@5974 207 */
adsharma@5974 208 void
adsharma@5974 209 reserve_memory (void)
adsharma@5974 210 {
adsharma@5974 211 int n = 0;
adsharma@5974 212
adsharma@5974 213 /*
adsharma@5974 214 * none of the entries in this table overlap
adsharma@5974 215 */
adsharma@5974 216 rsvd_region[n].start = (unsigned long) ia64_boot_param;
adsharma@5974 217 rsvd_region[n].end = rsvd_region[n].start + sizeof(*ia64_boot_param);
adsharma@5974 218 n++;
adsharma@5974 219
adsharma@5974 220 rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->efi_memmap);
adsharma@5974 221 rsvd_region[n].end = rsvd_region[n].start + ia64_boot_param->efi_memmap_size;
adsharma@5974 222 n++;
adsharma@5974 223
adsharma@5974 224 rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->command_line);
adsharma@5974 225 rsvd_region[n].end = (rsvd_region[n].start
adsharma@5974 226 + strlen(__va(ia64_boot_param->command_line)) + 1);
adsharma@5974 227 n++;
adsharma@5974 228
adsharma@5974 229 rsvd_region[n].start = (unsigned long) ia64_imva((void *)KERNEL_START);
adsharma@5974 230 #ifdef XEN
adsharma@5974 231 /* Reserve xen image/bitmap/xen-heap */
adsharma@5974 232 rsvd_region[n].end = rsvd_region[n].start + xenheap_size;
adsharma@5974 233 #else
adsharma@5974 234 rsvd_region[n].end = (unsigned long) ia64_imva(_end);
adsharma@5974 235 #endif
adsharma@5974 236 n++;
adsharma@5974 237
adsharma@5974 238 #ifdef CONFIG_BLK_DEV_INITRD
adsharma@5974 239 if (ia64_boot_param->initrd_start) {
adsharma@5974 240 rsvd_region[n].start = (unsigned long)__va(ia64_boot_param->initrd_start);
adsharma@5974 241 rsvd_region[n].end = rsvd_region[n].start + ia64_boot_param->initrd_size;
adsharma@5974 242 n++;
adsharma@5974 243 }
adsharma@5974 244 #endif
adsharma@5974 245
adsharma@5974 246 /* end of memory marker */
adsharma@5974 247 rsvd_region[n].start = ~0UL;
adsharma@5974 248 rsvd_region[n].end = ~0UL;
adsharma@5974 249 n++;
adsharma@5974 250
adsharma@5974 251 num_rsvd_regions = n;
adsharma@5974 252
adsharma@5974 253 sort_regions(rsvd_region, num_rsvd_regions);
adsharma@5974 254 }
adsharma@5974 255
adsharma@5974 256 /**
adsharma@5974 257 * find_initrd - get initrd parameters from the boot parameter structure
adsharma@5974 258 *
adsharma@5974 259 * Grab the initrd start and end from the boot parameter struct given us by
adsharma@5974 260 * the boot loader.
adsharma@5974 261 */
adsharma@5974 262 void
adsharma@5974 263 find_initrd (void)
adsharma@5974 264 {
adsharma@5974 265 #ifdef CONFIG_BLK_DEV_INITRD
adsharma@5974 266 if (ia64_boot_param->initrd_start) {
adsharma@5974 267 initrd_start = (unsigned long)__va(ia64_boot_param->initrd_start);
adsharma@5974 268 initrd_end = initrd_start+ia64_boot_param->initrd_size;
adsharma@5974 269
adsharma@5974 270 printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n",
adsharma@5974 271 initrd_start, ia64_boot_param->initrd_size);
adsharma@5974 272 }
adsharma@5974 273 #endif
adsharma@5974 274 }
adsharma@5974 275
adsharma@5974 276 static void __init
adsharma@5974 277 io_port_init (void)
adsharma@5974 278 {
adsharma@5974 279 extern unsigned long ia64_iobase;
adsharma@5974 280 unsigned long phys_iobase;
adsharma@5974 281
adsharma@5974 282 /*
adsharma@5974 283 * Set `iobase' to the appropriate address in region 6 (uncached access range).
adsharma@5974 284 *
adsharma@5974 285 * The EFI memory map is the "preferred" location to get the I/O port space base,
adsharma@5974 286 * rather the relying on AR.KR0. This should become more clear in future SAL
adsharma@5974 287 * specs. We'll fall back to getting it out of AR.KR0 if no appropriate entry is
adsharma@5974 288 * found in the memory map.
adsharma@5974 289 */
adsharma@5974 290 phys_iobase = efi_get_iobase();
adsharma@5974 291 if (phys_iobase)
adsharma@5974 292 /* set AR.KR0 since this is all we use it for anyway */
fred@5987 293 ia64_set_kr(IA64_KR_IO_BASE, phys_iobase);
adsharma@5974 294 else {
fred@5987 295 phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
adsharma@5974 296 printk(KERN_INFO "No I/O port range found in EFI memory map, falling back "
adsharma@5974 297 "to AR.KR0\n");
adsharma@5974 298 printk(KERN_INFO "I/O port base = 0x%lx\n", phys_iobase);
adsharma@5974 299 }
adsharma@5974 300 ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
adsharma@5974 301
adsharma@5974 302 /* setup legacy IO port space */
adsharma@5974 303 io_space[0].mmio_base = ia64_iobase;
adsharma@5974 304 io_space[0].sparse = 1;
adsharma@5974 305 num_io_spaces = 1;
adsharma@5974 306 }
adsharma@5974 307
adsharma@5974 308 /**
adsharma@5974 309 * early_console_setup - setup debugging console
adsharma@5974 310 *
adsharma@5974 311 * Consoles started here require little enough setup that we can start using
adsharma@5974 312 * them very early in the boot process, either right after the machine
adsharma@5974 313 * vector initialization, or even before if the drivers can detect their hw.
adsharma@5974 314 *
adsharma@5974 315 * Returns non-zero if a console couldn't be setup.
adsharma@5974 316 */
adsharma@5974 317 static inline int __init
adsharma@5974 318 early_console_setup (char *cmdline)
adsharma@5974 319 {
djm@6454 320 int earlycons = 0;
djm@6454 321
adsharma@5974 322 #ifdef CONFIG_SERIAL_SGI_L1_CONSOLE
adsharma@5974 323 {
adsharma@5974 324 extern int sn_serial_console_early_setup(void);
adsharma@5974 325 if (!sn_serial_console_early_setup())
djm@6454 326 earlycons++;
adsharma@5974 327 }
adsharma@5974 328 #endif
adsharma@5974 329 #ifdef CONFIG_EFI_PCDP
adsharma@5974 330 if (!efi_setup_pcdp_console(cmdline))
djm@6454 331 earlycons++;
adsharma@5974 332 #endif
adsharma@5974 333 #ifdef CONFIG_SERIAL_8250_CONSOLE
adsharma@5974 334 if (!early_serial_console_init(cmdline))
djm@6454 335 earlycons++;
adsharma@5974 336 #endif
adsharma@5974 337
djm@6454 338 return (earlycons) ? 0 : -1;
adsharma@5974 339 }
adsharma@5974 340
adsharma@5974 341 static inline void
adsharma@5974 342 mark_bsp_online (void)
adsharma@5974 343 {
adsharma@5974 344 #ifdef CONFIG_SMP
adsharma@5974 345 /* If we register an early console, allow CPU 0 to printk */
adsharma@5974 346 cpu_set(smp_processor_id(), cpu_online_map);
adsharma@5974 347 #endif
adsharma@5974 348 }
adsharma@5974 349
djm@6454 350 #ifdef CONFIG_SMP
djm@6454 351 static void
djm@6454 352 check_for_logical_procs (void)
djm@6454 353 {
djm@6454 354 pal_logical_to_physical_t info;
djm@6454 355 s64 status;
djm@6454 356
djm@6454 357 status = ia64_pal_logical_to_phys(0, &info);
djm@6454 358 if (status == -1) {
djm@6454 359 printk(KERN_INFO "No logical to physical processor mapping "
djm@6454 360 "available\n");
djm@6454 361 return;
djm@6454 362 }
djm@6454 363 if (status) {
djm@6454 364 printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n",
djm@6454 365 status);
djm@6454 366 return;
djm@6454 367 }
djm@6454 368 /*
djm@6454 369 * Total number of siblings that BSP has. Though not all of them
djm@6454 370 * may have booted successfully. The correct number of siblings
djm@6454 371 * booted is in info.overview_num_log.
djm@6454 372 */
djm@6454 373 smp_num_siblings = info.overview_tpc;
djm@6454 374 smp_num_cpucores = info.overview_cpp;
djm@6454 375 }
djm@6454 376 #endif
djm@6454 377
djm@7332 378 void __init
adsharma@5974 379 #ifdef XEN
adsharma@5974 380 early_setup_arch (char **cmdline_p)
adsharma@5974 381 #else
adsharma@5974 382 setup_arch (char **cmdline_p)
adsharma@5974 383 #endif
adsharma@5974 384 {
adsharma@5974 385 unw_init();
adsharma@5974 386
awilliam@9770 387 #ifndef XEN
adsharma@5974 388 ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
awilliam@9770 389 #endif
adsharma@5974 390
adsharma@5974 391 *cmdline_p = __va(ia64_boot_param->command_line);
djm@7332 392 #ifndef XEN
adsharma@5974 393 strlcpy(saved_command_line, *cmdline_p, COMMAND_LINE_SIZE);
awilliam@9270 394 #else
awilliam@9270 395 early_cmdline_parse(cmdline_p);
awilliam@9270 396 cmdline_parse(*cmdline_p);
djm@7332 397 #endif
adsharma@5974 398
adsharma@5974 399 efi_init();
adsharma@5974 400 io_port_init();
adsharma@5974 401
adsharma@5974 402 #ifdef CONFIG_IA64_GENERIC
adsharma@5974 403 {
adsharma@5974 404 const char *mvec_name = strstr (*cmdline_p, "machvec=");
adsharma@5974 405 char str[64];
adsharma@5974 406
adsharma@5974 407 if (mvec_name) {
adsharma@5974 408 const char *end;
adsharma@5974 409 size_t len;
adsharma@5974 410
adsharma@5974 411 mvec_name += 8;
adsharma@5974 412 end = strchr (mvec_name, ' ');
adsharma@5974 413 if (end)
adsharma@5974 414 len = end - mvec_name;
adsharma@5974 415 else
adsharma@5974 416 len = strlen (mvec_name);
adsharma@5974 417 len = min(len, sizeof (str) - 1);
adsharma@5974 418 strncpy (str, mvec_name, len);
adsharma@5974 419 str[len] = '\0';
adsharma@5974 420 mvec_name = str;
adsharma@5974 421 } else
adsharma@5974 422 mvec_name = acpi_get_sysname();
adsharma@5974 423 machvec_init(mvec_name);
adsharma@5974 424 }
adsharma@5974 425 #endif
adsharma@5974 426
adsharma@5974 427 if (early_console_setup(*cmdline_p) == 0)
adsharma@5974 428 mark_bsp_online();
adsharma@5974 429
djm@7332 430 #ifdef XEN
djm@7332 431 }
djm@7332 432
djm@7332 433 void __init
djm@7332 434 late_setup_arch (char **cmdline_p)
djm@7332 435 {
djm@7332 436 #endif
adsharma@5974 437 #ifdef CONFIG_ACPI_BOOT
adsharma@5974 438 /* Initialize the ACPI boot-time table parser */
adsharma@5974 439 acpi_table_init();
adsharma@5974 440 # ifdef CONFIG_ACPI_NUMA
adsharma@5974 441 acpi_numa_init();
adsharma@5974 442 # endif
adsharma@5974 443 #else
adsharma@5974 444 # ifdef CONFIG_SMP
adsharma@5974 445 smp_build_cpu_map(); /* happens, e.g., with the Ski simulator */
adsharma@5974 446 # endif
adsharma@5974 447 #endif /* CONFIG_APCI_BOOT */
adsharma@5974 448
adsharma@5974 449 #ifndef XEN
adsharma@5974 450 find_memory();
djm@7332 451 #endif
adsharma@5974 452
adsharma@5974 453 /* process SAL system table: */
adsharma@5974 454 ia64_sal_init(efi.sal_systab);
adsharma@5974 455
adsharma@5974 456 #ifdef CONFIG_SMP
djm@7332 457 #ifdef XEN
djm@7332 458 init_smp_config ();
djm@7332 459 #endif
djm@7332 460
adsharma@5974 461 cpu_physical_id(0) = hard_smp_processor_id();
djm@6454 462
djm@6454 463 cpu_set(0, cpu_sibling_map[0]);
djm@6454 464 cpu_set(0, cpu_core_map[0]);
djm@6454 465
djm@6454 466 check_for_logical_procs();
djm@6454 467 if (smp_num_cpucores > 1)
djm@6454 468 printk(KERN_INFO
djm@6454 469 "cpu package is Multi-Core capable: number of cores=%d\n",
djm@6454 470 smp_num_cpucores);
djm@6454 471 if (smp_num_siblings > 1)
djm@6454 472 printk(KERN_INFO
djm@6454 473 "cpu package is Multi-Threading capable: number of siblings=%d\n",
djm@6454 474 smp_num_siblings);
adsharma@5974 475 #endif
adsharma@5974 476
fred@5986 477 #ifdef XEN
adsharma@5974 478 identify_vmx_feature();
fred@5986 479 #endif
adsharma@5974 480
adsharma@5974 481 cpu_init(); /* initialize the bootstrap CPU */
adsharma@5974 482
adsharma@5974 483 #ifdef CONFIG_ACPI_BOOT
adsharma@5974 484 acpi_boot_init();
adsharma@5974 485 #endif
adsharma@5974 486
adsharma@5974 487 #ifdef CONFIG_VT
adsharma@5974 488 if (!conswitchp) {
adsharma@5974 489 # if defined(CONFIG_DUMMY_CONSOLE)
adsharma@5974 490 conswitchp = &dummy_con;
adsharma@5974 491 # endif
adsharma@5974 492 # if defined(CONFIG_VGA_CONSOLE)
adsharma@5974 493 /*
adsharma@5974 494 * Non-legacy systems may route legacy VGA MMIO range to system
adsharma@5974 495 * memory. vga_con probes the MMIO hole, so memory looks like
adsharma@5974 496 * a VGA device to it. The EFI memory map can tell us if it's
adsharma@5974 497 * memory so we can avoid this problem.
adsharma@5974 498 */
adsharma@5974 499 if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
adsharma@5974 500 conswitchp = &vga_con;
adsharma@5974 501 # endif
adsharma@5974 502 }
adsharma@5974 503 #endif
adsharma@5974 504
adsharma@5974 505 /* enable IA-64 Machine Check Abort Handling unless disabled */
adsharma@5974 506 if (!strstr(saved_command_line, "nomca"))
adsharma@5974 507 ia64_mca_init();
adsharma@5974 508
adsharma@5974 509 platform_setup(cmdline_p);
adsharma@5974 510 paging_init();
adsharma@5974 511 }
adsharma@5974 512
awilliam@9004 513 #ifndef XEN
adsharma@5974 514 /*
adsharma@5974 515 * Display cpu info for all cpu's.
adsharma@5974 516 */
adsharma@5974 517 static int
adsharma@5974 518 show_cpuinfo (struct seq_file *m, void *v)
adsharma@5974 519 {
adsharma@5974 520 #ifdef CONFIG_SMP
adsharma@5974 521 # define lpj c->loops_per_jiffy
adsharma@5974 522 # define cpunum c->cpu
adsharma@5974 523 #else
adsharma@5974 524 # define lpj loops_per_jiffy
adsharma@5974 525 # define cpunum 0
adsharma@5974 526 #endif
adsharma@5974 527 static struct {
adsharma@5974 528 unsigned long mask;
adsharma@5974 529 const char *feature_name;
adsharma@5974 530 } feature_bits[] = {
adsharma@5974 531 { 1UL << 0, "branchlong" },
adsharma@5974 532 { 1UL << 1, "spontaneous deferral"},
adsharma@5974 533 { 1UL << 2, "16-byte atomic ops" }
adsharma@5974 534 };
adsharma@5974 535 char family[32], features[128], *cp, sep;
adsharma@5974 536 struct cpuinfo_ia64 *c = v;
adsharma@5974 537 unsigned long mask;
adsharma@5974 538 int i;
adsharma@5974 539
adsharma@5974 540 mask = c->features;
adsharma@5974 541
adsharma@5974 542 switch (c->family) {
adsharma@5974 543 case 0x07: memcpy(family, "Itanium", 8); break;
adsharma@5974 544 case 0x1f: memcpy(family, "Itanium 2", 10); break;
adsharma@5974 545 default: sprintf(family, "%u", c->family); break;
adsharma@5974 546 }
adsharma@5974 547
adsharma@5974 548 /* build the feature string: */
adsharma@5974 549 memcpy(features, " standard", 10);
adsharma@5974 550 cp = features;
adsharma@5974 551 sep = 0;
adsharma@5974 552 for (i = 0; i < (int) ARRAY_SIZE(feature_bits); ++i) {
adsharma@5974 553 if (mask & feature_bits[i].mask) {
adsharma@5974 554 if (sep)
adsharma@5974 555 *cp++ = sep;
adsharma@5974 556 sep = ',';
adsharma@5974 557 *cp++ = ' ';
adsharma@5974 558 strcpy(cp, feature_bits[i].feature_name);
adsharma@5974 559 cp += strlen(feature_bits[i].feature_name);
adsharma@5974 560 mask &= ~feature_bits[i].mask;
adsharma@5974 561 }
adsharma@5974 562 }
adsharma@5974 563 if (mask) {
adsharma@5974 564 /* print unknown features as a hex value: */
adsharma@5974 565 if (sep)
adsharma@5974 566 *cp++ = sep;
adsharma@5974 567 sprintf(cp, " 0x%lx", mask);
adsharma@5974 568 }
adsharma@5974 569
adsharma@5974 570 seq_printf(m,
adsharma@5974 571 "processor : %d\n"
adsharma@5974 572 "vendor : %s\n"
adsharma@5974 573 "arch : IA-64\n"
adsharma@5974 574 "family : %s\n"
adsharma@5974 575 "model : %u\n"
adsharma@5974 576 "revision : %u\n"
adsharma@5974 577 "archrev : %u\n"
adsharma@5974 578 "features :%s\n" /* don't change this---it _is_ right! */
adsharma@5974 579 "cpu number : %lu\n"
adsharma@5974 580 "cpu regs : %u\n"
adsharma@5974 581 "cpu MHz : %lu.%06lu\n"
adsharma@5974 582 "itc MHz : %lu.%06lu\n"
djm@6454 583 "BogoMIPS : %lu.%02lu\n",
adsharma@5974 584 cpunum, c->vendor, family, c->model, c->revision, c->archrev,
adsharma@5974 585 features, c->ppn, c->number,
adsharma@5974 586 c->proc_freq / 1000000, c->proc_freq % 1000000,
adsharma@5974 587 c->itc_freq / 1000000, c->itc_freq % 1000000,
adsharma@5974 588 lpj*HZ/500000, (lpj*HZ/5000) % 100);
djm@6454 589 #ifdef CONFIG_SMP
djm@6454 590 seq_printf(m, "siblings : %u\n", c->num_log);
djm@6454 591 if (c->threads_per_core > 1 || c->cores_per_socket > 1)
djm@6454 592 seq_printf(m,
djm@6454 593 "physical id: %u\n"
djm@6454 594 "core id : %u\n"
djm@6454 595 "thread id : %u\n",
djm@6454 596 c->socket_id, c->core_id, c->thread_id);
djm@6454 597 #endif
djm@6454 598 seq_printf(m,"\n");
djm@6454 599
adsharma@5974 600 return 0;
adsharma@5974 601 }
adsharma@5974 602
adsharma@5974 603 static void *
adsharma@5974 604 c_start (struct seq_file *m, loff_t *pos)
adsharma@5974 605 {
adsharma@5974 606 #ifdef CONFIG_SMP
adsharma@5974 607 while (*pos < NR_CPUS && !cpu_isset(*pos, cpu_online_map))
adsharma@5974 608 ++*pos;
adsharma@5974 609 #endif
adsharma@5974 610 return *pos < NR_CPUS ? cpu_data(*pos) : NULL;
adsharma@5974 611 }
adsharma@5974 612
adsharma@5974 613 static void *
adsharma@5974 614 c_next (struct seq_file *m, void *v, loff_t *pos)
adsharma@5974 615 {
adsharma@5974 616 ++*pos;
adsharma@5974 617 return c_start(m, pos);
adsharma@5974 618 }
adsharma@5974 619
adsharma@5974 620 static void
adsharma@5974 621 c_stop (struct seq_file *m, void *v)
adsharma@5974 622 {
adsharma@5974 623 }
adsharma@5974 624
adsharma@5974 625 struct seq_operations cpuinfo_op = {
adsharma@5974 626 .start = c_start,
adsharma@5974 627 .next = c_next,
adsharma@5974 628 .stop = c_stop,
adsharma@5974 629 .show = show_cpuinfo
adsharma@5974 630 };
awilliam@9004 631 #endif /* XEN */
adsharma@5974 632
adsharma@5974 633 void
adsharma@5974 634 identify_cpu (struct cpuinfo_ia64 *c)
adsharma@5974 635 {
adsharma@5974 636 union {
adsharma@5974 637 unsigned long bits[5];
adsharma@5974 638 struct {
adsharma@5974 639 /* id 0 & 1: */
adsharma@5974 640 char vendor[16];
adsharma@5974 641
adsharma@5974 642 /* id 2 */
adsharma@5974 643 u64 ppn; /* processor serial number */
adsharma@5974 644
adsharma@5974 645 /* id 3: */
adsharma@5974 646 unsigned number : 8;
adsharma@5974 647 unsigned revision : 8;
adsharma@5974 648 unsigned model : 8;
adsharma@5974 649 unsigned family : 8;
adsharma@5974 650 unsigned archrev : 8;
adsharma@5974 651 unsigned reserved : 24;
adsharma@5974 652
adsharma@5974 653 /* id 4: */
adsharma@5974 654 u64 features;
adsharma@5974 655 } field;
adsharma@5974 656 } cpuid;
adsharma@5974 657 pal_vm_info_1_u_t vm1;
adsharma@5974 658 pal_vm_info_2_u_t vm2;
adsharma@5974 659 pal_status_t status;
adsharma@5974 660 unsigned long impl_va_msb = 50, phys_addr_size = 44; /* Itanium defaults */
adsharma@5974 661 int i;
adsharma@5974 662
adsharma@5974 663 for (i = 0; i < 5; ++i)
adsharma@5974 664 cpuid.bits[i] = ia64_get_cpuid(i);
adsharma@5974 665
adsharma@5974 666 memcpy(c->vendor, cpuid.field.vendor, 16);
adsharma@5974 667 #ifdef CONFIG_SMP
adsharma@5974 668 c->cpu = smp_processor_id();
djm@6454 669
djm@6454 670 /* below default values will be overwritten by identify_siblings()
djm@6454 671 * for Multi-Threading/Multi-Core capable cpu's
djm@6454 672 */
djm@6454 673 c->threads_per_core = c->cores_per_socket = c->num_log = 1;
djm@6454 674 c->socket_id = -1;
djm@6454 675
djm@6454 676 identify_siblings(c);
adsharma@5974 677 #endif
adsharma@5974 678 c->ppn = cpuid.field.ppn;
adsharma@5974 679 c->number = cpuid.field.number;
adsharma@5974 680 c->revision = cpuid.field.revision;
adsharma@5974 681 c->model = cpuid.field.model;
adsharma@5974 682 c->family = cpuid.field.family;
adsharma@5974 683 c->archrev = cpuid.field.archrev;
adsharma@5974 684 c->features = cpuid.field.features;
adsharma@5974 685
adsharma@5974 686 status = ia64_pal_vm_summary(&vm1, &vm2);
adsharma@5974 687 if (status == PAL_STATUS_SUCCESS) {
adsharma@5974 688 impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
adsharma@5974 689 phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
adsharma@5974 690 }
adsharma@5974 691 c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
adsharma@5974 692 c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
adsharma@5974 693
fred@5986 694 #ifdef XEN
adsharma@5974 695 /* If vmx feature is on, do necessary initialization for vmx */
adsharma@5974 696 if (vmx_enabled)
adsharma@5974 697 vmx_init_env();
adsharma@5974 698 #endif
adsharma@5974 699 }
adsharma@5974 700
adsharma@5974 701 void
adsharma@5974 702 setup_per_cpu_areas (void)
adsharma@5974 703 {
adsharma@5974 704 /* start_kernel() requires this... */
adsharma@5974 705 }
adsharma@5974 706
djm@6454 707 /*
djm@6454 708 * Calculate the max. cache line size.
djm@6454 709 *
djm@6454 710 * In addition, the minimum of the i-cache stride sizes is calculated for
djm@6454 711 * "flush_icache_range()".
djm@6454 712 */
adsharma@5974 713 static void
adsharma@5974 714 get_max_cacheline_size (void)
adsharma@5974 715 {
adsharma@5974 716 unsigned long line_size, max = 1;
adsharma@5974 717 u64 l, levels, unique_caches;
adsharma@5974 718 pal_cache_config_info_t cci;
adsharma@5974 719 s64 status;
adsharma@5974 720
adsharma@5974 721 status = ia64_pal_cache_summary(&levels, &unique_caches);
adsharma@5974 722 if (status != 0) {
adsharma@5974 723 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
adsharma@5974 724 __FUNCTION__, status);
adsharma@5974 725 max = SMP_CACHE_BYTES;
djm@6454 726 /* Safest setup for "flush_icache_range()" */
djm@6454 727 ia64_i_cache_stride_shift = I_CACHE_STRIDE_SHIFT;
awilliam@9485 728 #ifdef XEN
awilliam@9485 729 ia64_d_cache_stride_shift = D_CACHE_STRIDE_SHIFT;
awilliam@9485 730 #endif
adsharma@5974 731 goto out;
adsharma@5974 732 }
adsharma@5974 733
adsharma@5974 734 for (l = 0; l < levels; ++l) {
adsharma@5974 735 status = ia64_pal_cache_config_info(l, /* cache_type (data_or_unified)= */ 2,
adsharma@5974 736 &cci);
adsharma@5974 737 if (status != 0) {
adsharma@5974 738 printk(KERN_ERR
djm@6454 739 "%s: ia64_pal_cache_config_info(l=%lu, 2) failed (status=%ld)\n",
adsharma@5974 740 __FUNCTION__, l, status);
adsharma@5974 741 max = SMP_CACHE_BYTES;
djm@6454 742 /* The safest setup for "flush_icache_range()" */
djm@6454 743 cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
djm@6454 744 cci.pcci_unified = 1;
adsharma@5974 745 }
awilliam@9485 746 #ifdef XEN
awilliam@9485 747 if (cci.pcci_stride < ia64_d_cache_stride_shift)
awilliam@9485 748 ia64_d_cache_stride_shift = cci.pcci_stride;
awilliam@9485 749 #endif
adsharma@5974 750 line_size = 1 << cci.pcci_line_size;
adsharma@5974 751 if (line_size > max)
adsharma@5974 752 max = line_size;
djm@6454 753 if (!cci.pcci_unified) {
djm@6454 754 status = ia64_pal_cache_config_info(l,
djm@6454 755 /* cache_type (instruction)= */ 1,
djm@6454 756 &cci);
djm@6454 757 if (status != 0) {
djm@6454 758 printk(KERN_ERR
djm@6454 759 "%s: ia64_pal_cache_config_info(l=%lu, 1) failed (status=%ld)\n",
djm@6454 760 __FUNCTION__, l, status);
djm@6454 761 /* The safest setup for "flush_icache_range()" */
djm@6454 762 cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
djm@6454 763 }
djm@6454 764 }
djm@6454 765 if (cci.pcci_stride < ia64_i_cache_stride_shift)
djm@6454 766 ia64_i_cache_stride_shift = cci.pcci_stride;
djm@6454 767 }
adsharma@5974 768 out:
adsharma@5974 769 if (max > ia64_max_cacheline_size)
adsharma@5974 770 ia64_max_cacheline_size = max;
awilliam@9485 771 #ifdef XEN
awilliam@9485 772 if (ia64_d_cache_stride_shift > ia64_i_cache_stride_shift)
awilliam@9485 773 ia64_d_cache_stride_shift = ia64_i_cache_stride_shift;
awilliam@9485 774 #endif
awilliam@9485 775
adsharma@5974 776 }
adsharma@5974 777
adsharma@5974 778 /*
adsharma@5974 779 * cpu_init() initializes state that is per-CPU. This function acts
adsharma@5974 780 * as a 'CPU state barrier', nothing should get across.
adsharma@5974 781 */
adsharma@5974 782 void
adsharma@5974 783 cpu_init (void)
adsharma@5974 784 {
adsharma@5974 785 extern void __devinit ia64_mmu_init (void *);
adsharma@5974 786 unsigned long num_phys_stacked;
awilliam@9321 787 #ifndef XEN
adsharma@5974 788 pal_vm_info_2_u_t vmi;
adsharma@5974 789 unsigned int max_ctx;
awilliam@9321 790 #endif
adsharma@5974 791 struct cpuinfo_ia64 *cpu_info;
adsharma@5974 792 void *cpu_data;
adsharma@5974 793
adsharma@5974 794 cpu_data = per_cpu_init();
adsharma@5974 795
djm@7332 796 #ifdef XEN
djm@7332 797 printf ("cpu_init: current=%p, current->domain->arch.mm=%p\n",
djm@7332 798 current, current->domain->arch.mm);
djm@7332 799 #endif
djm@7332 800
adsharma@5974 801 /*
adsharma@5974 802 * We set ar.k3 so that assembly code in MCA handler can compute
adsharma@5974 803 * physical addresses of per cpu variables with a simple:
adsharma@5974 804 * phys = ar.k3 + &per_cpu_var
adsharma@5974 805 */
fred@5987 806 ia64_set_kr(IA64_KR_PER_CPU_DATA,
fred@5987 807 ia64_tpa(cpu_data) - (long) __per_cpu_start);
adsharma@5974 808
adsharma@5974 809 get_max_cacheline_size();
adsharma@5974 810
adsharma@5974 811 /*
adsharma@5974 812 * We can't pass "local_cpu_data" to identify_cpu() because we haven't called
adsharma@5974 813 * ia64_mmu_init() yet. And we can't call ia64_mmu_init() first because it
adsharma@5974 814 * depends on the data returned by identify_cpu(). We break the dependency by
adsharma@5974 815 * accessing cpu_data() through the canonical per-CPU address.
adsharma@5974 816 */
adsharma@5974 817 cpu_info = cpu_data + ((char *) &__ia64_per_cpu_var(cpu_info) - __per_cpu_start);
adsharma@5974 818 identify_cpu(cpu_info);
adsharma@5974 819
adsharma@5974 820 #ifdef CONFIG_MCKINLEY
adsharma@5974 821 {
adsharma@5974 822 # define FEATURE_SET 16
adsharma@5974 823 struct ia64_pal_retval iprv;
adsharma@5974 824
adsharma@5974 825 if (cpu_info->family == 0x1f) {
adsharma@5974 826 PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0);
adsharma@5974 827 if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80))
adsharma@5974 828 PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES,
adsharma@5974 829 (iprv.v1 | 0x80), FEATURE_SET, 0);
adsharma@5974 830 }
adsharma@5974 831 }
adsharma@5974 832 #endif
adsharma@5974 833
adsharma@5974 834 /* Clear the stack memory reserved for pt_regs: */
adsharma@5974 835 memset(ia64_task_regs(current), 0, sizeof(struct pt_regs));
adsharma@5974 836
fred@5987 837 ia64_set_kr(IA64_KR_FPU_OWNER, 0);
adsharma@5974 838
adsharma@5974 839 /*
djm@6454 840 * Initialize the page-table base register to a global
djm@6454 841 * directory with all zeroes. This ensure that we can handle
djm@6454 842 * TLB-misses to user address-space even before we created the
djm@6454 843 * first user address-space. This may happen, e.g., due to
djm@6454 844 * aggressive use of lfetch.fault.
djm@6454 845 */
djm@6454 846 ia64_set_kr(IA64_KR_PT_BASE, __pa(ia64_imva(empty_zero_page)));
djm@6454 847
djm@6454 848 /*
djm@6454 849 * Initialize default control register to defer speculative faults except
djm@6454 850 * for those arising from TLB misses, which are not deferred. The
adsharma@5974 851 * kernel MUST NOT depend on a particular setting of these bits (in other words,
adsharma@5974 852 * the kernel must have recovery code for all speculative accesses). Turn on
adsharma@5974 853 * dcr.lc as per recommendation by the architecture team. Most IA-32 apps
adsharma@5974 854 * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
adsharma@5974 855 * be fine).
adsharma@5974 856 */
djm@6869 857 #ifdef XEN
djm@6869 858 ia64_setreg(_IA64_REG_CR_DCR, ( IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
djm@6869 859 | IA64_DCR_PP | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
djm@6869 860 #else
adsharma@5974 861 ia64_setreg(_IA64_REG_CR_DCR, ( IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
adsharma@5974 862 | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
djm@6869 863 #endif
awilliam@9690 864 #ifndef XEN
adsharma@5974 865 atomic_inc(&init_mm.mm_count);
adsharma@5974 866 current->active_mm = &init_mm;
awilliam@9168 867 #endif
adsharma@5974 868 #ifdef XEN
adsharma@5974 869 if (current->domain->arch.mm)
adsharma@5974 870 #else
adsharma@5974 871 if (current->mm)
adsharma@5974 872 #endif
adsharma@5974 873 BUG();
adsharma@5974 874
awilliam@9770 875 #ifdef XEN
awilliam@9770 876 ia64_fph_enable();
awilliam@9770 877 __ia64_init_fpu();
awilliam@9770 878 #endif
awilliam@9770 879
adsharma@5974 880 ia64_mmu_init(ia64_imva(cpu_data));
adsharma@5974 881 ia64_mca_cpu_init(ia64_imva(cpu_data));
adsharma@5974 882
adsharma@5974 883 #ifdef CONFIG_IA32_SUPPORT
adsharma@5974 884 ia32_cpu_init();
adsharma@5974 885 #endif
adsharma@5974 886
adsharma@5974 887 /* Clear ITC to eliminiate sched_clock() overflows in human time. */
adsharma@5974 888 ia64_set_itc(0);
adsharma@5974 889
adsharma@5974 890 /* disable all local interrupt sources: */
adsharma@5974 891 ia64_set_itv(1 << 16);
adsharma@5974 892 ia64_set_lrr0(1 << 16);
adsharma@5974 893 ia64_set_lrr1(1 << 16);
adsharma@5974 894 ia64_setreg(_IA64_REG_CR_PMV, 1 << 16);
adsharma@5974 895 ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16);
adsharma@5974 896
adsharma@5974 897 /* clear TPR & XTP to enable all interrupt classes: */
adsharma@5974 898 ia64_setreg(_IA64_REG_CR_TPR, 0);
adsharma@5974 899 #ifdef CONFIG_SMP
adsharma@5974 900 normal_xtp();
adsharma@5974 901 #endif
adsharma@5974 902
awilliam@9321 903 #ifndef XEN
adsharma@5974 904 /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
adsharma@5974 905 if (ia64_pal_vm_summary(NULL, &vmi) == 0)
adsharma@5974 906 max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
adsharma@5974 907 else {
adsharma@5974 908 printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
adsharma@5974 909 max_ctx = (1U << 15) - 1; /* use architected minimum */
adsharma@5974 910 }
adsharma@5974 911 while (max_ctx < ia64_ctx.max_ctx) {
adsharma@5974 912 unsigned int old = ia64_ctx.max_ctx;
adsharma@5974 913 if (cmpxchg(&ia64_ctx.max_ctx, old, max_ctx) == old)
adsharma@5974 914 break;
adsharma@5974 915 }
awilliam@9321 916 #endif
adsharma@5974 917
adsharma@5974 918 if (ia64_pal_rse_info(&num_phys_stacked, NULL) != 0) {
adsharma@5974 919 printk(KERN_WARNING "cpu_init: PAL RSE info failed; assuming 96 physical "
adsharma@5974 920 "stacked regs\n");
adsharma@5974 921 num_phys_stacked = 96;
adsharma@5974 922 }
adsharma@5974 923 /* size of physical stacked register partition plus 8 bytes: */
adsharma@5974 924 __get_cpu_var(ia64_phys_stacked_size_p8) = num_phys_stacked*8 + 8;
adsharma@5974 925 platform_cpu_init();
djm@6454 926 #ifndef XEN
djm@6454 927 pm_idle = default_idle;
djm@6454 928 #endif
djm@7332 929
djm@7332 930 #ifdef XEN
djm@7332 931 /* surrender usage of kernel registers to domain, use percpu area instead */
djm@7332 932 __get_cpu_var(cpu_kr)._kr[IA64_KR_IO_BASE] = ia64_get_kr(IA64_KR_IO_BASE);
djm@7332 933 __get_cpu_var(cpu_kr)._kr[IA64_KR_PER_CPU_DATA] = ia64_get_kr(IA64_KR_PER_CPU_DATA);
djm@7332 934 __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT_STACK] = ia64_get_kr(IA64_KR_CURRENT_STACK);
djm@7332 935 __get_cpu_var(cpu_kr)._kr[IA64_KR_FPU_OWNER] = ia64_get_kr(IA64_KR_FPU_OWNER);
djm@7332 936 __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT] = ia64_get_kr(IA64_KR_CURRENT);
djm@7332 937 __get_cpu_var(cpu_kr)._kr[IA64_KR_PT_BASE] = ia64_get_kr(IA64_KR_PT_BASE);
djm@7332 938 #endif
adsharma@5974 939 }
adsharma@5974 940
awilliam@9770 941 #ifndef XEN
adsharma@5974 942 void
adsharma@5974 943 check_bugs (void)
adsharma@5974 944 {
adsharma@5974 945 ia64_patch_mckinley_e9((unsigned long) __start___mckinley_e9_bundles,
adsharma@5974 946 (unsigned long) __end___mckinley_e9_bundles);
adsharma@5974 947 }
awilliam@9770 948 #endif