ia64/xen-unstable

annotate tools/firmware/hvmloader/hvmloader.c @ 16835:b006c58b055e

hvmloader: Expand iomem allocation pool to 0xf0000000-0xfc000000.

Check for exhaustion of allocation pool, warn user, and fail to
initialise the relevant PCI BAR.

Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Tue Jan 22 11:18:10 2008 +0000 (2008-01-22)
parents 824ffb1efa9c
children 42369d21641d
rev   line source
kaf24@8708 1 /*
kaf24@8708 2 * hvmloader.c: HVM ROMBIOS/VGABIOS/ACPI/VMXAssist image loader.
kaf24@8708 3 *
kaf24@8708 4 * Leendert van Doorn, leendert@watson.ibm.com
kaf24@8708 5 * Copyright (c) 2005, International Business Machines Corporation.
kaf24@8708 6 *
kfraser@12554 7 * Copyright (c) 2006, Keir Fraser, XenSource Inc.
kfraser@12554 8 *
kaf24@8708 9 * This program is free software; you can redistribute it and/or modify it
kaf24@8708 10 * under the terms and conditions of the GNU General Public License,
kaf24@8708 11 * version 2, as published by the Free Software Foundation.
kaf24@8708 12 *
kaf24@8708 13 * This program is distributed in the hope it will be useful, but WITHOUT
kaf24@8708 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
kaf24@8708 15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
kaf24@8708 16 * more details.
kaf24@8708 17 *
kaf24@8708 18 * You should have received a copy of the GNU General Public License along with
kaf24@8708 19 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
kaf24@8708 20 * Place - Suite 330, Boston, MA 02111-1307 USA.
kaf24@8708 21 */
kfraser@14959 22
kaf24@8708 23 #include "roms.h"
kfraser@14959 24 #include "acpi/acpi2_0.h"
kfraser@10976 25 #include "hypercall.h"
kfraser@10976 26 #include "util.h"
kfraser@12548 27 #include "config.h"
kaf24@12571 28 #include "apic_regs.h"
kfraser@12554 29 #include "pci_regs.h"
keir@15303 30 #include "e820.h"
kfraser@10976 31 #include <xen/version.h>
kfraser@11081 32 #include <xen/hvm/params.h>
kaf24@8708 33
kaf24@8708 34 asm(
kfraser@12548 35 " .text \n"
kfraser@12548 36 " .globl _start \n"
kfraser@12548 37 "_start: \n"
kfraser@14373 38 /* C runtime kickoff. */
kfraser@12548 39 " cld \n"
kfraser@12548 40 " cli \n"
kfraser@14373 41 " movl $stack_top,%esp \n"
kfraser@14373 42 " movl %esp,%ebp \n"
keir@16440 43 " movl %eax,initial_eax \n"
kfraser@14373 44 " call main \n"
kfraser@14373 45 /* Relocate real-mode trampoline to 0x0. */
kfraser@14373 46 " mov $trampoline_start,%esi \n"
kfraser@14373 47 " xor %edi,%edi \n"
kfraser@14373 48 " mov $trampoline_end,%ecx \n"
kfraser@14373 49 " sub %esi,%ecx \n"
kfraser@14373 50 " rep movsb \n"
kfraser@14373 51 /* Load real-mode compatible segment state (base 0x0000, limit 0xffff). */
kfraser@12548 52 " lgdt gdt_desr \n"
kfraser@14373 53 " mov $0x0010,%ax \n"
kfraser@14373 54 " mov %ax,%ds \n"
kfraser@14373 55 " mov %ax,%es \n"
kfraser@14373 56 " mov %ax,%fs \n"
kfraser@14373 57 " mov %ax,%gs \n"
kfraser@14373 58 " mov %ax,%ss \n"
kfraser@14391 59 /* Initialise all 32-bit GPRs to zero. */
kfraser@14391 60 " xor %eax,%eax \n"
kfraser@14391 61 " xor %ebx,%ebx \n"
kfraser@14391 62 " xor %ecx,%ecx \n"
kfraser@14391 63 " xor %edx,%edx \n"
kfraser@14391 64 " xor %esp,%esp \n"
kfraser@14391 65 " xor %ebp,%ebp \n"
kfraser@14391 66 " xor %esi,%esi \n"
kfraser@14391 67 " xor %edi,%edi \n"
kfraser@14373 68 /* Enter real mode, reload all segment registers and IDT. */
kfraser@14391 69 " ljmp $0x8,$0x0 \n"
kfraser@14373 70 "trampoline_start: .code16 \n"
kfraser@14373 71 " mov %eax,%cr0 \n"
kfraser@14373 72 " ljmp $0,$1f-trampoline_start\n"
kfraser@14391 73 "1: mov %ax,%ds \n"
kfraser@14373 74 " mov %ax,%es \n"
kfraser@14373 75 " mov %ax,%fs \n"
kfraser@14373 76 " mov %ax,%gs \n"
kfraser@14373 77 " mov %ax,%ss \n"
kfraser@14373 78 " lidt 1f-trampoline_start \n"
kfraser@14373 79 " ljmp $0xf000,$0xfff0 \n"
kfraser@14373 80 "1: .word 0x3ff,0,0 \n"
kfraser@14373 81 "trampoline_end: .code32 \n"
kfraser@12548 82 " \n"
kfraser@12548 83 "gdt_desr: \n"
kfraser@12548 84 " .word gdt_end - gdt - 1 \n"
kfraser@12548 85 " .long gdt \n"
kfraser@12548 86 " \n"
kfraser@12548 87 " .align 8 \n"
kfraser@12548 88 "gdt: \n"
kfraser@12548 89 " .quad 0x0000000000000000 \n"
kfraser@14373 90 " .quad 0x00009a000000ffff \n" /* Ring 0 code, base 0 limit 0xffff */
kfraser@14373 91 " .quad 0x000092000000ffff \n" /* Ring 0 data, base 0 limit 0xffff */
kfraser@12548 92 "gdt_end: \n"
kfraser@12548 93 " \n"
kfraser@12548 94 " .bss \n"
kfraser@12548 95 " .align 8 \n"
kfraser@12548 96 "stack: \n"
kfraser@12548 97 " .skip 0x4000 \n"
kfraser@12548 98 "stack_top: \n"
kfraser@12548 99 );
kaf24@8708 100
keir@16440 101 static unsigned int initial_eax;
keir@16440 102
kfraser@14959 103 void create_mp_tables(void);
kfraser@14959 104 int hvm_write_smbios_tables(void);
kaf24@8708 105
kfraser@10976 106 static int
kaf24@8708 107 cirrus_check(void)
kaf24@8708 108 {
kfraser@12548 109 outw(0x3C4, 0x9206);
kfraser@12548 110 return inb(0x3C5) == 0x12;
kaf24@8708 111 }
kaf24@8708 112
kfraser@10976 113 static int
kaf24@8708 114 check_amd(void)
kaf24@8708 115 {
kfraser@12548 116 char id[12];
kaf24@8708 117
kfraser@12548 118 __asm__ __volatile__ (
kfraser@12548 119 "cpuid"
kfraser@12548 120 : "=b" (*(int *)(&id[0])),
kfraser@12548 121 "=c" (*(int *)(&id[8])),
kfraser@12548 122 "=d" (*(int *)(&id[4]))
kfraser@12548 123 : "a" (0) );
kfraser@12548 124 return __builtin_memcmp(id, "AuthenticAMD", 12) == 0;
kaf24@8708 125 }
kaf24@8708 126
keir@16440 127 static int
keir@16440 128 use_vmxassist(void)
keir@16440 129 {
keir@16440 130 return !check_amd() && !initial_eax;
keir@16440 131 }
keir@16440 132
kfraser@10976 133 static void
kfraser@10976 134 wrmsr(uint32_t idx, uint64_t v)
kfraser@10976 135 {
kfraser@12548 136 __asm__ __volatile__ (
kfraser@12548 137 "wrmsr"
kfraser@12548 138 : : "c" (idx), "a" ((uint32_t)v), "d" ((uint32_t)(v>>32)) );
kfraser@10976 139 }
kfraser@10976 140
kfraser@10976 141 static void
kfraser@10976 142 init_hypercalls(void)
kfraser@10976 143 {
kfraser@12548 144 uint32_t eax, ebx, ecx, edx;
kfraser@12548 145 unsigned long i;
kfraser@12554 146 char signature[13];
kfraser@12548 147 xen_extraversion_t extraversion;
kfraser@10976 148
kfraser@12548 149 cpuid(0x40000000, &eax, &ebx, &ecx, &edx);
kfraser@10976 150
kfraser@12548 151 *(uint32_t *)(signature + 0) = ebx;
kfraser@12548 152 *(uint32_t *)(signature + 4) = ecx;
kfraser@12548 153 *(uint32_t *)(signature + 8) = edx;
kfraser@12548 154 signature[12] = '\0';
kfraser@10976 155
kfraser@12548 156 if ( strcmp("XenVMMXenVMM", signature) || (eax < 0x40000002) )
kfraser@12548 157 {
kfraser@12554 158 printf("FATAL: Xen hypervisor not detected\n");
kfraser@12548 159 __asm__ __volatile__( "ud2" );
kfraser@12548 160 }
kfraser@10976 161
kfraser@12554 162 /* Fill in hypercall transfer pages. */
kfraser@12548 163 cpuid(0x40000002, &eax, &ebx, &ecx, &edx);
kfraser@12548 164 for ( i = 0; i < eax; i++ )
kfraser@12548 165 wrmsr(ebx, HYPERCALL_PHYSICAL_ADDRESS + (i << 12) + i);
kfraser@12548 166
kfraser@12554 167 /* Print version information. */
kfraser@12554 168 cpuid(0x40000001, &eax, &ebx, &ecx, &edx);
kfraser@12548 169 hypercall_xen_version(XENVER_extraversion, extraversion);
kfraser@12554 170 printf("Detected Xen v%u.%u%s\n", eax >> 16, eax & 0xffff, extraversion);
kfraser@10976 171 }
kfraser@10976 172
kfraser@12548 173 static void apic_setup(void)
kaf24@8708 174 {
kaf24@12571 175 /* Set the IOAPIC ID to tha static value used in the MP/ACPI tables. */
kaf24@12571 176 ioapic_write(0x00, IOAPIC_ID);
kaf24@8708 177
kaf24@12571 178 /* Set up Virtual Wire mode. */
kaf24@12571 179 lapic_write(APIC_SPIV, APIC_SPIV_APIC_ENABLED | 0xFF);
kaf24@12571 180 lapic_write(APIC_LVT0, APIC_MODE_EXTINT << 8);
kaf24@12571 181 lapic_write(APIC_LVT1, APIC_MODE_NMI << 8);
kaf24@8708 182 }
kaf24@8708 183
kfraser@12554 184 static void pci_setup(void)
kfraser@12554 185 {
keir@16835 186 uint32_t base, devfn, bar_reg, bar_data, bar_sz, cmd;
kfraser@12554 187 uint16_t class, vendor_id, device_id;
kfraser@12554 188 unsigned int bar, pin, link, isa_irq;
kfraser@12554 189
keir@16835 190 /* Resources assignable to PCI devices via BARs. */
keir@16835 191 struct resource {
keir@16835 192 uint32_t base, max;
keir@16835 193 } *resource;
keir@16835 194 struct resource mem_resource = { 0xf0000000, 0xfc000000 };
keir@16835 195 struct resource io_resource = { 0xc000, 0x10000 };
keir@16835 196
keir@16834 197 /* Create a list of device BARs in descending order of size. */
keir@16834 198 struct bars {
keir@16834 199 uint32_t devfn, bar_reg, bar_sz;
keir@16834 200 } *bars = (struct bars *)0xc0000;
keir@16834 201 unsigned int i, nr_bars = 0;
keir@16834 202
kfraser@12554 203 /* Program PCI-ISA bridge with appropriate link routes. */
kfraser@15581 204 isa_irq = 0;
kfraser@15581 205 for ( link = 0; link < 4; link++ )
kfraser@12554 206 {
kfraser@15581 207 do { isa_irq = (isa_irq + 1) & 15;
kfraser@15581 208 } while ( !(PCI_ISA_IRQ_MASK & (1U << isa_irq)) );
kfraser@12554 209 pci_writeb(PCI_ISA_DEVFN, 0x60 + link, isa_irq);
kfraser@12554 210 printf("PCI-ISA link %u routed to IRQ%u\n", link, isa_irq);
kfraser@12554 211 }
kfraser@12554 212
kfraser@12554 213 /* Program ELCR to match PCI-wired IRQs. */
kfraser@12554 214 outb(0x4d0, (uint8_t)(PCI_ISA_IRQ_MASK >> 0));
kfraser@12554 215 outb(0x4d1, (uint8_t)(PCI_ISA_IRQ_MASK >> 8));
kfraser@12554 216
kfraser@12554 217 /* Scan the PCI bus and map resources. */
kfraser@12554 218 for ( devfn = 0; devfn < 128; devfn++ )
kfraser@12554 219 {
kfraser@12554 220 class = pci_readw(devfn, PCI_CLASS_DEVICE);
kfraser@12554 221 vendor_id = pci_readw(devfn, PCI_VENDOR_ID);
kfraser@12554 222 device_id = pci_readw(devfn, PCI_DEVICE_ID);
kfraser@12554 223 if ( (vendor_id == 0xffff) && (device_id == 0xffff) )
kfraser@12554 224 continue;
kfraser@12554 225
kfraser@12554 226 ASSERT((devfn != PCI_ISA_DEVFN) ||
kfraser@12554 227 ((vendor_id == 0x8086) && (device_id == 0x7000)));
kfraser@12554 228
kfraser@12554 229 switch ( class )
kfraser@12554 230 {
kfraser@12554 231 case 0x0680:
kfraser@12554 232 ASSERT((vendor_id == 0x8086) && (device_id == 0x7113));
kfraser@12554 233 /*
kfraser@12554 234 * PIIX4 ACPI PM. Special device with special PCI config space.
kfraser@12554 235 * No ordinary BARs.
kfraser@12554 236 */
kfraser@12554 237 pci_writew(devfn, 0x20, 0x0000); /* No smb bus IO enable */
kfraser@12554 238 pci_writew(devfn, 0x22, 0x0000);
kfraser@12554 239 pci_writew(devfn, 0x3c, 0x0009); /* Hardcoded IRQ9 */
kfraser@12554 240 pci_writew(devfn, 0x3d, 0x0001);
kfraser@12554 241 break;
kfraser@12554 242 case 0x0101:
kfraser@12554 243 /* PIIX3 IDE */
kfraser@12554 244 ASSERT((vendor_id == 0x8086) && (device_id == 0x7010));
kfraser@12554 245 pci_writew(devfn, 0x40, 0x8000); /* enable IDE0 */
kfraser@12554 246 pci_writew(devfn, 0x42, 0x8000); /* enable IDE1 */
kfraser@12554 247 /* fall through */
kfraser@12554 248 default:
kfraser@12554 249 /* Default memory mappings. */
kfraser@12554 250 for ( bar = 0; bar < 7; bar++ )
kfraser@12554 251 {
kfraser@12554 252 bar_reg = PCI_BASE_ADDRESS_0 + 4*bar;
kfraser@12554 253 if ( bar == 6 )
kfraser@12554 254 bar_reg = PCI_ROM_ADDRESS;
kfraser@12554 255
kfraser@12554 256 bar_data = pci_readl(devfn, bar_reg);
kfraser@12554 257 pci_writel(devfn, bar_reg, ~0);
kfraser@12554 258 bar_sz = pci_readl(devfn, bar_reg);
keir@16834 259 pci_writel(devfn, bar_reg, bar_data);
kfraser@12554 260 if ( bar_sz == 0 )
kfraser@12554 261 continue;
kfraser@12554 262
keir@16834 263 bar_sz &= (((bar_data & PCI_BASE_ADDRESS_SPACE) ==
keir@16834 264 PCI_BASE_ADDRESS_SPACE_MEMORY) ?
keir@16834 265 PCI_BASE_ADDRESS_MEM_MASK :
keir@16834 266 (PCI_BASE_ADDRESS_IO_MASK & 0xffff));
kfraser@12554 267 bar_sz &= ~(bar_sz - 1);
kfraser@12554 268
keir@16834 269 for ( i = 0; i < nr_bars; i++ )
keir@16834 270 if ( bars[i].bar_sz < bar_sz )
keir@16834 271 break;
kfraser@12554 272
keir@16834 273 if ( i != nr_bars )
keir@16834 274 memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars));
keir@16834 275
keir@16834 276 bars[i].devfn = devfn;
keir@16834 277 bars[i].bar_reg = bar_reg;
keir@16834 278 bars[i].bar_sz = bar_sz;
keir@16834 279
keir@16834 280 nr_bars++;
kfraser@12554 281 }
kfraser@12554 282 break;
kfraser@12554 283 }
kfraser@12554 284
kfraser@12554 285 /* Map the interrupt. */
kfraser@12554 286 pin = pci_readb(devfn, PCI_INTERRUPT_PIN);
kfraser@12554 287 if ( pin != 0 )
kfraser@12554 288 {
kfraser@12554 289 /* This is the barber's pole mapping used by Xen. */
kfraser@12554 290 link = ((pin - 1) + (devfn >> 3)) & 3;
kfraser@12554 291 isa_irq = pci_readb(PCI_ISA_DEVFN, 0x60 + link);
kfraser@12554 292 pci_writeb(devfn, PCI_INTERRUPT_LINE, isa_irq);
kfraser@12554 293 printf("pci dev %02x:%x INT%c->IRQ%u\n",
kfraser@12554 294 devfn>>3, devfn&7, 'A'+pin-1, isa_irq);
kfraser@12554 295 }
kfraser@12554 296 }
keir@16834 297
keir@16834 298 /* Assign iomem and ioport resources in descending order of size. */
keir@16834 299 for ( i = 0; i < nr_bars; i++ )
keir@16834 300 {
keir@16834 301 devfn = bars[i].devfn;
keir@16834 302 bar_reg = bars[i].bar_reg;
keir@16834 303 bar_sz = bars[i].bar_sz;
keir@16834 304
keir@16834 305 bar_data = pci_readl(devfn, bar_reg);
keir@16834 306
keir@16834 307 if ( (bar_data & PCI_BASE_ADDRESS_SPACE) ==
keir@16834 308 PCI_BASE_ADDRESS_SPACE_MEMORY )
keir@16834 309 {
keir@16835 310 resource = &mem_resource;
keir@16834 311 bar_data &= ~PCI_BASE_ADDRESS_MEM_MASK;
keir@16834 312 }
keir@16834 313 else
keir@16834 314 {
keir@16835 315 resource = &io_resource;
keir@16834 316 bar_data &= ~PCI_BASE_ADDRESS_IO_MASK;
keir@16834 317 }
keir@16834 318
keir@16835 319 base = (resource->base + bar_sz - 1) & ~(bar_sz - 1);
keir@16835 320 bar_data |= base;
keir@16835 321 base += bar_sz;
keir@16835 322
keir@16835 323 if ( (base < resource->base) || (base > resource->max) )
keir@16835 324 {
keir@16835 325 printf("pci dev %02x:%x bar %02x size %08x: no space for "
keir@16835 326 "resource!\n", devfn>>3, devfn&7, bar_reg, bar_sz);
keir@16835 327 continue;
keir@16835 328 }
keir@16835 329
keir@16835 330 resource->base = base;
keir@16834 331
keir@16834 332 pci_writel(devfn, bar_reg, bar_data);
keir@16835 333 printf("pci dev %02x:%x bar %02x size %08x: %08x\n",
keir@16835 334 devfn>>3, devfn&7, bar_reg, bar_sz, bar_data);
keir@16834 335
keir@16834 336 /* Now enable the memory or I/O mapping. */
keir@16834 337 cmd = pci_readw(devfn, PCI_COMMAND);
keir@16834 338 if ( (bar_reg == PCI_ROM_ADDRESS) ||
keir@16834 339 ((bar_data & PCI_BASE_ADDRESS_SPACE) ==
keir@16834 340 PCI_BASE_ADDRESS_SPACE_MEMORY) )
keir@16834 341 cmd |= PCI_COMMAND_MEMORY;
keir@16834 342 else
keir@16834 343 cmd |= PCI_COMMAND_IO;
keir@16834 344 pci_writew(devfn, PCI_COMMAND, cmd);
keir@16834 345 }
kfraser@12554 346 }
kfraser@12554 347
keir@14449 348 /*
keir@14449 349 * If the network card is in the boot order, load the Etherboot option ROM.
keir@14449 350 * Read the boot order bytes from CMOS and check if any of them are 0x4.
keir@14449 351 */
keir@14449 352 static int must_load_nic(void)
Tim@13140 353 {
Tim@13140 354 uint8_t boot_order;
Tim@13140 355
keir@14449 356 /* Read CMOS register 0x3d (boot choices 0 and 1). */
keir@14449 357 boot_order = cmos_inb(0x3d);
keir@14449 358 if ( ((boot_order & 0xf) == 0x4) || ((boot_order & 0xf0) == 0x40) )
Tim@13140 359 return 1;
keir@14449 360
keir@14449 361 /* Read CMOS register 0x38 (boot choice 2 and FDD test flag). */
keir@14449 362 boot_order = cmos_inb(0x38);
keir@14449 363 return ((boot_order & 0xf0) == 0x40);
keir@14449 364 }
keir@14449 365
keir@16747 366 static int must_load_extboot(void)
keir@16747 367 {
keir@16747 368 return (inb(0x404) == 1);
keir@16747 369 }
keir@16747 370
keir@14449 371 /* Replace possibly erroneous memory-size CMOS fields with correct values. */
keir@14449 372 static void cmos_write_memory_size(void)
keir@14449 373 {
keir@15303 374 struct e820entry *map = HVM_E820;
keir@15303 375 int i, nr = *HVM_E820_NR;
keir@14449 376 uint32_t base_mem = 640, ext_mem = 0, alt_mem = 0;
keir@14449 377
keir@14449 378 for ( i = 0; i < nr; i++ )
keir@14449 379 if ( (map[i].addr >= 0x100000) && (map[i].type == E820_RAM) )
keir@14449 380 break;
keir@14449 381
keir@14449 382 if ( i != nr )
keir@14449 383 {
keir@14449 384 alt_mem = ext_mem = map[i].addr + map[i].size;
keir@14449 385 ext_mem = (ext_mem > 0x0100000) ? (ext_mem - 0x0100000) >> 10 : 0;
keir@14449 386 if ( ext_mem > 0xffff )
keir@14449 387 ext_mem = 0xffff;
keir@14449 388 alt_mem = (alt_mem > 0x1000000) ? (alt_mem - 0x1000000) >> 16 : 0;
keir@14449 389 }
keir@14449 390
keir@14877 391 /* All BIOSes: conventional memory (CMOS *always* reports 640kB). */
keir@14449 392 cmos_outb(0x15, (uint8_t)(base_mem >> 0));
keir@14449 393 cmos_outb(0x16, (uint8_t)(base_mem >> 8));
keir@14449 394
keir@14449 395 /* All BIOSes: extended memory (1kB chunks above 1MB). */
keir@14449 396 cmos_outb(0x17, (uint8_t)( ext_mem >> 0));
keir@14449 397 cmos_outb(0x18, (uint8_t)( ext_mem >> 8));
keir@14449 398 cmos_outb(0x30, (uint8_t)( ext_mem >> 0));
keir@14449 399 cmos_outb(0x31, (uint8_t)( ext_mem >> 8));
keir@14449 400
keir@14449 401 /* Some BIOSes: alternative extended memory (64kB chunks above 16MB). */
keir@14449 402 cmos_outb(0x34, (uint8_t)( alt_mem >> 0));
keir@14449 403 cmos_outb(0x35, (uint8_t)( alt_mem >> 8));
Tim@13140 404 }
Tim@13140 405
kfraser@12548 406 int main(void)
kfraser@12548 407 {
kfraser@14959 408 int acpi_sz = 0, vgabios_sz = 0, etherboot_sz = 0, rombios_sz, smbios_sz;
keir@16747 409 int extboot_sz = 0;
kaf24@12574 410
kfraser@12554 411 printf("HVM Loader\n");
kfraser@12548 412
kfraser@12548 413 init_hypercalls();
kfraser@12548 414
kfraser@12554 415 printf("Writing SMBIOS tables ...\n");
kfraser@14959 416 smbios_sz = hvm_write_smbios_tables();
kfraser@12548 417
kfraser@12554 418 printf("Loading ROMBIOS ...\n");
kfraser@14959 419 rombios_sz = sizeof(rombios);
kfraser@14959 420 if ( rombios_sz > 0x10000 )
kfraser@14959 421 rombios_sz = 0x10000;
kfraser@14959 422 memcpy((void *)ROMBIOS_PHYSICAL_ADDRESS, rombios, rombios_sz);
kaf24@13656 423 highbios_setup();
kfraser@12548 424
kfraser@12548 425 apic_setup();
kfraser@12554 426 pci_setup();
kaf24@12574 427
kfraser@12600 428 if ( (get_vcpu_nr() > 1) || get_apic_mode() )
kaf24@12574 429 create_mp_tables();
kfraser@12548 430
kfraser@12548 431 if ( cirrus_check() )
kfraser@12548 432 {
kfraser@12554 433 printf("Loading Cirrus VGABIOS ...\n");
kfraser@12548 434 memcpy((void *)VGABIOS_PHYSICAL_ADDRESS,
kfraser@12548 435 vgabios_cirrusvga, sizeof(vgabios_cirrusvga));
kfraser@14959 436 vgabios_sz = sizeof(vgabios_cirrusvga);
kfraser@12548 437 }
kfraser@12548 438 else
kfraser@12548 439 {
kfraser@12554 440 printf("Loading Standard VGABIOS ...\n");
kfraser@12548 441 memcpy((void *)VGABIOS_PHYSICAL_ADDRESS,
kfraser@12548 442 vgabios_stdvga, sizeof(vgabios_stdvga));
kfraser@14959 443 vgabios_sz = sizeof(vgabios_stdvga);
kfraser@12548 444 }
kfraser@12548 445
Tim@13140 446 if ( must_load_nic() )
Tim@13140 447 {
Tim@13140 448 printf("Loading ETHERBOOT ...\n");
Tim@13140 449 memcpy((void *)ETHERBOOT_PHYSICAL_ADDRESS,
Tim@13140 450 etherboot, sizeof(etherboot));
kfraser@14959 451 etherboot_sz = sizeof(etherboot);
Tim@13140 452 }
Tim@13140 453
keir@16747 454 if ( must_load_extboot() )
keir@16747 455 {
keir@16747 456 printf("Loading EXTBOOT ...\n");
keir@16747 457 memcpy((void *)EXTBOOT_PHYSICAL_ADDRESS,
keir@16747 458 extboot, sizeof(extboot));
keir@16747 459 extboot_sz = sizeof(extboot);
keir@16747 460 }
keir@16747 461
kfraser@14959 462 if ( get_acpi_enabled() )
kfraser@12548 463 {
kfraser@12554 464 printf("Loading ACPI ...\n");
kaf24@12574 465 acpi_sz = acpi_build_tables((uint8_t *)ACPI_PHYSICAL_ADDRESS);
kfraser@12634 466 ASSERT((ACPI_PHYSICAL_ADDRESS + acpi_sz) <= 0xF0000);
kfraser@12548 467 }
kfraser@12548 468
keir@14449 469 cmos_write_memory_size();
keir@14449 470
kfraser@14959 471 printf("BIOS map:\n");
kfraser@14959 472 if ( vgabios_sz )
kfraser@14959 473 printf(" %05x-%05x: VGA BIOS\n",
kfraser@14959 474 VGABIOS_PHYSICAL_ADDRESS,
kfraser@14959 475 VGABIOS_PHYSICAL_ADDRESS + vgabios_sz - 1);
kfraser@14959 476 if ( etherboot_sz )
kfraser@14959 477 printf(" %05x-%05x: Etherboot ROM\n",
kfraser@14959 478 ETHERBOOT_PHYSICAL_ADDRESS,
kfraser@14959 479 ETHERBOOT_PHYSICAL_ADDRESS + etherboot_sz - 1);
keir@16747 480 if ( extboot_sz )
keir@16747 481 printf(" %05x-%05x: Extboot ROM\n",
keir@16747 482 EXTBOOT_PHYSICAL_ADDRESS,
keir@16747 483 EXTBOOT_PHYSICAL_ADDRESS + extboot_sz - 1);
keir@16440 484 if ( use_vmxassist() )
kfraser@14959 485 printf(" %05x-%05x: VMXAssist\n",
kfraser@14959 486 VMXASSIST_PHYSICAL_ADDRESS,
kfraser@14959 487 VMXASSIST_PHYSICAL_ADDRESS + sizeof(vmxassist) - 1);
kfraser@14959 488 if ( smbios_sz )
kfraser@14959 489 printf(" %05x-%05x: SMBIOS tables\n",
kfraser@14959 490 SMBIOS_PHYSICAL_ADDRESS,
kfraser@14959 491 SMBIOS_PHYSICAL_ADDRESS + smbios_sz - 1);
kfraser@14959 492 if ( acpi_sz )
kfraser@14959 493 printf(" %05x-%05x: ACPI tables\n",
kfraser@14959 494 ACPI_PHYSICAL_ADDRESS,
kfraser@14959 495 ACPI_PHYSICAL_ADDRESS + acpi_sz - 1);
kfraser@14959 496 if ( rombios_sz )
kfraser@14959 497 printf(" %05x-%05x: Main BIOS\n",
kfraser@14959 498 ROMBIOS_PHYSICAL_ADDRESS,
kfraser@14959 499 ROMBIOS_PHYSICAL_ADDRESS + rombios_sz - 1);
kfraser@14959 500
keir@16440 501 if ( use_vmxassist() )
kfraser@12548 502 {
kfraser@12554 503 printf("Loading VMXAssist ...\n");
kfraser@12548 504 memcpy((void *)VMXASSIST_PHYSICAL_ADDRESS,
kfraser@12548 505 vmxassist, sizeof(vmxassist));
kfraser@12548 506
kfraser@12554 507 printf("VMX go ...\n");
kfraser@12548 508 __asm__ __volatile__(
kfraser@12548 509 "jmp *%%eax"
kfraser@12548 510 : : "a" (VMXASSIST_PHYSICAL_ADDRESS), "d" (0)
kfraser@12548 511 );
kfraser@12548 512 }
kfraser@12548 513
kfraser@14373 514 printf("Invoking ROMBIOS ...\n");
kfraser@12548 515 return 0;
kfraser@12548 516 }
kfraser@12548 517
kfraser@12548 518 /*
kfraser@12548 519 * Local variables:
kfraser@12548 520 * mode: C
kfraser@12548 521 * c-set-style: "BSD"
kfraser@12548 522 * c-basic-offset: 4
kfraser@12548 523 * tab-width: 4
kfraser@12548 524 * indent-tabs-mode: nil
kfraser@12548 525 * End:
kfraser@12548 526 */