ia64/xen-unstable

annotate xen/include/asm-x86/mpspec.h @ 15812:86a154e1ef5d

[HVM] Shadow: don't shadow the p2m table.
For HVM vcpus with paging disabled, we used to shadow the p2m table,
and skip the p2m lookup to go from gfn to mfn. Instead, we now
provide a simple pagetable that gives a one-to-one mapping of 4GB, and
shadow that, making the translations from gfn to mfn via the p2m.
This removes the paging-disabled special-case code from the shadow
fault handler, and allows us to expand the p2m interface, since all HVM
translations now go through the same p2m lookups.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
author Tim Deegan <Tim.Deegan@xensource.com>
date Fri Aug 31 11:06:22 2007 +0100 (2007-08-31)
parents 50b1fe78e2e8
children
rev   line source
kaf24@1452 1 #ifndef __ASM_MPSPEC_H
kaf24@1452 2 #define __ASM_MPSPEC_H
kaf24@1452 3
kaf24@4804 4 #include <xen/cpumask.h>
kaf24@4804 5 #include <asm/mpspec_def.h>
kaf24@4804 6 #include <mach_mpspec.h>
kaf24@1452 7
kaf24@4804 8 extern int mp_bus_id_to_type [MAX_MP_BUSSES];
kaf24@4804 9 extern int mp_bus_id_to_node [MAX_MP_BUSSES];
kaf24@4804 10 extern int mp_bus_id_to_local [MAX_MP_BUSSES];
kaf24@1452 11 extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
kaf24@4804 12 extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
kaf24@1452 13
kaf24@7992 14 extern unsigned int def_to_bigsmp;
kaf24@1452 15 extern unsigned int boot_cpu_physical_apicid;
kaf24@1452 16 extern int smp_found_config;
kaf24@1452 17 extern void find_smp_config (void);
kaf24@1452 18 extern void get_smp_config (void);
kaf24@4804 19 extern int nr_ioapics;
kaf24@1452 20 extern int apic_version [MAX_APICS];
kaf24@4804 21 extern int mp_bus_id_to_type [MAX_MP_BUSSES];
kaf24@4804 22 extern int mp_irq_entries;
kaf24@4804 23 extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
kaf24@4804 24 extern int mpc_default_type;
kaf24@4804 25 extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
kaf24@1452 26 extern unsigned long mp_lapic_addr;
kaf24@4804 27 extern int pic_mode;
kaf24@1452 28 extern int using_apic_timer;
kaf24@1452 29
kaf24@8873 30 #ifdef CONFIG_ACPI
kaf24@1452 31 extern void mp_register_lapic (u8 id, u8 enabled);
kaf24@1452 32 extern void mp_register_lapic_address (u64 address);
kaf24@4804 33 extern void mp_register_ioapic (u8 id, u32 address, u32 gsi_base);
kaf24@4804 34 extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, u32 gsi);
kaf24@1452 35 extern void mp_config_acpi_legacy_irqs (void);
kaf24@4804 36 extern int mp_register_gsi (u32 gsi, int edge_level, int active_high_low);
kaf24@8873 37 #endif /* CONFIG_ACPI */
kaf24@4804 38
kaf24@4804 39 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
kaf24@4804 40
kaf24@4804 41 struct physid_mask
kaf24@4804 42 {
kaf24@4804 43 unsigned long mask[PHYSID_ARRAY_SIZE];
kaf24@4804 44 };
kaf24@4804 45
kaf24@4804 46 typedef struct physid_mask physid_mask_t;
kaf24@4804 47
kaf24@4804 48 #define physid_set(physid, map) set_bit(physid, (map).mask)
kaf24@4804 49 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
kaf24@4804 50 #define physid_isset(physid, map) test_bit(physid, (map).mask)
kaf24@4804 51 #define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask)
kaf24@1452 52
kaf24@4804 53 #define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
kaf24@4804 54 #define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
kaf24@4804 55 #define physids_clear(map) bitmap_zero((map).mask, MAX_APICS)
kaf24@4804 56 #define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS)
kaf24@4804 57 #define physids_empty(map) bitmap_empty((map).mask, MAX_APICS)
kaf24@4804 58 #define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
kaf24@4804 59 #define physids_weight(map) bitmap_weight((map).mask, MAX_APICS)
kaf24@4804 60 #define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
kaf24@4804 61 #define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
kaf24@4804 62 #define physids_coerce(map) ((map).mask[0])
kaf24@4804 63
kaf24@4804 64 #define physids_promote(physids) \
kaf24@4804 65 ({ \
kaf24@4804 66 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
kaf24@4804 67 __physid_mask.mask[0] = physids; \
kaf24@4804 68 __physid_mask; \
kaf24@4804 69 })
kaf24@4804 70
kaf24@4804 71 #define physid_mask_of_physid(physid) \
kaf24@4804 72 ({ \
kaf24@4804 73 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
kaf24@4804 74 physid_set(physid, __physid_mask); \
kaf24@4804 75 __physid_mask; \
kaf24@4804 76 })
kaf24@4804 77
kaf24@4804 78 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
kaf24@4804 79 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
kaf24@4804 80
kaf24@4804 81 extern physid_mask_t phys_cpu_present_map;
kaf24@1452 82
kaf24@1452 83 #endif
kaf24@1452 84