ia64/xen-unstable

annotate tools/firmware/hvmloader/hvmloader.c @ 15303:7eeddd787d2f

hvm: e820 public header cleanup.
Signed-off-by: Keir Fraser <keir@xensource.com>
author Keir Fraser <keir@xensource.com>
date Sun Jun 10 19:49:44 2007 +0100 (2007-06-10)
parents 5754173c3d81
children c6491ed12f84
rev   line source
kaf24@8708 1 /*
kaf24@8708 2 * hvmloader.c: HVM ROMBIOS/VGABIOS/ACPI/VMXAssist image loader.
kaf24@8708 3 *
kaf24@8708 4 * Leendert van Doorn, leendert@watson.ibm.com
kaf24@8708 5 * Copyright (c) 2005, International Business Machines Corporation.
kaf24@8708 6 *
kfraser@12554 7 * Copyright (c) 2006, Keir Fraser, XenSource Inc.
kfraser@12554 8 *
kaf24@8708 9 * This program is free software; you can redistribute it and/or modify it
kaf24@8708 10 * under the terms and conditions of the GNU General Public License,
kaf24@8708 11 * version 2, as published by the Free Software Foundation.
kaf24@8708 12 *
kaf24@8708 13 * This program is distributed in the hope it will be useful, but WITHOUT
kaf24@8708 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
kaf24@8708 15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
kaf24@8708 16 * more details.
kaf24@8708 17 *
kaf24@8708 18 * You should have received a copy of the GNU General Public License along with
kaf24@8708 19 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
kaf24@8708 20 * Place - Suite 330, Boston, MA 02111-1307 USA.
kaf24@8708 21 */
kfraser@14959 22
kaf24@8708 23 #include "roms.h"
kfraser@14959 24 #include "acpi/acpi2_0.h"
kfraser@10976 25 #include "hypercall.h"
kfraser@10976 26 #include "util.h"
kfraser@12548 27 #include "config.h"
kaf24@12571 28 #include "apic_regs.h"
kfraser@12554 29 #include "pci_regs.h"
keir@15303 30 #include "e820.h"
kfraser@10976 31 #include <xen/version.h>
kfraser@11081 32 #include <xen/hvm/params.h>
kaf24@8708 33
kaf24@8708 34 asm(
kfraser@12548 35 " .text \n"
kfraser@12548 36 " .globl _start \n"
kfraser@12548 37 "_start: \n"
kfraser@14373 38 /* C runtime kickoff. */
kfraser@12548 39 " cld \n"
kfraser@12548 40 " cli \n"
kfraser@14373 41 " movl $stack_top,%esp \n"
kfraser@14373 42 " movl %esp,%ebp \n"
kfraser@14373 43 " call main \n"
kfraser@14373 44 /* Relocate real-mode trampoline to 0x0. */
kfraser@14373 45 " mov $trampoline_start,%esi \n"
kfraser@14373 46 " xor %edi,%edi \n"
kfraser@14373 47 " mov $trampoline_end,%ecx \n"
kfraser@14373 48 " sub %esi,%ecx \n"
kfraser@14373 49 " rep movsb \n"
kfraser@14373 50 /* Load real-mode compatible segment state (base 0x0000, limit 0xffff). */
kfraser@12548 51 " lgdt gdt_desr \n"
kfraser@14373 52 " mov $0x0010,%ax \n"
kfraser@14373 53 " mov %ax,%ds \n"
kfraser@14373 54 " mov %ax,%es \n"
kfraser@14373 55 " mov %ax,%fs \n"
kfraser@14373 56 " mov %ax,%gs \n"
kfraser@14373 57 " mov %ax,%ss \n"
kfraser@14391 58 /* Initialise all 32-bit GPRs to zero. */
kfraser@14391 59 " xor %eax,%eax \n"
kfraser@14391 60 " xor %ebx,%ebx \n"
kfraser@14391 61 " xor %ecx,%ecx \n"
kfraser@14391 62 " xor %edx,%edx \n"
kfraser@14391 63 " xor %esp,%esp \n"
kfraser@14391 64 " xor %ebp,%ebp \n"
kfraser@14391 65 " xor %esi,%esi \n"
kfraser@14391 66 " xor %edi,%edi \n"
kfraser@14373 67 /* Enter real mode, reload all segment registers and IDT. */
kfraser@14391 68 " ljmp $0x8,$0x0 \n"
kfraser@14373 69 "trampoline_start: .code16 \n"
kfraser@14373 70 " mov %eax,%cr0 \n"
kfraser@14373 71 " ljmp $0,$1f-trampoline_start\n"
kfraser@14391 72 "1: mov %ax,%ds \n"
kfraser@14373 73 " mov %ax,%es \n"
kfraser@14373 74 " mov %ax,%fs \n"
kfraser@14373 75 " mov %ax,%gs \n"
kfraser@14373 76 " mov %ax,%ss \n"
kfraser@14373 77 " lidt 1f-trampoline_start \n"
kfraser@14373 78 " ljmp $0xf000,$0xfff0 \n"
kfraser@14373 79 "1: .word 0x3ff,0,0 \n"
kfraser@14373 80 "trampoline_end: .code32 \n"
kfraser@12548 81 " \n"
kfraser@12548 82 "gdt_desr: \n"
kfraser@12548 83 " .word gdt_end - gdt - 1 \n"
kfraser@12548 84 " .long gdt \n"
kfraser@12548 85 " \n"
kfraser@12548 86 " .align 8 \n"
kfraser@12548 87 "gdt: \n"
kfraser@12548 88 " .quad 0x0000000000000000 \n"
kfraser@14373 89 " .quad 0x00009a000000ffff \n" /* Ring 0 code, base 0 limit 0xffff */
kfraser@14373 90 " .quad 0x000092000000ffff \n" /* Ring 0 data, base 0 limit 0xffff */
kfraser@12548 91 "gdt_end: \n"
kfraser@12548 92 " \n"
kfraser@12548 93 " .bss \n"
kfraser@12548 94 " .align 8 \n"
kfraser@12548 95 "stack: \n"
kfraser@12548 96 " .skip 0x4000 \n"
kfraser@12548 97 "stack_top: \n"
kfraser@12548 98 );
kaf24@8708 99
kfraser@14959 100 void create_mp_tables(void);
kfraser@14959 101 int hvm_write_smbios_tables(void);
kaf24@8708 102
kfraser@10976 103 static int
kaf24@8708 104 cirrus_check(void)
kaf24@8708 105 {
kfraser@12548 106 outw(0x3C4, 0x9206);
kfraser@12548 107 return inb(0x3C5) == 0x12;
kaf24@8708 108 }
kaf24@8708 109
kfraser@10976 110 static int
kaf24@8708 111 check_amd(void)
kaf24@8708 112 {
kfraser@12548 113 char id[12];
kaf24@8708 114
kfraser@12548 115 __asm__ __volatile__ (
kfraser@12548 116 "cpuid"
kfraser@12548 117 : "=b" (*(int *)(&id[0])),
kfraser@12548 118 "=c" (*(int *)(&id[8])),
kfraser@12548 119 "=d" (*(int *)(&id[4]))
kfraser@12548 120 : "a" (0) );
kfraser@12548 121 return __builtin_memcmp(id, "AuthenticAMD", 12) == 0;
kaf24@8708 122 }
kaf24@8708 123
kfraser@10976 124 static void
kfraser@10976 125 wrmsr(uint32_t idx, uint64_t v)
kfraser@10976 126 {
kfraser@12548 127 __asm__ __volatile__ (
kfraser@12548 128 "wrmsr"
kfraser@12548 129 : : "c" (idx), "a" ((uint32_t)v), "d" ((uint32_t)(v>>32)) );
kfraser@10976 130 }
kfraser@10976 131
kfraser@10976 132 static void
kfraser@10976 133 init_hypercalls(void)
kfraser@10976 134 {
kfraser@12548 135 uint32_t eax, ebx, ecx, edx;
kfraser@12548 136 unsigned long i;
kfraser@12554 137 char signature[13];
kfraser@12548 138 xen_extraversion_t extraversion;
kfraser@10976 139
kfraser@12548 140 cpuid(0x40000000, &eax, &ebx, &ecx, &edx);
kfraser@10976 141
kfraser@12548 142 *(uint32_t *)(signature + 0) = ebx;
kfraser@12548 143 *(uint32_t *)(signature + 4) = ecx;
kfraser@12548 144 *(uint32_t *)(signature + 8) = edx;
kfraser@12548 145 signature[12] = '\0';
kfraser@10976 146
kfraser@12548 147 if ( strcmp("XenVMMXenVMM", signature) || (eax < 0x40000002) )
kfraser@12548 148 {
kfraser@12554 149 printf("FATAL: Xen hypervisor not detected\n");
kfraser@12548 150 __asm__ __volatile__( "ud2" );
kfraser@12548 151 }
kfraser@10976 152
kfraser@12554 153 /* Fill in hypercall transfer pages. */
kfraser@12548 154 cpuid(0x40000002, &eax, &ebx, &ecx, &edx);
kfraser@12548 155 for ( i = 0; i < eax; i++ )
kfraser@12548 156 wrmsr(ebx, HYPERCALL_PHYSICAL_ADDRESS + (i << 12) + i);
kfraser@12548 157
kfraser@12554 158 /* Print version information. */
kfraser@12554 159 cpuid(0x40000001, &eax, &ebx, &ecx, &edx);
kfraser@12548 160 hypercall_xen_version(XENVER_extraversion, extraversion);
kfraser@12554 161 printf("Detected Xen v%u.%u%s\n", eax >> 16, eax & 0xffff, extraversion);
kfraser@10976 162 }
kfraser@10976 163
kfraser@12548 164 static void apic_setup(void)
kaf24@8708 165 {
kaf24@12571 166 /* Set the IOAPIC ID to tha static value used in the MP/ACPI tables. */
kaf24@12571 167 ioapic_write(0x00, IOAPIC_ID);
kaf24@8708 168
kaf24@12571 169 /* Set up Virtual Wire mode. */
kaf24@12571 170 lapic_write(APIC_SPIV, APIC_SPIV_APIC_ENABLED | 0xFF);
kaf24@12571 171 lapic_write(APIC_LVT0, APIC_MODE_EXTINT << 8);
kaf24@12571 172 lapic_write(APIC_LVT1, APIC_MODE_NMI << 8);
kaf24@8708 173 }
kaf24@8708 174
kfraser@12554 175 static void pci_setup(void)
kfraser@12554 176 {
kfraser@12554 177 uint32_t devfn, bar_reg, bar_data, bar_sz, cmd;
kfraser@12554 178 uint32_t *base, io_base = 0xc000, mem_base = HVM_BELOW_4G_MMIO_START;
kfraser@12554 179 uint16_t class, vendor_id, device_id;
kfraser@12554 180 unsigned int bar, pin, link, isa_irq;
kfraser@12554 181
kfraser@12554 182 /* Program PCI-ISA bridge with appropriate link routes. */
kfraser@12554 183 link = 0;
kfraser@12554 184 for ( isa_irq = 0; isa_irq < 15; isa_irq++ )
kfraser@12554 185 {
kfraser@12554 186 if ( !(PCI_ISA_IRQ_MASK & (1U << isa_irq)) )
kfraser@12554 187 continue;
kfraser@12554 188 pci_writeb(PCI_ISA_DEVFN, 0x60 + link, isa_irq);
kfraser@12554 189 printf("PCI-ISA link %u routed to IRQ%u\n", link, isa_irq);
kfraser@12554 190 if ( link++ == 4 )
kfraser@12554 191 break;
kfraser@12554 192 }
kfraser@12554 193
kfraser@12554 194 /* Program ELCR to match PCI-wired IRQs. */
kfraser@12554 195 outb(0x4d0, (uint8_t)(PCI_ISA_IRQ_MASK >> 0));
kfraser@12554 196 outb(0x4d1, (uint8_t)(PCI_ISA_IRQ_MASK >> 8));
kfraser@12554 197
kfraser@12554 198 /* Scan the PCI bus and map resources. */
kfraser@12554 199 for ( devfn = 0; devfn < 128; devfn++ )
kfraser@12554 200 {
kfraser@12554 201 class = pci_readw(devfn, PCI_CLASS_DEVICE);
kfraser@12554 202 vendor_id = pci_readw(devfn, PCI_VENDOR_ID);
kfraser@12554 203 device_id = pci_readw(devfn, PCI_DEVICE_ID);
kfraser@12554 204 if ( (vendor_id == 0xffff) && (device_id == 0xffff) )
kfraser@12554 205 continue;
kfraser@12554 206
kfraser@12554 207 ASSERT((devfn != PCI_ISA_DEVFN) ||
kfraser@12554 208 ((vendor_id == 0x8086) && (device_id == 0x7000)));
kfraser@12554 209
kfraser@12554 210 switch ( class )
kfraser@12554 211 {
kfraser@12554 212 case 0x0680:
kfraser@12554 213 ASSERT((vendor_id == 0x8086) && (device_id == 0x7113));
kfraser@12554 214 /*
kfraser@12554 215 * PIIX4 ACPI PM. Special device with special PCI config space.
kfraser@12554 216 * No ordinary BARs.
kfraser@12554 217 */
kfraser@12554 218 pci_writew(devfn, 0x20, 0x0000); /* No smb bus IO enable */
kfraser@12554 219 pci_writew(devfn, 0x22, 0x0000);
kfraser@12554 220 pci_writew(devfn, 0x3c, 0x0009); /* Hardcoded IRQ9 */
kfraser@12554 221 pci_writew(devfn, 0x3d, 0x0001);
kfraser@12554 222 break;
kfraser@12554 223 case 0x0101:
kfraser@12554 224 /* PIIX3 IDE */
kfraser@12554 225 ASSERT((vendor_id == 0x8086) && (device_id == 0x7010));
kfraser@12554 226 pci_writew(devfn, 0x40, 0x8000); /* enable IDE0 */
kfraser@12554 227 pci_writew(devfn, 0x42, 0x8000); /* enable IDE1 */
kfraser@12554 228 /* fall through */
kfraser@12554 229 default:
kfraser@12554 230 /* Default memory mappings. */
kfraser@12554 231 for ( bar = 0; bar < 7; bar++ )
kfraser@12554 232 {
kfraser@12554 233 bar_reg = PCI_BASE_ADDRESS_0 + 4*bar;
kfraser@12554 234 if ( bar == 6 )
kfraser@12554 235 bar_reg = PCI_ROM_ADDRESS;
kfraser@12554 236
kfraser@12554 237 bar_data = pci_readl(devfn, bar_reg);
kfraser@12554 238
kfraser@12554 239 pci_writel(devfn, bar_reg, ~0);
kfraser@12554 240 bar_sz = pci_readl(devfn, bar_reg);
kfraser@12554 241 if ( bar_sz == 0 )
kfraser@12554 242 continue;
kfraser@12554 243
kfraser@12554 244 if ( (bar_data & PCI_BASE_ADDRESS_SPACE) ==
kfraser@12554 245 PCI_BASE_ADDRESS_SPACE_MEMORY )
kfraser@12554 246 {
kfraser@12554 247 base = &mem_base;
kfraser@12554 248 bar_sz &= PCI_BASE_ADDRESS_MEM_MASK;
kfraser@12554 249 bar_data &= ~PCI_BASE_ADDRESS_MEM_MASK;
kfraser@12554 250 }
kfraser@12554 251 else
kfraser@12554 252 {
kfraser@12554 253 base = &io_base;
kfraser@12554 254 bar_sz &= PCI_BASE_ADDRESS_IO_MASK & 0xffff;
kfraser@12554 255 bar_data &= ~PCI_BASE_ADDRESS_IO_MASK;
kfraser@12554 256 }
kfraser@12554 257 bar_sz &= ~(bar_sz - 1);
kfraser@12554 258
kfraser@12554 259 *base = (*base + bar_sz - 1) & ~(bar_sz - 1);
kfraser@12554 260 bar_data |= *base;
kfraser@12554 261 *base += bar_sz;
kfraser@12554 262
kfraser@12554 263 pci_writel(devfn, bar_reg, bar_data);
kfraser@12554 264 printf("pci dev %02x:%x bar %02x size %08x: %08x\n",
kfraser@12554 265 devfn>>3, devfn&7, bar_reg, bar_sz, bar_data);
kfraser@12554 266
kfraser@12554 267 /* Now enable the memory or I/O mapping. */
kfraser@12554 268 cmd = pci_readw(devfn, PCI_COMMAND);
kfraser@12554 269 if ( (bar_reg == PCI_ROM_ADDRESS) ||
kfraser@12554 270 ((bar_data & PCI_BASE_ADDRESS_SPACE) ==
kfraser@12554 271 PCI_BASE_ADDRESS_SPACE_MEMORY) )
kfraser@12554 272 cmd |= PCI_COMMAND_MEMORY;
kfraser@12554 273 else
kfraser@12554 274 cmd |= PCI_COMMAND_IO;
kfraser@12554 275 pci_writew(devfn, PCI_COMMAND, cmd);
kfraser@12554 276 }
kfraser@12554 277 break;
kfraser@12554 278 }
kfraser@12554 279
kfraser@12554 280 /* Map the interrupt. */
kfraser@12554 281 pin = pci_readb(devfn, PCI_INTERRUPT_PIN);
kfraser@12554 282 if ( pin != 0 )
kfraser@12554 283 {
kfraser@12554 284 /* This is the barber's pole mapping used by Xen. */
kfraser@12554 285 link = ((pin - 1) + (devfn >> 3)) & 3;
kfraser@12554 286 isa_irq = pci_readb(PCI_ISA_DEVFN, 0x60 + link);
kfraser@12554 287 pci_writeb(devfn, PCI_INTERRUPT_LINE, isa_irq);
kfraser@12554 288 printf("pci dev %02x:%x INT%c->IRQ%u\n",
kfraser@12554 289 devfn>>3, devfn&7, 'A'+pin-1, isa_irq);
kfraser@12554 290 }
kfraser@12554 291 }
kfraser@12554 292 }
kfraser@12554 293
keir@14449 294 /*
keir@14449 295 * If the network card is in the boot order, load the Etherboot option ROM.
keir@14449 296 * Read the boot order bytes from CMOS and check if any of them are 0x4.
keir@14449 297 */
keir@14449 298 static int must_load_nic(void)
Tim@13140 299 {
Tim@13140 300 uint8_t boot_order;
Tim@13140 301
keir@14449 302 /* Read CMOS register 0x3d (boot choices 0 and 1). */
keir@14449 303 boot_order = cmos_inb(0x3d);
keir@14449 304 if ( ((boot_order & 0xf) == 0x4) || ((boot_order & 0xf0) == 0x40) )
Tim@13140 305 return 1;
keir@14449 306
keir@14449 307 /* Read CMOS register 0x38 (boot choice 2 and FDD test flag). */
keir@14449 308 boot_order = cmos_inb(0x38);
keir@14449 309 return ((boot_order & 0xf0) == 0x40);
keir@14449 310 }
keir@14449 311
keir@14449 312 /* Replace possibly erroneous memory-size CMOS fields with correct values. */
keir@14449 313 static void cmos_write_memory_size(void)
keir@14449 314 {
keir@15303 315 struct e820entry *map = HVM_E820;
keir@15303 316 int i, nr = *HVM_E820_NR;
keir@14449 317 uint32_t base_mem = 640, ext_mem = 0, alt_mem = 0;
keir@14449 318
keir@14449 319 for ( i = 0; i < nr; i++ )
keir@14449 320 if ( (map[i].addr >= 0x100000) && (map[i].type == E820_RAM) )
keir@14449 321 break;
keir@14449 322
keir@14449 323 if ( i != nr )
keir@14449 324 {
keir@14449 325 alt_mem = ext_mem = map[i].addr + map[i].size;
keir@14449 326 ext_mem = (ext_mem > 0x0100000) ? (ext_mem - 0x0100000) >> 10 : 0;
keir@14449 327 if ( ext_mem > 0xffff )
keir@14449 328 ext_mem = 0xffff;
keir@14449 329 alt_mem = (alt_mem > 0x1000000) ? (alt_mem - 0x1000000) >> 16 : 0;
keir@14449 330 }
keir@14449 331
keir@14877 332 /* All BIOSes: conventional memory (CMOS *always* reports 640kB). */
keir@14449 333 cmos_outb(0x15, (uint8_t)(base_mem >> 0));
keir@14449 334 cmos_outb(0x16, (uint8_t)(base_mem >> 8));
keir@14449 335
keir@14449 336 /* All BIOSes: extended memory (1kB chunks above 1MB). */
keir@14449 337 cmos_outb(0x17, (uint8_t)( ext_mem >> 0));
keir@14449 338 cmos_outb(0x18, (uint8_t)( ext_mem >> 8));
keir@14449 339 cmos_outb(0x30, (uint8_t)( ext_mem >> 0));
keir@14449 340 cmos_outb(0x31, (uint8_t)( ext_mem >> 8));
keir@14449 341
keir@14449 342 /* Some BIOSes: alternative extended memory (64kB chunks above 16MB). */
keir@14449 343 cmos_outb(0x34, (uint8_t)( alt_mem >> 0));
keir@14449 344 cmos_outb(0x35, (uint8_t)( alt_mem >> 8));
Tim@13140 345 }
Tim@13140 346
kfraser@12548 347 int main(void)
kfraser@12548 348 {
kfraser@14959 349 int acpi_sz = 0, vgabios_sz = 0, etherboot_sz = 0, rombios_sz, smbios_sz;
kaf24@12574 350
kfraser@12554 351 printf("HVM Loader\n");
kfraser@12548 352
kfraser@12548 353 init_hypercalls();
kfraser@12548 354
kfraser@12554 355 printf("Writing SMBIOS tables ...\n");
kfraser@14959 356 smbios_sz = hvm_write_smbios_tables();
kfraser@12548 357
kfraser@12554 358 printf("Loading ROMBIOS ...\n");
kfraser@14959 359 rombios_sz = sizeof(rombios);
kfraser@14959 360 if ( rombios_sz > 0x10000 )
kfraser@14959 361 rombios_sz = 0x10000;
kfraser@14959 362 memcpy((void *)ROMBIOS_PHYSICAL_ADDRESS, rombios, rombios_sz);
kaf24@13656 363 highbios_setup();
kfraser@12548 364
kfraser@12548 365 apic_setup();
kfraser@12554 366 pci_setup();
kaf24@12574 367
kfraser@12600 368 if ( (get_vcpu_nr() > 1) || get_apic_mode() )
kaf24@12574 369 create_mp_tables();
kfraser@12548 370
kfraser@12548 371 if ( cirrus_check() )
kfraser@12548 372 {
kfraser@12554 373 printf("Loading Cirrus VGABIOS ...\n");
kfraser@12548 374 memcpy((void *)VGABIOS_PHYSICAL_ADDRESS,
kfraser@12548 375 vgabios_cirrusvga, sizeof(vgabios_cirrusvga));
kfraser@14959 376 vgabios_sz = sizeof(vgabios_cirrusvga);
kfraser@12548 377 }
kfraser@12548 378 else
kfraser@12548 379 {
kfraser@12554 380 printf("Loading Standard VGABIOS ...\n");
kfraser@12548 381 memcpy((void *)VGABIOS_PHYSICAL_ADDRESS,
kfraser@12548 382 vgabios_stdvga, sizeof(vgabios_stdvga));
kfraser@14959 383 vgabios_sz = sizeof(vgabios_stdvga);
kfraser@12548 384 }
kfraser@12548 385
Tim@13140 386 if ( must_load_nic() )
Tim@13140 387 {
Tim@13140 388 printf("Loading ETHERBOOT ...\n");
Tim@13140 389 memcpy((void *)ETHERBOOT_PHYSICAL_ADDRESS,
Tim@13140 390 etherboot, sizeof(etherboot));
kfraser@14959 391 etherboot_sz = sizeof(etherboot);
Tim@13140 392 }
Tim@13140 393
kfraser@14959 394 if ( get_acpi_enabled() )
kfraser@12548 395 {
kfraser@12554 396 printf("Loading ACPI ...\n");
kaf24@12574 397 acpi_sz = acpi_build_tables((uint8_t *)ACPI_PHYSICAL_ADDRESS);
kfraser@12634 398 ASSERT((ACPI_PHYSICAL_ADDRESS + acpi_sz) <= 0xF0000);
kfraser@12548 399 }
kfraser@12548 400
keir@14449 401 cmos_write_memory_size();
keir@14449 402
kfraser@14959 403 printf("BIOS map:\n");
kfraser@14959 404 if ( vgabios_sz )
kfraser@14959 405 printf(" %05x-%05x: VGA BIOS\n",
kfraser@14959 406 VGABIOS_PHYSICAL_ADDRESS,
kfraser@14959 407 VGABIOS_PHYSICAL_ADDRESS + vgabios_sz - 1);
kfraser@14959 408 if ( etherboot_sz )
kfraser@14959 409 printf(" %05x-%05x: Etherboot ROM\n",
kfraser@14959 410 ETHERBOOT_PHYSICAL_ADDRESS,
kfraser@14959 411 ETHERBOOT_PHYSICAL_ADDRESS + etherboot_sz - 1);
kfraser@14959 412 if ( !check_amd() )
kfraser@14959 413 printf(" %05x-%05x: VMXAssist\n",
kfraser@14959 414 VMXASSIST_PHYSICAL_ADDRESS,
kfraser@14959 415 VMXASSIST_PHYSICAL_ADDRESS + sizeof(vmxassist) - 1);
kfraser@14959 416 if ( smbios_sz )
kfraser@14959 417 printf(" %05x-%05x: SMBIOS tables\n",
kfraser@14959 418 SMBIOS_PHYSICAL_ADDRESS,
kfraser@14959 419 SMBIOS_PHYSICAL_ADDRESS + smbios_sz - 1);
kfraser@14959 420 if ( acpi_sz )
kfraser@14959 421 printf(" %05x-%05x: ACPI tables\n",
kfraser@14959 422 ACPI_PHYSICAL_ADDRESS,
kfraser@14959 423 ACPI_PHYSICAL_ADDRESS + acpi_sz - 1);
kfraser@14959 424 if ( rombios_sz )
kfraser@14959 425 printf(" %05x-%05x: Main BIOS\n",
kfraser@14959 426 ROMBIOS_PHYSICAL_ADDRESS,
kfraser@14959 427 ROMBIOS_PHYSICAL_ADDRESS + rombios_sz - 1);
kfraser@14959 428
kfraser@14373 429 if ( !check_amd() )
kfraser@12548 430 {
kfraser@12554 431 printf("Loading VMXAssist ...\n");
kfraser@12548 432 memcpy((void *)VMXASSIST_PHYSICAL_ADDRESS,
kfraser@12548 433 vmxassist, sizeof(vmxassist));
kfraser@12548 434
kfraser@12554 435 printf("VMX go ...\n");
kfraser@12548 436 __asm__ __volatile__(
kfraser@12548 437 "jmp *%%eax"
kfraser@12548 438 : : "a" (VMXASSIST_PHYSICAL_ADDRESS), "d" (0)
kfraser@12548 439 );
kfraser@12548 440 }
kfraser@12548 441
kfraser@14373 442 printf("Invoking ROMBIOS ...\n");
kfraser@12548 443 return 0;
kfraser@12548 444 }
kfraser@12548 445
kfraser@12548 446 /*
kfraser@12548 447 * Local variables:
kfraser@12548 448 * mode: C
kfraser@12548 449 * c-set-style: "BSD"
kfraser@12548 450 * c-basic-offset: 4
kfraser@12548 451 * tab-width: 4
kfraser@12548 452 * indent-tabs-mode: nil
kfraser@12548 453 * End:
kfraser@12548 454 */